Doing some more code trolling here; am looking at the MP
parts of the TLB refill code in the mips64 tree, and I'm a bit
It looks to me like pgd_current is indexed by CP0_CONTEXT
and the resulting pointer is supposed to be the base of the
page tables for that particular process. This makes sense.
However, I see this in mmu_context.h:
#define TLBMISS_HANDLER_SETUP_PGD(pgd) \
pgd_current[smp_processor_id()] = (unsigned long)(pgd)
#define TLBMISS_HANDLER_SETUP() \
set_context((unsigned long) smp_processor_id() << (23 + 3)); \
extern unsigned long pgd_current;
so pgd_current[smp_processor_id()] is hard coded to be set to
swapper_pg_dir, which, insofar as I can tell, is not a per-cpu structure.
It looks to me like this will end up with pgd_current being an
array of NR_CPUS pointers all of which point to the same pgd table.
I know I must be misunderstanding this code. Any suggestions as to what I'm