| To: | Pete Popov <ppopov@mvista.com> |
|---|---|
| Subject: | Re: irq.c |
| From: | Ralf Baechle <ralf@oss.sgi.com> |
| Date: | Mon, 12 Feb 2001 22:18:25 -0800 |
| Cc: | carlson@sibyte.com, "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com> |
| In-reply-to: | <3A84400E.82CEA4B@mvista.com>; from ppopov@mvista.com on Fri, Feb 09, 2001 at 11:07:58AM -0800 |
| References: | <3A843C2D.525643E7@mvista.com> <0102091101190P.01909@plugh.sibyte.com> <3A84400E.82CEA4B@mvista.com> |
| Sender: | owner-linux-mips@oss.sgi.com |
| User-agent: | Mutt/1.2.5i |
On Fri, Feb 09, 2001 at 11:07:58AM -0800, Pete Popov wrote: > Thanks for pointing that out. If all architectures will move to > kernel/irq.c, then it probably makes sense to wait. At first glance, > mips/kernel/irq.c seems pretty close to i386/kernel/irq.c -- certainly a > lot closer than many of the other copies. It was derived from a fairly recent copy of the x86 irq.c; running out of time I never completed the rewrite. The idea is to implement some kind of modular interrupt mechanism which allows us to have a single piece of code in the MIPS kernel that knows how to handle i8259 interrupt, a single piece of code to handle GT64120 interrupts etc. Not like the current mess which duplicates code ad infinitum. Aside it's also going to make the RTLinux fraction happy. Ralf |
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