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Re: floating point on Nevada cpu

To: "Kevin D. Kissell" <kevink@mips.com>
Subject: Re: floating point on Nevada cpu
From: Steve Johnson <stevej@ridgerun.com>
Date: Fri, 26 Jan 2001 06:01:12 -0700
Cc: Pete Popov <ppopov@mvista.com>, linux-mips@oss.sgi.com
Organization: Ridgerun, Inc.
References: <3A6F8F66.6258801@mvista.com> <0101241833281Q.00834@plugh.sibyte.com> <3A6F9814.3E39027@mvista.com> <0101241917341S.00834@plugh.sibyte.com> <3A703E3C.360FB4FF@ridgerun.com> <3A706A22.6B760617@mvista.com> <010601c08780$d0b8a7a0$0deca8c0@Ulysses>
Sender: owner-linux-mips@oss.sgi.com
"Kevin D. Kissell" wrote:

> I had essentially the same problem at MIPS a year or two ago,
> and I could have *sworn* that my fix, which ORed ST0_FR into
> the initial Status register value set in the startup assembly code,
> had made it into the standard distributions.  It's at about line 530
> of head.S, where a term is added to make the instruction
>
> li t1,~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR)
>
> I spent days thinking it was a mipsel library problem,
> because it only turned up when I tried exercising a
> little-endian version of the same kernel that worked
> sell big-endian on the Indy.  But of course it was all
> due to the mipsel system having a boot-prom that
> cleverly enabled all the FP registers for me...
>
>             Kevin K.

Kevin,

    Your/Flo's/Ralf's thread in the MIPS Linux archives from last January was
what clued me into the ST0_FR setting in the first place.  Ralf gave arguments
why he wouldn't take your change at that time, which is why that line isn't in
the 2.4.x kernel.

    Steve

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