| To: | jsun@mvista.com (Jun Sun) |
|---|---|
| Subject: | Re: broken RM7000 in CVS ... |
| From: | Alan Cox <alan@lxorguk.ukuu.org.uk> |
| Date: | Fri, 12 Jan 2001 23:48:50 +0000 (GMT) |
| Cc: | carlson@sibyte.com, linux-mips@oss.sgi.com |
| In-reply-to: | <3A5F68CB.78D693B3@mvista.com> from "Jun Sun" at Jan 12, 2001 12:27:55 PM |
| Sender: | owner-linux-mips@oss.sgi.com |
> My understanding is that we don't have a standard way to probe for external > cache (L2 or L3). So this problem is not only for MIPS32 cpus. Cache is very arch specific. You don't want to know how you find L2 cache on a MacII for example 8) |
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