Justin Carlson wrote:
> Looking at the existing clear_page implementations for r4xx0, rm7k, and mips32
> in the mips/ tree, I see everyone issuing cache op 0xd for the address range
> the page being cleared.
> I'm wondering what the purpose is of these cache flushes...given a physically
> tagged dcache, my understanding of the semantics of clear_page are that it
> zeros the page, in which case the cache ops are pointless overhead.
> Especially in the mips32 case, which uses cache op 0xd, which is undefined
> implementation dependent according to my mips32 spec.
You are absolutely right, it is implementation dependent.
I just tend to use the mips32 implementation for my R4000s as well, and here as
Ralf mention it is performance improving.
Actually we have included a CPU option flag (MIPS_CPU_CACHE_CDEX), what tells us
if the CPU has the Create_Dirty_Exclusive CACHE operation available.
So we should probably use it, now it is here :-)
> Am I missing something here?
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