On Tue, Jan 09, 2001 at 05:48:11PM -0800, Justin Carlson wrote:
> Looking at the existing clear_page implementations for r4xx0, rm7k, and mips32
> in the mips/ tree, I see everyone issuing cache op 0xd for the address range
> the page being cleared.
> I'm wondering what the purpose is of these cache flushes...given a physically
> tagged dcache, my understanding of the semantics of clear_page are that it
> zeros the page, in which case the cache ops are pointless overhead.
> Especially in the mips32 case, which uses cache op 0xd, which is undefined
> implementation dependent according to my mips32 spec.
The idea is to avoid unnecessary memory reads - all the read data would
be overwritten anyway. The last time I benchmarked this routine on some
machine it made a difference of about 4000 vs. 2500 c0_count cycles. I
think that was on a R4600 RM200.