Exactly that I need, but I don't think it is implemented properly for mips.
It simply flushes all the caches, no matter what options you gives it.
/Carsten
Ralf Baechle wrote:
> On Mon, Jan 08, 2001 at 05:23:20PM +0100, Carsten Langgaard wrote:
>
> > What we need is a mechanism to partial invalidate the I-cache and a
> > mechanism
> > to write-back and/or invalidate the D-cache.
>
> There is this nice little man page which should even be installed on your
> Linux/Inhell box:
>
> CACHEFLUSH(2) Linux Programmer's Manual CACHEFLUSH(2)
>
> NAME
> cacheflush - flush contents of instruction and/or data
> cache
>
> SYNOPSIS
> #include <asm/cachectl.h>
>
> int cacheflush(char *addr, int nbytes, int cache);
>
> DESCRIPTION
> cacheflush flushes contents of indicated cache(s) for user
> addresses in the range addr to (addr+nbytes-1). Cache may
> be one of:
>
> ICACHE Flush the instruction cache.
>
> DCACHE Write back to memory and invalidate the affected
> valid cache lines.
>
> BCACHE Same as (ICACHE|DCACHE).
>
> RETURN VALUE
> cacheflush returns 0 on success or -1 on error. If errors
> are detected, errno will indicate the error.
>
> ERRORS
> EINVAL cache parameter is not one of ICACHE, DCACHE, or
> BCACHE.
>
> EFAULT Some or all of the address range addr to
> (addr+nbytes-1) is not accessible.
>
> BUGS
> The current implementation ignores the addr and nbytes
> parameters. Therefore always the whole cache is flushed.
>
> NOTE
> This system call is only available on MIPS based systems.
> It should not be used in programs intended to be portable.
>
> Linux 2.0.32 27 June 95 1
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