On Sat, 18 Nov 2000, Ralf Baechle wrote:
> > Log message:
> > New configuration option CONFIG_MIPS_UNCACHED. Not yet selectable due
> > to the manuals documenting ll/sc operation as undefined for uncached
> > memory.
> > Wouldn't it make sense then to disable CONFIG_CPU_HAS_LLSC as well?
> I'm waiting for authoritative answer from silicon guys before I deciede.
> In the past I ran kernel entirely uncached and they seemed to work even
> though the documentation made me assume the opposite.
I'd be very, VERY surprised if ll-sc were guaranteed to work in uncached space,
for any implementation. It certainly wouldn't in the SB1.
The easiest way to implement the ops on a cache-coherent system is to keep track
of whether or not you've lost a line in the cache between the ll and the sc.
Then, in the sc, you convert the line to dirty (if necessary), do the write,
and go on your merry way. Or, if you've lost the line at some point between the
ll and the sc, you fail the sc.
I've never heard of anyone implementing it in a significantly different manner,
on MIPS or on Alpha. To keep track of who's written what in an uncached space
would be nightmarish at best, in hardware.
Doesn't mean someone hasn't done it, but it would certainly be news to me.