| To: | "Kevin D. Kissell" <kevink@mips.com> |
|---|---|
| Subject: | Re: PROPOSAL : multi-way cache support in Linux/MIPS |
| From: | Jun Sun <jsun@mvista.com> |
| Date: | Wed, 02 Aug 2000 16:10:43 -0700 |
| Cc: | linux@cthulhu.engr.sgi.com, linux-mips@fnet.fr, ralf@oss.sgi.com |
| References: | <027f01bffcd3$3279b800$0deca8c0@Ulysses> |
| Sender: | owner-linux-mips@oss.sgi.com |
That certainly helps a lot. Thanks, Kevin. "Kevin D. Kissell" wrote: ... > > So, to get back to Linux, a MIPS32 part can *almost* > run the standard MIPS R4K kernel. Almost. What had Still one more question. If I understand correctly, the 4Km and 4Kp are MIPS32 CPUs. However, they don't have TLBs. Right? Without TLBs, I don't suppose Linux will run ... Jun |
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