| To: | "Kevin D. Kissell" <kevink@mips.com> |
|---|---|
| Subject: | Re: PROPOSAL : multi-way cache support in Linux/MIPS |
| From: | Jun Sun <jsun@mvista.com> |
| Date: | Wed, 02 Aug 2000 14:50:19 -0700 |
| Cc: | linux@cthulhu.engr.sgi.com, linux-mips@fnet.fr, ralf@oss.sgi.com |
| References: | <01ac01bffcad$a767c240$0deca8c0@Ulysses> |
| Sender: | owner-linux-mips@oss.sgi.com |
"Kevin D. Kissell" wrote: > It's possible to write code that is compatible with an R4000 but > not MIPS32, and vice versa, but they are 99% identical. > Kevin, Is that possible you can list the 1% difference here? I have always been confused by MIPS32/MIPS64 vs R3000/R4000/etc. (And on top of it, there is also MIPS I, II, III, IV, etc...). I am sure I am not the only one. If you can give an pointer that will clarify names, that would be good too. Jun |
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