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Re: R5000 support (specifically two-way set-associative cache...)

To: Dominic Sweetman <dom@algor.co.uk>
Subject: Re: R5000 support (specifically two-way set-associative cache...)
From: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
Date: Tue, 20 Jun 2000 12:02:41 +0200 (MET DST)
Cc: Jun Sun <jsun@mvista.com>, linux-mips@fnet.fr, linux@cthulhu.engr.sgi.com, nigel@algor.co.uk
In-reply-to: <200006200947.KAA08574@mudchute.algor.co.uk>
Sender: owner-linux-mips@oss.sgi.com
On Tue, 20 Jun 2000, Dominic Sweetman wrote:
> Jun Sun (jsun@mvista.com) writes:
> > 3. I understand Geert has a port to DDB5074 (with Vr5000 CPU).  Is this
> > port completed (including all interrupts, PCI related stuff).  Is this
> > port reliable?
> 
> A note on this and Geert's response: early Vrc5074 system controller
> chips had lots of bugs, with some particularly nasty ones hitting PCI
> transfers with external initiators (like the ethernet chip).  Anyone
> pioneering Linux on it should check carefully with NEC about the
> status of their particular revision.

Since the same boards are fine running Aperios, I assume we don't have the
early ones.

Gr{oetje,eeting}s,

                                                Geert

--
Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE)
Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55
Voice +32-2-7248638 Fax +32-2-7262686 ---------------- B-1130 Brussels, Belgium


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