| To: | Jun Sun <jsun@mvista.com> |
|---|---|
| Subject: | Re: R5000 support (specifically two-way set-associative cache...) |
| From: | Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> |
| Date: | Tue, 20 Jun 2000 10:44:28 +0200 (MET DST) |
| Cc: | linux-mips@fnet.fr, linux@cthulhu.engr.sgi.com |
| In-reply-to: | <394EA5A0.B882F66A@mvista.com> |
| Sender: | owner-linux-mips@oss.sgi.com |
On Mon, 19 Jun 2000, Jun Sun wrote:
> 3. I understand Geert has a port to DDB5074 (with Vr5000 CPU). Is this
> port completed (including all interrupts, PCI related stuff). Is this
> port reliable?
- Interrupts (both Nile4, PCI and ISA) are working.
- PCI bus mastering doesn't work yet (I guess so because the Tulip driver
doesn't work yet).
- About reliability: I see random crashes, but they seem to happen on other
platforms as well.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE)
Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55
Voice +32-2-7248638 Fax +32-2-7262686 ---------------- B-1130 Brussels, Belgium
|
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | Re: Icache coherency problems for R3400, DS5000/240, Ralf Baechle |
|---|---|
| Next by Date: | Kernel image is not executable?, Jan-Benedict Glaw |
| Previous by Thread: | R5000 support (specifically two-way set-associative cache...), Jun Sun |
| Next by Thread: | Re: R5000 support (specifically two-way set-associative cache...), Dominic Sweetman |
| Indexes: | [Date] [Thread] [Top] [All Lists] |