Re: Here's another patch

["Andrew R. Baker" <andrewb@uab.edu>]

On Fri, 25 Jun 1999, Andrew R. Baker wrote:
> 
> Could some of y'all try it out and make sure it doesn't break things?
> It is needed before we can support the second SCSI controller on the
> Indigo2.

And here is the message again, this time with the patch attached :)

-Andrew

--- sgiwd93.c.orig      Fri Jun 25 15:31:55 1999
+++ sgiwd93.c   Fri Jun 25 15:33:43 1999
@@ -70,7 +70,7 @@
        unsigned long flags;
 
        spin_lock_irqsave(&io_request_lock, flags);
-       wd33c93_intr(sgiwd93_host);
+       wd33c93_intr((struct Scsi_Host *) dev_id);
        spin_unlock_irqrestore(&io_request_lock, flags);
 }
 
@@ -236,9 +236,9 @@
 #endif
 }
 
-void sgiwd93_reset(void)
+void sgiwd93_reset(uchar *base)
 {
-       struct hpc3_scsiregs *hregs = &hpc3c0->scsi_chan0;
+       struct hpc3_scsiregs *hregs = (struct hpc3_scsiregs *) base;
 
        hregs->ctrl = HPC3_SCTRL_CRESET;
        udelay (50);
--- wd33c93.c.orig      Fri Jun 25 15:29:25 1999
+++ wd33c93.c   Fri Jun 25 15:30:22 1999
@@ -1362,7 +1362,7 @@
 #ifdef CONFIG_SGI
 {
 int busycount = 0;
-extern void sgiwd93_reset(void);
+extern void sgiwd93_reset(uchar);
 
    /* wait 'til the chip gets some time for us */
    while (READ_AUX_STAT() & ASR_BSY && busycount++ < 100)
@@ -1376,7 +1376,7 @@
     */
    /* still busy ? */
    if (READ_AUX_STAT() & ASR_BSY)
-       sgiwd93_reset(); /* yeah, give it the hard one */
+       sgiwd93_reset(instance->base); /* yeah, give it the hard one */
 }
 #endif