On Sun, Sep 06, 1998 at 11:37:15AM +0200, Thomas Bogendoerfer wrote:
> On Sun, Sep 06, 1998 at 10:54:52AM +0200, Ulf Carlsson wrote:
> > On Sat, 5 Sep 1998, Thomas Bogendoerfer wrote:
> > Which processor do you have, e.g. which dma_cache_wback_inv procedure are
> > you making use of?
> it's a R4600 with second level cache. So it should use
> r4k_dma_cache_wback_inv_sc(), too.
The R4600 _CPU_ doesn't support an l2 cache therefore the *_pc variants are
being used. The l2 cache on the indy CPU module is handled by the logic on
the CPU _module_; the code to deal with that is being called by the *_pc
functions and is in arch/mips/sgi/kernel/indy_sc.c.