On Wed, 2 Sep 1998 email@example.com wrote:
> As I recently told you on IRC - the patch as you've posted it is not
> correct. It will misstreat VCEI exceptions.
My idea is based on that we write the wrong cache line back, and that's
why we receive the invalid instruction errors.
Maybe this is foolish, but anyway: If we have data from main memory cached
in the secondary cache and then overwrite that data line in main memory
with an instruction line and cache the instruction. We receive a VCEI when
we try to access the cached line, and our handler writes the data back
instead of the intstruction and causes the invalid instructions. Well,
this is the only idea I have at the moment.