On Fri, Jul 17, 1998 at 06:58:07PM -0700, Greg Chesson wrote:
> I think everyone is suggesting the same general path, and I'm gratified
> to know that the buddy system code anticipates non-contiguous physical
> I think you'd want to extend the design limit (XKSEG0) beyond 1 TB
> to handle the next rev of silicon. I'd suggest 64 TB (48 bits) as
> the appropriate goal.
As far as the maximum amount of RAM goes, no problem. The only assumption
which I make is that the entire available memory is visible in XKSEG0,
whatever it's size is. That means the actual design limit is the maximum
possible size of XKSEG0 for the MIPS 64bit architecture which is 2^62 bytes.
I assume this also means the size limit of the XKUSEG has been extended
to 48 bits. There we actually a somewhat more limiting design limit since
we only have three level page tables for 64 bit architectures which limits
us to a maximum mappable size of
PAGE_SIZE * (PAGE_SIZE / sizeof(pte_t)) ^ 3
which for PAGE_SIZE = 4 kbytes and sizeof(pte_t) = 8 bytes is 512gb.
(And actually things are somewhat more complex.)