On Thu, Feb 26, 1998 at 09:34:05AM -0800, William J. Earl wrote:
> for cache size. The R4600 and R5000 are also similar, but with
> a very different cache organization from the R4000 and R4400. Various
> revision of the processors (and more than one revision was shipped
> for each processor) have different errata, so the kernel must work around
> various processor errata according to the processor type and revision.
In case of the R4000 we still have some work to do with respect to the
> As I understand it, the currently checked-in source must be recompiled
> to provide R4600/R5000 PC and SC versions for Indy, and those versions
> may not be fully tested on all R4000 and R4400 revisions. In the not
> distant future, a single kernel will likely support all the processors,
> as does the IRIX kernel, but that is more work than just selecting
> the processor type at compile time.
The code in the CVS archive is plain buggy for certain configurations.
Given the number of possible configurations possible everything else but
a single kernel binary would be braindead. Especially because the price
we have to pay for a single Indy binary isn't that high.