Re: Indy crash during bootup

["William J. Earl" <wje@fir.engr.sgi.com>]

ralf@uni-koblenz.de writes:
...
 > William: would an attempt to manipulate the R4600 second level cache on
 > a Indy without such a cache result in a bus error interrupt?
...
     Yes.  The memory address of the cache controller will not exist.  Avoid
referencing it when the cache is not configured.  If the kernel is not
reading the cache configuration from the CPU module EEPROM, then it should
test for the existence of the cache controller by referencing it within
some sort of exception trap which returns control gracefully with an error
indication if a bus error occurs.  Note that you might get a bus error exception
(on a read) rather than a bus error interrupt (on a write).