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Re: Magnum 4000 caches

To: wje@fir.engr.sgi.com (William J. Earl)
Subject: Re: Magnum 4000 caches
From: Ralf Baechle <ralf@mailhost.uni-koblenz.de>
Date: Thu, 23 Oct 1997 19:56:06 +0200 (MEST)
Cc: ralf@mailhost.uni-koblenz.de, linux@cthulhu.engr.sgi.com
In-reply-to: <199710231721.KAA10794@fir.engr.sgi.com> from "William J. Earl" at Oct 23, 97 10:21:41 am
Sender: owner-linux@cthulhu.engr.sgi.com
>      It turned out that, at least for some workloads, the 4000PC
> worked better that way.  (If I remember correctly, a 32-byte linesize
> is better for the icache, since a 4-instruction basic block is
> unusual.)  However, not all boxes use the same linesize values,
> because there were hardware bugs with at least some of the memory
> controllers which were affected by the choice of linesize.  I don't
> remember the details anymore, although I might find them in my mail
> archivies.  I have a 4000PC system (32-byte I, 16-byte D, MCT version 3)
> and two 4000SC systems (16-byte I, D, and S, MCT version 2) still online.
> I think that MCT version 2 would not support a 32-byte line.

So as the easy solution, as I understand things we should be safe by
just leaving the linesize as the firmware chooses them for us Magnums?  
I actually intended to experiment with the linesize on R4k but as
things look now this isn't a good thing.

Btw, seems we'll get an interesting new target for Linux.  It's currently
ftp.uni-erlangen.de and one of the admins who might do the job, a Linux/68k
hacker told me it's a 3 x R6000 box with 256mb of RAM currently running
ES/IX something like that ...

  Ralf

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