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Re: [patch] linux: declance multicast filter fixes

To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>, Dave Airlie <airlied@csn.ul.ie>
Subject: Re: [patch] linux: declance multicast filter fixes
From: Harald Koerfgen <hkoerfg@web.de>
Date: Wed, 27 Mar 2002 22:20:46 +0100
Cc: Ralf Baechle <ralf@uni-koblenz.de>, linux-mips@fnet.fr, linux-mips@oss.sgi.com
In-reply-to: <Pine.GSO.3.96.1020325123322.4605A-100000@delta.ds2.pg.gda.pl>
Organization: none to speak of
References: <Pine.GSO.3.96.1020325123322.4605A-100000@delta.ds2.pg.gda.pl>
Sender: hkoerfg@web.de
Hi,

On Monday 25 March 2002 12:40, Maciej W. Rozycki wrote:
>  Well, the core seems to be already separated -- see drivers/net/7990.c.
> I haven't yet checked how suitable it is and many front-end drivers use it
> already.
>
>  For the I/O ASIC front-end I'm going to check if the ASIC is capable of
> mapping the LANCE more sensibly before starting any further work.  The
> current configuration is a major loss, doubling the CPU's work and I can't
> see any reasonable explanation for such a setup.

It's been quite some time since I have hacked the declance driver and I don't 
remember all the details, so take the following with a grain of salt.

The 7990 is basically a 16-bit chip in a 32-bit environment, and, AFAIR, uses 
two different DMA modes to access host memory. One is a 16-bit word-by-word 
access for the ring descriptors and the other is 8 16-bit-words-bursts for 
accessing the ring buffers themselves, where the LANCE only generates one 
target address per burst.

The IOASIC is, just as the CPU, only capable of doing 32-bit transfers 
to/from memory. So 16-bit LANCE accesses are translated into 32-bit IOASIC 
accesses but a part of the DMA target addresses are generated by the LANCE.

This leads to a 16-bit -> 32-bit mapping for the ring descriptors and a 
8*16-bit -> 8*32-bit mapping for ring buffers. Very efficient :-(.

Greetings,
Harald

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