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Re: TLB exception

To: Rabeeh Khoury <>
Subject: Re: TLB exception
From: Ralf Baechle <>
Date: Mon, 5 Jun 2000 21:14:11 +0200
Cc: "" <>
In-reply-to: <>; from on Mon, Jun 05, 2000 at 03:55:51PM -0400
References: <>
On Mon, Jun 05, 2000 at 03:55:51PM -0400, Rabeeh Khoury wrote:

> I'v added a code to debug the TLB misses in my kernel (2.2)
> I'm running QED RM5271 in big mips mode ; I'v added the following code :
>     8004de54:   3c010300        lui     $at,0x300
>     8004de58:   ac200000        sw      $zero,0($at)
> which simply writes zero to virtual address 0x03000000, this code is
> invoked in kernel mode in kernel space and tries to write to user space.
> after this I get a TLB exception with an error TLBL (TLB miss because of
> load or instruction fetch) !!!!!!!!!!!!!!!
> instead of TLBS.

Do you observe this tlbl exception code in or via the general exception
vector handler at 0x80000180?  If so you're taking a exception within
the other exception handler at 0x80000000.  There are special rules for
this nested exception that is the EPC and BadVAddr registers will keep
their old values.

> the CP0_STATUS = 00800008
> p.s. I have also strange values in the BADVADDR and CONEXT.

What is CONEXT?

> can any one speculate what is the problem ?
> do I need to do any thing special to access user space in kernel mode ?

There is nothing obviously missing.


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