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Re: VC exceptions

To: Dominic Sweetman <dom@algor.co.uk>
Subject: Re: VC exceptions
From: Ralf Baechle <ralf@oss.sgi.com>
Date: Sun, 30 Apr 2000 14:24:42 +0200
Cc: nick@ns.snowman.net, Florian Lohoff <flo@rfc822.org>, linux@cthulhu.engr.sgi.com, linux-mips@fnet.fr, linux-mips@vger.rutgers.edu
In-reply-to: <200004301056.LAA12672@mudchute.algor.co.uk>; from dom@algor.co.uk on Sun, Apr 30, 2000 at 11:56:03AM +0100
References: <20000429071807.A491@uni-koblenz.de> <Pine.LNX.4.05.10004291833360.3830-100000@ns.snowman.net> <20000430004557.A1972@uni-koblenz.de> <200004301056.LAA12672@mudchute.algor.co.uk>
On Sun, Apr 30, 2000 at 11:56:03AM +0100, Dominic Sweetman wrote:

> So the R10000 was desperately complicated, and the RM7000 is simple
> but has onchip secondary cache.  At the same clock rate, the R10000 is
> going to be much faster (and use much more power, and cost much more
> to build into a system).  I doubt if even the just-announced 400Mhz
> RM7000 is really faster overall than a 180MHz R10000 - but Ralf might
> have access to some measurements.

I don't have hard numbers nor hardware, so I had to rely on the `hard facts'
that others had given to me.

In any case, the race stays unequal since the newest child of the R10000
family, the 400MHz R12000, will also enter the game soon if it isn't even
already shipping.

  Ralf

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