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Re: Current cvs kernerl fails to compile for decstation

To: Harald Koerfgen <Harald.Koerfgen@home.ivm.de>
Subject: Re: Current cvs kernerl fails to compile for decstation
From: Matthias Heidbrink <mh@cs.tu-berlin.de>
Date: Sat, 19 Feb 2000 15:03:16 +0100 (MET)
Cc: linux-mips@fnet.fr
In-reply-to: <XFMail.000219132654.Harald.Koerfgen@home.ivm.de> from Harald Koerfgen at "Feb 19, 2000 01:26:54 pm"
Hallo Harald,

> > It's 64 because it's not possible to program the DECstation RTC to 100Hz
> > or 1024Hz.
> 
> Well, 1024 Hz would be possible but certainly total overkill for a DECstation
> 2100 with a 12.5 Mhz R2000 :-)

I remember that problems with these "odd" 64 Hz have been discussed on this 
list several times before. Maybe it would not be such a bad idea to go to a
"standard" value.                                                          

How expensive is the interrupt handler for the timer, I mean, how large would
the loss in performance be when going to 1024 Hz?                   

Or would it make sense to modify the clock setup and interrupt handler to run
the clock with 1024 Hz, but run the complete timer interrupt handling code
only every 10 ms/at 100Hz (in average)?                               

I used this method some years ago under DOS because my application required
a fine timer resolution and DOS required a timer interrupt every 55ms.
On a 386-33 (which should be roughly equivalent in performance to an old MIPS
CPU with a bit less than half of the clock speed) it showed no remarkable loss
in performence. Even quite the opposite because the application that had some
delays in it ran smoother because of the finer granularity of the delays.

Ciao, Matthias
-- 
Matthias Heidbrink     E-Mail: 
Bundesratufer 12       Matthias_Heidbrink@b.maus.de  
10555 Berlin, Germany  mh@cs.tu-berlin.de         
Tel. +49-30-8536361    mh@carano.de   (at work; http://www.carano.com)

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