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Re: CVS 2.3.10 + framebuffer + keyboard, DS5000/200

Subject: Re: CVS 2.3.10 + framebuffer + keyboard, DS5000/200
From: Ryan Rafferty <rraffer1@osf1.gmu.edu>
Date: Tue, 5 Oct 1999 22:45:10 -0400 (EDT)
Cc: linux@engr.sgi.com, linux-mips@fnet.fr, linux-mips@vger.rutgers.edu
In-reply-to: <19991006015410.A19750@uni-koblenz.de>
On Wed, 6 Oct 1999, Ralf Baechle wrote:

> 2.3.10 is working on the Indy.  I suppose the problem you're observing has
> hit me on the Indy when I upgraded it to 2.3.11.  I've traced it to some
> inconsistence between the page tables in memory and the TLB which
> results in recursive page faults which lockup the process in do_pagefault()
> in fault.c.  Really hard to trace and hits both MIPS32 and MIPS64 ...

It seems in my opinion that the programmer-visible TLB cache in the R4k
series was a "feature" that has caused more difficulty for OS programmers
using the MIPS architecture than anything else that I can think of; do any
other architectures currently employ this type of cache? Or is there a
solid advantage to making the TLB visible (as opposed to the transparent
nature of caches on x86, etc)?

I think I remember that some members of the R4xxx family eschewed the
original TLB scheme of the R4000 et. al.

>   Ralf

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