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RE: Booting Linux on Vadem Clio

To: "'Bradley D. LaRonde'" <brad@ltc.com>, <linuxce-devel@linuxce.org>, <linux-mips@fnet.fr>
Subject: RE: Booting Linux on Vadem Clio
From: "Mike Klar" <wyldfier@iname.com>
Date: Mon, 19 Jul 1999 16:28:55 -0400
Importance: Normal
In-reply-to: <003b01bed20e$87118500$b1119526@tecra.ltc.com>
Bradley D. LaRonde wrote:

> So I tried disabling interrupts.  Guess what?  It now calls
> the TLB Refill
> vector.  Hmmm...  So now I have to handle that exception.
>
> This is odd because how am I supposed to handle this stuff
> when the kernel
> hasn't been started, and init_trap hasn't been called?

The solution is to not cause any exceptions until you're ready to handle
them.  This means no loads or stores in TLB-mapped segments, no reserved ops
(which shouldn't happen in kernel code, anyway), no interrupts, and be
careful about the cache.

Something else to be careful about are the Coprocessor 0 hazards, which are
different on the Vr41xx CPUs than the R4000.  Those won't necessarily cause
an exception, but they will behave in an undefined manner (at the very
least, the CP0 instructions won't do what you want them to do) if violated.
Of course, you have to worry about these even after exceptions are
initialized.

> Warner, you mentioned I might be getting a trap when I jal.
> According to
> the docs, jal will not generate any exceptions.  So how can I
> get a TLB
> refill exception from it?  Am I reading the docs wrong.

The jal instruction itself won't cause an exception.  Even if it's to an
unaligned address, the address error exception won't occur until the
instruction fetch is attempted.  That instruction fetch, on the other hand,
could cause any of several different exceptions, but as long as you're jump
destination is in kseg0, 32-bit aligned, and the cache isn't messed up, it
should be OK.

Mike K.

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