On 01-Jul-99 William J. Earl wrote:
> Ralf Baechle writes:
> > Actually we're pretty generous with our cacheflushed, we flush more than we
> > should.
> Yes, but it is not clear that all paths are covered.
> > > Also, the flush_page_to_ram() slows down processing on
> > > machines which physical cache tags, for cases where the virtual
> > > index used by the kernel and the virtual index used by the application
> > > are the same. It should have an extra argument of the intended user
> > > address, so that it can decide whether to flush or not on architectures
> > > such as MIPS.
> > For R3000 and R6000 flush_page_to_ram() is a no-op, see
> > and arch/mips/mm/r6000.c.
> Yes, since those have write-through caches. The icache
> invalidation is still an issue, if there are any paths, such as
> try_to_swap_out(), which break a virtual-to-physical mapping without
> flushing the icache.
A good point. That seems to be exactly the problem R3k DECstations have.
are dying with SIGABRT SIGBUS or SIGSEGV shortly after swapping occurs. Trying
hunt that down I removed all optimisations from the cacheflushing routines and
replaced them with flush_cache_all() but that didn't help.