> Hi Ralf,
> yes I will provide the context diff (-urN), but that won't be before
Paul, any comments? Ok to apply this patch?
> Just a short question, where do i find the CPU detection routine that you
Scattered bits through arch/mips/kernel/ and arch/mips/mm/ in 220.127.116.11.
The older kernels rely on the CPU detection being done by Milo. This sames
some memory. It's cleaner to keep it in the kernel and also easier to
maintain that a dozen types of bootloaders, though. With the nice
mechanisms ELF offers us we can get the memory back, also, so I'll put
your CPU detection code into the kernel; it's just needs to be taught about
the newer MIPS iron from R4400 on.
Just saw that one in your patch:
> * Where is a simple rfe expected to return to??? HK
> * FIXME: what about the BD flag in the cause register?
> #define ERET \
> mfc0 k0,CP0_EPC; \
> nop; \
> j k0; \
You don't need to care about handling of branch delay slots. The only
exceptions where one really needs to care about branch delay slots are
synchronous exceptions like address errors (due to missalignment),
syscalls (This case is a no-no by definition), traps, overflow etc.
You don't need to care about this; the generic parts of the kernel
handle this for you.