Re: Cascade interrupt

[Warner Losh <imp@village.org>]

: PS: Rule of thumb for MIPS programmers:  If it doesn't work blame the
:     caches ;-)

Wonder if that is my floppy drive problem as well :-) :-) :-)

Warner

P.S.  I have my ISA (well EISA) buss mapped in to an address range,
but the TLB entry says that it is non-cachable.  Would that still
cause problems?  Or is that data that is passed back a DMA thing and I
need to be careful about my caches...