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Re: Cascade interrupt

To: linux-mips@fnet.fr
Subject: Re: Cascade interrupt
From: Warner Losh <imp@village.org>
Date: Mon, 20 May 1996 23:18:23 -0600
In-reply-to: Your message of Tue, 21 May 1996 04:26:48 +0200
: while playing around with the RM200 I had to find out that some of the
: "RISC PC" class machines use the PICs in cascade mode while others don't.
: This is completly opposed the the standard Intel PC design where the PICs
: are always in cascade mode.  So just in case if you wonder why your
: machine never gets high interrupts (>= 8) check this.

Hmmmm.  Interesting.  Was it here that I reported that I never got
high interrupts.  Just grumpy low ones that wish they could aford the
good stuff to get high?

If the PICs are in cascade mode, what mode are they in?  And should I
force them to be in cascade mode?  Looks like it is time to get a good
data sheet on the PICs.  BTW, anybody know a good source for my opti
chip set data sheets?  After seeing the one for the Dallas Semi DS1488
in my machine, I want them for more of my chips.  That is assuming
that Alta-vista can't help me....

Warner

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