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Re: m700-10 success

To: linux-mips@fnet.fr
Subject: Re: m700-10 success
From: Dominic Sweetman <dom@algor.co.uk>
Date: Thu, 9 May 96 10:04:31 +0100
In-reply-to: <199605090835.KAA30761@pallas.spacetec.no>
References: <arnim@digitech.co.nz> <199605090835.KAA30761@pallas.spacetec.no>
> We should avoid too much on this I think, however I agree with the
> 'le sucks' opinion.

Scientific manner, chaps!  LE and BE are two different *arbitrary*
choices about how you represent bigger-than-byte integers in a
byte-organised memory.  Neither one is right or wrong; I find LE
easier because I began my computing career on DEC and got into
low-level code on Intel CPUs.  Tor finds BE natural, I suspect,
because he started off on Motorola?

Arguably DEC and IBM (whose bit numbers increase the same way as their
byte addresses) are righter than Motorola (whose bit numbers go down
as byte addresses go up).  It would be nice if everyone did the same,
of course - one less thing to go wrong.

MIPS does both because the founders all used BE Sun workstations, and
made the Stanford MIPS that way, but their first customer (Prime) was
LE.

> And people get so confused when they try to convert between BE and
> LE, because they don't realise that it applies to *integers* stored
> into memory only, and not byte sequences in general (a struct with
> bitfields on a big endian host will usually not have to be
> byte-swapped before it's inter- changed with a LE host, for
> example).

There are two different problems.  The software problem (as above)
afflicts most bigger-than-byte quantities - but it's easy to convert
once you know what the quantities are.  I don't think bitfield structs
are very safe at all; the resulting memory layouts are explicitly
compiler- and architecture-dependent.

But there's a related hardware problem.  Computers are of course wired
up with wider-than-byte buses; on a 32-bit bus you have to decide
which byte lane is used for bytes whose address is 0 mod 4.  Hardware
engineers (bless 'em) just wire bit 0 to bit 0 through to bit 31 to
31.  Do that with a Motorola CPU and a PCI bus, and all the bytes
*will* get scrambled (unix becomes xinu, etc).

> And even LE computers are usually BE inside registers.

There's no byte addresses inside the registers of any machine I can
think of, so there ain't no endianness at all.

> I would really like to switch my Olivetti M700-10 over to big endian
> at some stage, if that's at all technically possible.

Don't even think about it!

PS: the "change endianness in user mode" feature was a late addition
    to the R3000 chip, by disgruntled MIPS engineers who wanted to be
    able to run DECstation binaries on MIPS Unix boxes.  The system
    software to make the hardware feature usable was never included in
    any MIPS OS, and I think has never been used by anyone.

Regards,

Dominic Sweetman                phone: +44 171 700 3301
Algorithmics Ltd                home:  +44 171 226 0032
3 Drayton Park                  fax:   +44 171 700 3400
London N5 1NU                   email: dom@algor.co.uk
ENGLAND.                        www:   http://www.algor.co.uk
                                ftp:   ftp.algor.co.uk

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