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Re: TLB entries

To: linux-mips@fnet.fr
Subject: Re: TLB entries
From: Systemkennung Linux <linux@mailhost.uni-koblenz.de>
Date: Sat, 24 Feb 1996 03:46:27 +0100 (MET)
In-reply-to: <199602231739.KAA12510@rover.village.org> from "Warner Losh" at Feb 23, 96 10:39:19 am
Hi,

> Quick question on TLB entries.
> 
> When loading EntryHi and EntryLo[01], are the PFN numbers shifted to
> reflect the size of the page mask register?
> 
> That is, would the PFN be different if I was creating a 4K page or a
> 16M page with the same base address?
> 
> >From my readings of the MUM, I think the answer is "yes." but wanted
> to make sure.

I'm not shure about how to understand your question; there is however
one example for a working tlb entry != 4k already in the Linux code.
Look in head.S for the map0 table for the Acer or Tyne; these map
the 64k port space to the virtual address 0xe2000000.  Hope this helps.

I think I'm slowly getting the 64bit stuff under control.  More things
than I had originally planed need to be patched, eg vsprintf which
assumed that long is the biggest type to print.

   Ralf

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