> Quick question on TLB entries.
> When loading EntryHi and EntryLo, are the PFN numbers shifted to
> reflect the size of the page mask register?
> That is, would the PFN be different if I was creating a 4K page or a
> 16M page with the same base address?
> >From my readings of the MUM, I think the answer is "yes." but wanted
> to make sure.
I'm not shure about how to understand your question; there is however
one example for a working tlb entry != 4k already in the Linux code.
Look in head.S for the map0 table for the Acer or Tyne; these map
the 64k port space to the virtual address 0xe2000000. Hope this helps.
I think I'm slowly getting the 64bit stuff under control. More things
than I had originally planed need to be patched, eg vsprintf which
assumed that long is the biggest type to print.