: This is exactly what this list is about - porting Linux to MIPS!
: > pointer. I'll have to remember to greb the i386 tree when I have
: > problems :-).
: Not needed - the stuff for other architectures is included in the MIPS
: source tree.
greb == egrep, not grab :-).
: OK, this means that the PC stuff is really what you need.
OK. Actually, there is a FDC and IDE controller built into the
motherboard, but they appear to be unused. I don't know why they are
there, but I have jacks that are labled FDC (with 34 pins) and IDE
(with 40). Neither has ever been used, as far as I know, and there is
a bog standard multi-IO controller. There is also a Bustek ISA SCSI
controller as well.
: If you know about SRAM types - on the Tyne the SRAM is easy to find. If I
: remember right the chip was located near the slots. I however think that
: it is more probably that your board doesn't have a DMA cache.
I suspect that you are correct. I've fired some email off to someone
who in the past has been moderately helpful. What do SRAMs look like?
I have 17 chips on the mb labeled "71256 S24PT <datecode>" that appear
to be the 512k of L2 cache. The only other memory-like thing is a
DS1448 Realtime RAMified, but that might just be the EEPROM... So it
looks like NO.
: it was interrupt #2 on the Tyne. On a Tyne the processor needs to do the
: complete interrupt acknowledge cycle that a i386 does in hardware in
Got it. Glad I have the ISA and EISA MindShare books..
: Hm ... I'll try that at home. Never had that problem before. There are
: still some bugs in GAS but usually only invalid assembler code makes GAS
: dump core.
I think it is something to do with an internal table that is
overflowing when there is an additional level of nesting. Not a huge