| To: | linux-cvs@linux-mips.org |
|---|---|
| Subject: | CVS Update@-mips.org: linux |
| From: | ralf@linux-mips.org |
| Date: | Wed, 13 Aug 2003 23:35:03 +0100 |
| Reply-to: | linux-mips@linux-mips.org |
| Sender: | linux-cvs-bounce@linux-mips.org |
CVSROOT: /home/cvs
Module name: linux
Changes by: ralf@ftp.linux-mips.org 03/08/13 23:35:03
Modified files:
include/asm-mips: r4kcache.h
Log message:
The MIPS32 and MIPS64 specs permit an implementation to directly derive
the cache index bits from the virtual address. This breaks with
tradition set by the R4000. Fix to get 64-bit kernel working on
processors with traditional cacheops again.
|
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | CVS Update@-mips.org: linux, ralf |
|---|---|
| Next by Date: | CVS Update@-mips.org: linux, ralf |
| Previous by Thread: | CVS Update@-mips.org: linux, ralf |
| Next by Thread: | CVS Update@-mips.org: linux, ralf |
| Indexes: | [Date] [Thread] [Top] [All Lists] |