CVSROOT: /home/cvs
Module name: linux
Changes by: ralf@ftp.linux-mips.org 03/04/23 16:13:30
Modified files:
arch/mips/mm : Makefile c-r4k.c loadmmu.c pg-r4k.S
arch/mips64/mm : Makefile c-r4k.c loadmmu.c pg-r4k.c
include/asm-mips: cacheops.h cpu.h processor.h r4kcache.h
include/asm-mips64: cacheops.h cpu.h processor.h r4kcache.h
Removed files:
arch/mips/mm : pg-andes.S
arch/mips64/mm : c-andes.c pg-andes.c
include/asm-mips64: r10kcache.h r10kcacheops.h
Log message:
Finish off c-andes.c and it's criminal gang. Overall this shortens the
kernel by another 166 lines of code, adds untested support for
non-coherent I/O on R10000 (not everything Indigo 2 or O2 R10000 need
yet), support for 32-bit kernels and having support for R4000, R5000
and R10000 support in the same kernel binary. Add support for
multi-way second level caches.
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