CVSROOT: /home/cvs
Module name: linux
Changes by: ths@ftp.linux-mips.org 05/09/01 19:33:58
Modified files:
arch/mips/mm : pg-r4k.c
Log message:
Slightly nicer cpu_is_r4600_* macros.
diff -urN linux/arch/mips/mm/pg-r4k.c linux/arch/mips/mm/pg-r4k.c
--- linux/arch/mips/mm/pg-r4k.c 2005/07/15 15:23:23 1.17
+++ linux/arch/mips/mm/pg-r4k.c 2005/09/01 18:33:58 1.18
@@ -26,6 +26,9 @@
#include <asm/war.h>
#define half_scache_line_size() (cpu_scache_line_size() >> 1)
+#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfff0) == 0x2010)
+#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfff0) == 0x2020)
+
/*
* Maximum sizes:
@@ -198,14 +201,14 @@
if (store_offset & (cpu_dcache_line_size() - 1))
return;
- if (R4600_V1_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2010)) {
+ if (R4600_V1_HIT_CACHEOP_WAR && cpu_is_r4600_v1_x()) {
build_nop();
build_nop();
build_nop();
build_nop();
}
- if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020))
+ if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
build_insn_word(0x8c200000); /* lw $zero, ($at) */
mi.c_format.opcode = cache_op;
@@ -361,7 +364,7 @@
build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear :
0));
- if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020))
+ if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
dest = label();
@@ -417,7 +420,7 @@
build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy :
0));
- if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020))
+ if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
dest = label();
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