| To: | linux-cvs-patches@linux-mips.org |
|---|---|
| Subject: | CVS Update@linux-mips.org: linux |
| From: | ralf@linux-mips.org |
| Date: | Thu, 25 Aug 2005 17:22:16 +0100 |
| Reply-to: | linux-mips@linux-mips.org |
| Sender: | linux-cvs-patches-bounce@linux-mips.org |
CVSROOT: /home/cvs
Module name: linux
Changes by: ralf@ftp.linux-mips.org 05/08/25 17:22:10
Modified files:
include/asm-mips: system.h
Log message:
Sprinkle a few more .set mipsX over xchg to make sure we dont' end up
with 64-bit
instructions on 32-bit processors, they tend to be unhappy about that
kind of
food ;-)
diff -urN linux/include/asm-mips/system.h linux/include/asm-mips/system.h
--- linux/include/asm-mips/system.h 2005/08/19 14:29:15 1.91
+++ linux/include/asm-mips/system.h 2005/08/25 16:22:09 1.92
@@ -302,7 +302,9 @@
" .set mips3 \n"
"1: ll %0, %2 # __cmpxchg_u32 \n"
" bne %0, %z3, 2f \n"
+ " .set mips0 \n"
" move $1, %z4 \n"
+ " .set mips3 \n"
" sc $1, %1 \n"
" beqzl $1, 1b \n"
#ifdef CONFIG_SMP
@@ -320,7 +322,9 @@
" .set mips3 \n"
"1: ll %0, %2 # __cmpxchg_u32 \n"
" bne %0, %z3, 2f \n"
+ " .set mips0 \n"
" move $1, %z4 \n"
+ " .set mips3 \n"
" sc $1, %1 \n"
" beqz $1, 1b \n"
#ifdef CONFIG_SMP
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