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CVS Update@linux-mips.org: linux

To: linux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: linux
From: ralf@linux-mips.org
Date: Wed, 17 Aug 2005 16:07:32 +0100
Reply-to: linux-mips@linux-mips.org
Sender: linux-cvs-patches-bounce@linux-mips.org
CVSROOT:        /home/cvs
Module name:    linux
Changes by:     ralf@ftp.linux-mips.org 05/08/17 16:07:24

Modified files:
        arch/mips      : Kconfig 

Log message:
        Reformat to 80 colums.

diff -urN linux/arch/mips/Kconfig linux/arch/mips/Kconfig
--- linux/arch/mips/Kconfig     2005/08/15 15:16:54     1.166
+++ linux/arch/mips/Kconfig     2005/08/17 15:07:24     1.167
@@ -1339,17 +1339,18 @@
 config CPU_MIPSR2_IRQ_EI
        bool "External interrupt controller mode"
        help
-          Extended interrupt mode takes advantage of an external interrupt 
controller
-          to allow fast dispatching from many possible interrupt sources. Say 
N unless you
-          know that external interrupt support is required.
+          Extended interrupt mode takes advantage of an external interrupt
+          controller to allow fast dispatching from many possible interrupt
+          sources. Say N unless you know that external interrupt support is
+          required.
 
 config CPU_MIPSR2_SRS
        bool "Make shadow set registers available for interrupt handlers"
        depends on CPU_MIPSR2_IRQ_VI || CPU_MIPSR2_IRQ_EI
        help
           Allow the kernel to use shadow register sets for fast interrupts.
-          Interrupt handlers must be specially written to use shadow sets.  
Say N unless you
-          know that shadow register set upport is needed.
+          Interrupt handlers must be specially written to use shadow sets.
+          Say N unless you know that shadow register set upport is needed.
 endmenu
 
 config CPU_HAS_SYNC

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