linux-cvs-patches
[Top] [All Lists]

CVS Update@linux-mips.org: linux

To: linux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: linux
From: ralf@linux-mips.org
Date: Wed, 13 Jul 2005 20:47:34 +0100
Reply-to: linux-mips@linux-mips.org
Sender: linux-cvs-patches-bounce@linux-mips.org
CVSROOT:        /home/cvs
Module name:    linux
Changes by:     ralf@ftp.linux-mips.org 05/07/13 20:47:28

Modified files:
        include/asm-mips: mipsregs.h 

Log message:
        A few more macros to access MIPS R2 architecture registers.

diff -urN linux/include/asm-mips/mipsregs.h linux/include/asm-mips/mipsregs.h
--- linux/include/asm-mips/mipsregs.h   2005/06/21 13:52:33     1.76
+++ linux/include/asm-mips/mipsregs.h   2005/07/13 19:47:28     1.77
@@ -96,6 +96,16 @@
 #define CP0_S1_INTCONTROL $20
 
 /*
+ * Coprocessor 0 Set 2 register names
+ */
+#define CP0_S2_SRSCTL    $12   /* MIPSR2 */
+
+/*
+ * Coprocessor 0 Set 3 register names
+ */
+#define CP0_S3_SRSMAP    $12   /* MIPSR2 */
+
+/*
  *  TX39 Series
  */
 #define CP0_TX39_CACHE $7
@@ -984,6 +994,22 @@
 #define read_c0_errorepc()     __read_ulong_c0_register($30, 0)
 #define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val)
 
+/* MIPSR2 */
+#define read_c0_hwrena()       __read_32bit_c0_register($7,0)
+#define write_c0_hwrena(val)   __write_32bit_c0_register($7, 0, val)
+
+#define read_c0_intctl()       __read_32bit_c0_register($12, 1)
+#define write_c0_intctl(val)   __write_32bit_c0_register($12, 1, val)
+
+#define read_c0_srsctl()       __read_32bit_c0_register($12, 2)
+#define write_c0_srsctl(val)   __write_32bit_c0_register($12, 2, val)
+
+#define read_c0_srsmap()       __read_32bit_c0_register($12, 3)
+#define write_c0_srsmap(val)   __write_32bit_c0_register($12, 3, val)
+
+#define read_c0_ebase()                __read_32bit_c0_register($15,1)
+#define write_c0_ebase(val)    __write_32bit_c0_register($15, 1, val)
+
 /*
  * Macros to access the floating point coprocessor control registers
  */
@@ -1357,6 +1383,8 @@
 __BUILD_SET_C0(cause)
 __BUILD_SET_C0(config)
 __BUILD_SET_C0(intcontrol)
+__BUILD_SET_C0(intctl)
+__BUILD_SET_C0(srsmap)
 
 #endif /* !__ASSEMBLY__ */
 

<Prev in Thread] Current Thread [Next in Thread>