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CVS Update@linux-mips.org: linux

To: linux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: linux
From: ralf@linux-mips.org
Date: Wed, 13 Jul 2005 19:20:40 +0100
Reply-to: linux-mips@linux-mips.org
Sender: linux-cvs-patches-bounce@linux-mips.org
CVSROOT:        /home/cvs
Module name:    linux
Changes by:     ralf@ftp.linux-mips.org 05/07/13 19:20:33

Modified files:
        arch/mips/kernel: irq_cpu.c 

Log message:
        Use an irq_enable_hazard hazard barrier in unmask_mips_irq.  This
        hasn't been an actual bug, so it's more a change to be 100% compliant
        with the requirements of the architecture spec.  Similar fix to
        mask_mips_irq where there was a slightly less theoretical chance of
        getting hit.

diff -urN linux/arch/mips/kernel/irq_cpu.c linux/arch/mips/kernel/irq_cpu.c
--- linux/arch/mips/kernel/irq_cpu.c    2005/02/28 13:39:57     1.10
+++ linux/arch/mips/kernel/irq_cpu.c    2005/07/13 18:20:33     1.11
@@ -40,11 +40,13 @@
 static inline void unmask_mips_irq(unsigned int irq)
 {
        set_c0_status(0x100 << (irq - mips_cpu_irq_base));
+       irq_enable_hazard();
 }
 
 static inline void mask_mips_irq(unsigned int irq)
 {
        clear_c0_status(0x100 << (irq - mips_cpu_irq_base));
+       irq_disable_hazard();
 }
 
 static inline void mips_cpu_irq_enable(unsigned int irq)

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