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CVS Update@linux-mips.org: linux

To: linux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: linux
From: macro@linux-mips.org
Date: Thu, 30 Jun 2005 11:48:54 +0100
Reply-to: linux-mips@linux-mips.org
Sender: linux-cvs-patches-bounce@linux-mips.org
CVSROOT:        /home/cvs
Module name:    linux
Changes by:     macro@ftp.linux-mips.org        05/06/30 11:48:48

Modified files:
        arch/mips/au1000/common: setup.c 
        arch/mips/mm   : ioremap.c 
        include/asm-mips: io.h 
Added files:
        include/asm-mips/mach-au1x00: ioremap.h 
        include/asm-mips/mach-generic: ioremap.h 

Log message:
        Inline ioremap() calls for constant addresses that map to KSEG1.

diff -urN linux/arch/mips/au1000/common/setup.c 
linux/arch/mips/au1000/common/setup.c
--- linux/arch/mips/au1000/common/setup.c       2005/06/21 13:56:30     1.23
+++ linux/arch/mips/au1000/common/setup.c       2005/06/30 10:48:40     1.24
@@ -155,7 +155,7 @@
 
 #if defined(CONFIG_64BIT_PHYS_ADDR)
 /* This routine should be valid for all Au1x based boards */
-phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
 {
        u32 start, end;
 
diff -urN linux/arch/mips/mm/ioremap.c linux/arch/mips/mm/ioremap.c
--- linux/arch/mips/mm/ioremap.c        2005/02/10 12:19:59     1.22
+++ linux/arch/mips/mm/ioremap.c        2005/06/30 10:48:42     1.23
@@ -102,15 +102,6 @@
 }
 
 /*
- * Allow physical addresses to be fixed up to help 36 bit peripherals.
- */
-phys_t __attribute__ ((weak))
-fixup_bigphys_addr(phys_t phys_addr, phys_t size)
-{
-       return phys_addr;
-}
-
-/*
  * Generic mapping function (not visible outside):
  */
 
diff -urN linux/include/asm-mips/io.h linux/include/asm-mips/io.h
--- linux/include/asm-mips/io.h 2005/04/18 14:54:43     1.85
+++ linux/include/asm-mips/io.h 2005/06/30 10:48:45     1.86
@@ -26,6 +26,7 @@
 #include <asm/pgtable-bits.h>
 #include <asm/processor.h>
 
+#include <ioremap.h>
 #include <mangle-port.h>
 
 /*
@@ -208,6 +209,8 @@
 static inline void * __ioremap_mode(phys_t offset, unsigned long size,
        unsigned long flags)
 {
+#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
+
        if (cpu_has_64bit_addresses) {
                u64 base = UNCAC_BASE;
 
@@ -218,9 +221,30 @@
                if (flags == _CACHE_UNCACHED)
                        base = (u64) IO_BASE;
                return (void *) (unsigned long) (base + offset);
+       } else if (__builtin_constant_p(offset) &&
+                  __builtin_constant_p(size) && __builtin_constant_p(flags)) {
+               phys_t phys_addr, last_addr;
+
+               phys_addr = fixup_bigphys_addr(offset, size);
+
+               /* Don't allow wraparound or zero size. */
+               last_addr = phys_addr + size - 1;
+               if (!size || last_addr < phys_addr)
+                       return NULL;
+
+               /*
+                * Map uncached objects in the low 512MB of address
+                * space using KSEG1.
+                */
+               if (__IS_LOW512(phys_addr) && __IS_LOW512(last_addr) &&
+                   flags == _CACHE_UNCACHED)
+                       return (void *)CKSEG1ADDR(phys_addr);
+
        }
 
        return __ioremap(offset, size, flags);
+
+#undef __IS_LOW512
 }
 
 /*
@@ -272,12 +296,16 @@
 
 static inline void iounmap(volatile void __iomem *addr)
 {
-       if (cpu_has_64bit_addresses)
+#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
+
+       if (cpu_has_64bit_addresses ||
+           (__builtin_constant_p(addr) && __IS_KSEG1(addr)))
                return;
 
        __iounmap(addr);
-}
 
+#undef __IS_KSEG1
+}
 
 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq)                    \
                                                                        \
diff -urN linux/include/asm-mips/mach-au1x00/ioremap.h 
linux/include/asm-mips/mach-au1x00/ioremap.h
--- linux/include/asm-mips/mach-au1x00/ioremap.h        1970/01/01 00:00:00
+++ linux/include/asm-mips/mach-au1x00/ioremap.h        2005-06-30 
11:48:46.839826000 +0100     1.1
@@ -0,0 +1,29 @@
+/*
+ *     include/asm-mips/mach-au1x00/ioremap.h
+ *
+ *     This program is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     as published by the Free Software Foundation; either version
+ *     2 of the License, or (at your option) any later version.
+ */
+#ifndef __ASM_MACH_AU1X00_IOREMAP_H
+#define __ASM_MACH_AU1X00_IOREMAP_H
+
+#include <linux/types.h>
+
+#ifndef CONFIG_64BIT_PHYS_ADDR
+static inline phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+{
+       return phys_addr;
+}
+#endif
+
+/*
+ * Allow physical addresses to be fixed up to help 36-bit peripherals.
+ */
+static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+{
+       return __fixup_bigphys_addr(phys_addr, size);
+}
+
+#endif /* __ASM_MACH_AU1X00_IOREMAP_H */
diff -urN linux/include/asm-mips/mach-generic/ioremap.h 
linux/include/asm-mips/mach-generic/ioremap.h
--- linux/include/asm-mips/mach-generic/ioremap.h       1970/01/01 00:00:00
+++ linux/include/asm-mips/mach-generic/ioremap.h       2005-06-30 
11:48:48.389877000 +0100     1.1
@@ -0,0 +1,23 @@
+/*
+ *     include/asm-mips/mach-generic/ioremap.h
+ *
+ *     This program is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     as published by the Free Software Foundation; either version
+ *     2 of the License, or (at your option) any later version.
+ */
+#ifndef __ASM_MACH_GENERIC_IOREMAP_H
+#define __ASM_MACH_GENERIC_IOREMAP_H
+
+#include <linux/types.h>
+
+/*
+ * Allow physical addresses to be fixed up to help peripherals located
+ * outside the low 32-bit range -- generic pass-through version.
+ */
+static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+{
+       return phys_addr;
+}
+
+#endif /* __ASM_MACH_GENERIC_IOREMAP_H */

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