CVSROOT: /home/cvs
Module name: linux
Changes by: ppopov@ftp.linux-mips.org 05/04/07 01:37:19
Modified files:
arch/mips/au1000/common: Tag: linux_2_4 power.c time.c
arch/mips/kernel: Tag: linux_2_4 cpu-probe.c
Log message:
Remove CONFIG_PM dependency from au1x wait in cpu_probe.
Additional work necessary to completely remove that config option.
diff -urN linux/arch/mips/au1000/common/power.c
linux/arch/mips/au1000/common/power.c
--- linux/arch/mips/au1000/common/power.c 2005/01/30 08:01:27 1.2.2.13
+++ linux/arch/mips/au1000/common/power.c 2005/04/07 00:37:19 1.2.2.14
@@ -294,7 +294,6 @@
void *buffer, size_t * len)
{
int retval = 0;
- void au1k_wait(void);
if (!write) {
*len = 0;
@@ -303,7 +302,7 @@
if (retval)
return retval;
suspend_mode = 1;
- au1k_wait();
+
retval = pm_send_all(PM_RESUME, (void *) 0);
}
return retval;
diff -urN linux/arch/mips/au1000/common/time.c
linux/arch/mips/au1000/common/time.c
--- linux/arch/mips/au1000/common/time.c 2005/03/13 07:56:57 1.5.2.20
+++ linux/arch/mips/au1000/common/time.c 2005/04/07 00:37:19 1.5.2.21
@@ -58,7 +58,7 @@
static unsigned long r4k_cur; /* What counter should be at next timer irq */
extern rwlock_t xtime_lock;
int no_au1xxx_32khz;
-void (*au1k_wait_ptr)(void);
+int allow_au1k_wait = 0; /* default off for CP0 Counter */
/* Cycle counter value at the previous timer interrupt.. */
static unsigned int timerhi = 0, timerlo = 0;
@@ -384,7 +384,6 @@
{
unsigned int est_freq;
extern unsigned long (*do_gettimeoffset)(void);
- extern void au1k_wait(void);
printk("calculating r4koff... ");
r4k_offset = cal_r4koff();
@@ -449,7 +448,7 @@
/* We can use the real 'wait' instruction.
*/
- au1k_wait_ptr = au1k_wait;
+ allow_au1k_wait = 1;
}
#else
diff -urN linux/arch/mips/kernel/cpu-probe.c linux/arch/mips/kernel/cpu-probe.c
--- linux/arch/mips/kernel/cpu-probe.c 2005/01/30 08:01:28 1.1.2.38
+++ linux/arch/mips/kernel/cpu-probe.c 2005/04/07 00:37:19 1.1.2.39
@@ -34,15 +34,10 @@
".set\tmips0");
}
-/* The Au1xxx wait is available only if we run CONFIG_PM and
- * the timer setup found we had a 32KHz counter available.
- * There are still problems with functions that may call au1k_wait
- * directly, but that will be discovered pretty quickly.
- */
-extern void (*au1k_wait_ptr)(void);
-void au1k_wait(void)
+/* The Au1xxx wait is available only if using 32khz counter or
+ * external timer source, but specifically not CP0 Counter. */
+static void au1k_wait(void)
{
-#ifdef CONFIG_PM
unsigned long addr;
/* using the wait instruction makes CP0 counter unusable */
__asm__("la %0,au1k_wait\n\t"
@@ -58,10 +53,6 @@
"nop\n\t"
".set mips0\n\t"
: : "r" (addr));
-#else
- __asm__("nop\n\t"
- "nop");
-#endif
}
static inline void check_wait(void)
@@ -100,21 +91,20 @@
cpu_wait = r4k_wait;
printk(" available.\n");
break;
-#ifdef CONFIG_PM
case CPU_AU1000:
case CPU_AU1100:
case CPU_AU1500:
case CPU_AU1550:
case CPU_AU1200:
- if (au1k_wait_ptr != NULL) {
- cpu_wait = au1k_wait_ptr;
+ {
+ extern int allow_au1k_wait; /* au1000/common/time.c */
+ if (allow_au1k_wait) {
+ cpu_wait = au1k_wait;
printk(" available.\n");
- }
- else {
+ } else
printk(" unavailable.\n");
}
break;
-#endif
default:
printk(" unavailable.\n");
break;
|