CVS Update@linux-mips.org: linux

[ralf@linux-mips.org]

CVSROOT:        /home/cvs
Module name:    linux
Changes by:     ralf@ftp.linux-mips.org 05/03/07 18:58:15

Modified files:
        arch/mips/vr41xx: Kconfig 
        arch/mips/vr41xx/common: Makefile icu.c 

Log message:
        VR41xx IRQ updates.

diff -urN linux/arch/mips/vr41xx/Kconfig linux/arch/mips/vr41xx/Kconfig
--- linux/arch/mips/vr41xx/Kconfig      2005/01/30 20:45:36     1.1
+++ linux/arch/mips/vr41xx/Kconfig      2005/03/07 18:58:15     1.2
@@ -97,6 +97,10 @@
        bool "Add PCI control unit support of NEC VR4100 series"
        depends on MACH_VR41XX && PCI
 
+config GPIO_VR41XX
+       bool "Add General-purpose I/O unit support of NEC VR4100 series"
+       depends on MACH_VR41XX
+
 config VRC4171
        tristate "Add NEC VRC4171 companion chip support"
        depends on MACH_VR41XX && ISA
diff -urN linux/arch/mips/vr41xx/common/Makefile 
linux/arch/mips/vr41xx/common/Makefile
--- linux/arch/mips/vr41xx/common/Makefile      2004/02/25 02:15:36     1.15
+++ linux/arch/mips/vr41xx/common/Makefile      2005/03/07 18:58:15     1.16
@@ -2,7 +2,8 @@
 # Makefile for common code of the NEC VR4100 series.
 #
 
-obj-y                          += bcu.o cmu.o giu.o icu.o init.o int-handler.o 
ksyms.o pmu.o rtc.o
+obj-y                          += bcu.o cmu.o icu.o init.o int-handler.o 
ksyms.o pmu.o rtc.o
+obj-$(CONFIG_GPIO_VR41XX)      += giu.o
 obj-$(CONFIG_SERIAL_8250)      += serial.o
 obj-$(CONFIG_VRC4171)          += vrc4171.o
 obj-$(CONFIG_VRC4173)          += vrc4173.o
diff -urN linux/arch/mips/vr41xx/common/icu.c 
linux/arch/mips/vr41xx/common/icu.c
--- linux/arch/mips/vr41xx/common/icu.c 2005/01/15 01:31:06     1.19
+++ linux/arch/mips/vr41xx/common/icu.c 2005/03/07 18:58:15     1.20
@@ -3,8 +3,7 @@
  *
  *  Copyright (C) 2001-2002  MontaVista Software Inc.
  *    Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
- *  Copyright (C) 2003-2004  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
- *  Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
+ *  Copyright (C) 2003-2005  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -29,6 +28,7 @@
  *  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
  *  - Coped with INTASSIGN of NEC VR4133.
  */
+#include <linux/config.h>
 #include <linux/errno.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
@@ -45,8 +45,10 @@
 
 extern asmlinkage void vr41xx_handle_interrupt(void);
 
+#ifdef CONFIG_GPIO_VR41XX
 extern void init_vr41xx_giuint_irq(void);
 extern void giuint_irq_dispatch(struct pt_regs *regs);
+#endif
 
 static uint32_t icu1_base;
 static uint32_t icu2_base;
@@ -672,9 +674,11 @@
                for (i = 0; i < 16; i++) {
                        if (intnum == sysint1_assign[i] &&
                            (mask1 & ((uint16_t)1 << i))) {
+#ifdef CONFIG_GPIO_VR41XX
                                if (i == 8)
                                        giuint_irq_dispatch(regs);
                                else
+#endif
                                        do_IRQ(SYSINT1_IRQ(i), regs);
                                return;
                        }
@@ -698,8 +702,10 @@
 
 /*=======================================================================*/
 
-static int __init vr41xx_icu_init(void)
+static inline void init_vr41xx_icu_irq(void)
 {
+       int i;
+
        switch (current_cpu_data.cputype) {
        case CPU_VR4111:
        case CPU_VR4121:
@@ -723,17 +729,6 @@
        write_icu2(0, MSYSINT2REG);
        write_icu2(0xffff, MGIUINTHREG);
 
-       return 0;
-}
-
-early_initcall(vr41xx_icu_init);
-
-/*=======================================================================*/
-
-static inline void init_vr41xx_icu_irq(void)
-{
-       int i;
-
        for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
                irq_desc[i].handler = &sysint1_irq_type;
 
@@ -751,7 +746,9 @@
 {
        mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
        init_vr41xx_icu_irq();
+#ifdef CONFIG_GPIO_VR41XX
        init_vr41xx_giuint_irq();
+#endif
 
        set_except_vector(0, vr41xx_handle_interrupt);
 }