CVS Update@linux-mips.org: linux

[ralf@linux-mips.org]

CVSROOT:        /home/cvs
Module name:    linux
Changes by:     ralf@ftp.linux-mips.org 05/03/04 15:13:37

Modified files:
        arch/mips/cobalt: setup.c 
        arch/mips/pci  : fixup-cobalt.c ops-gt64111.c 
        drivers/net/tulip: de2104x.c 
        include/asm-mips: serial.h 
        include/asm-mips/cobalt: cobalt.h 

Log message:
        On Qube2700 Galileo hangs if we access slot #6.
        
        Make console serial port initialisation dependent on unit type.

diff -urN linux/arch/mips/cobalt/setup.c linux/arch/mips/cobalt/setup.c
--- linux/arch/mips/cobalt/setup.c      2005/03/04 14:22:08     1.22
+++ linux/arch/mips/cobalt/setup.c      2005/03/04 15:13:37     1.23
@@ -13,6 +13,8 @@
 #include <linux/interrupt.h>
 #include <linux/pci.h>
 #include <linux/init.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
 
 #include <asm/bootinfo.h>
 #include <asm/time.h>
@@ -21,6 +23,7 @@
 #include <asm/processor.h>
 #include <asm/reboot.h>
 #include <asm/gt64120.h>
+#include <asm/serial.h>
 
 #include <asm/cobalt/cobalt.h>
 
@@ -89,6 +92,7 @@
 
 static int __init cobalt_setup(void)
 {
+       static struct uart_port uart;
        unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
        int i;
 
@@ -127,6 +131,21 @@
        register_pci_controller(&cobalt_pci_controller);
 #endif
 
+#ifdef CONFIG_SERIAL_8250
+       if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
+
+               uart.line       = 0;
+               uart.type       = PORT_UNKNOWN;
+               uart.uartclk    = 18432000;
+               uart.irq        = COBALT_SERIAL_IRQ;
+               uart.flags      = STD_COM_FLAGS;
+               uart.iobase     = 0xc800000;
+               uart.iotype     = UPIO_PORT;
+
+               early_serial_setup(&uart);
+       }
+#endif
+
        return 0;
 }
 
diff -urN linux/arch/mips/pci/fixup-cobalt.c linux/arch/mips/pci/fixup-cobalt.c
--- linux/arch/mips/pci/fixup-cobalt.c  2005/03/04 14:22:08     1.9
+++ linux/arch/mips/pci/fixup-cobalt.c  2005/03/04 15:13:37     1.10
@@ -109,6 +109,15 @@
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111,
         qube_raq_galileo_fixup);
 
+static char irq_tab_qube1[] __initdata = {
+  [COBALT_PCICONF_CPU]     = 0,
+  [COBALT_PCICONF_ETH0]    = COBALT_QUBE1_ETH0_IRQ,
+  [COBALT_PCICONF_RAQSCSI] = COBALT_SCSI_IRQ,
+  [COBALT_PCICONF_VIA]     = 0,
+  [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ,
+  [COBALT_PCICONF_ETH1]    = 0
+};
+
 static char irq_tab_cobalt[] __initdata = {
   [COBALT_PCICONF_CPU]     = 0,
   [COBALT_PCICONF_ETH0]    = COBALT_ETH0_IRQ,
@@ -129,6 +138,9 @@
 
 int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 {
+       if (cobalt_board_id < COBALT_BRD_ID_QUBE2)
+               return irq_tab_qube1[slot];
+
        if (cobalt_board_id == COBALT_BRD_ID_RAQ2)
                return irq_tab_raq2[slot];
 
diff -urN linux/arch/mips/pci/ops-gt64111.c linux/arch/mips/pci/ops-gt64111.c
--- linux/arch/mips/pci/ops-gt64111.c   2003/11/13 16:55:07     1.1
+++ linux/arch/mips/pci/ops-gt64111.c   2005/03/04 15:13:37     1.2
@@ -20,13 +20,21 @@
 /*
  * Accessing device 31 hangs the GT64120.  Not sure if this will also hang
  * the GT64111, let's be paranoid for now.
+ *
+ * Accessing device COBALT_PCICONF_CPU hangs early units.
  */
 static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn)
 {
-       if (bus->number == 0 && devfn == PCI_DEVFN(31, 0))
-               return -1;
+       unsigned slot;
 
-       return 0;
+       if (bus->number == 0) {
+
+               slot = PCI_SLOT(devfn);
+               if (slot != COBALT_PCICONF_CPU && slot < 31)
+                       return 0;
+       }
+
+       return -1;
 }
 
 static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn,
diff -urN linux/drivers/net/tulip/de2104x.c linux/drivers/net/tulip/de2104x.c
--- linux/drivers/net/tulip/de2104x.c   2005/02/28 15:45:15     1.25
+++ linux/drivers/net/tulip/de2104x.c   2005/03/04 15:13:37     1.26
@@ -1787,10 +1787,15 @@
        /* DEC now has a specification but early board makers
           just put the address in the first EEPROM locations. */
        /* This does  memcmp(eedata, eedata+16, 8) */
+
+#ifndef CONFIG_MIPS_COBALT
+
        for (i = 0; i < 8; i ++)
                if (ee_data[i] != ee_data[16+i])
                        sa_offset = 20;
 
+#endif
+
        /* store MAC address */
        for (i = 0; i < 6; i ++)
                de->dev->dev_addr[i] = ee_data[i + sa_offset];
diff -urN linux/include/asm-mips/serial.h linux/include/asm-mips/serial.h
--- linux/include/asm-mips/serial.h     2005/02/28 13:35:57     1.62
+++ linux/include/asm-mips/serial.h     2005/03/04 15:13:37     1.63
@@ -78,16 +78,6 @@
 #define JAZZ_SERIAL_PORT_DEFNS
 #endif
 
-#ifdef CONFIG_MIPS_COBALT
-#include <asm/cobalt/cobalt.h>
-#define COBALT_BASE_BAUD  (18432000 / 16)
-#define COBALT_SERIAL_PORT_DEFNS               \
-       /* UART CLK   PORT  IRQ  FLAGS    */            \
-       { 0, COBALT_BASE_BAUD, 0xc800000, COBALT_SERIAL_IRQ, STD_COM_FLAGS },   
/* ttyS0 */
-#else
-#define COBALT_SERIAL_PORT_DEFNS
-#endif
-
 /*
  * Both Galileo boards have the same UART mappings.
  */
@@ -424,7 +414,6 @@
 #endif /* CONFIG_SGI_IP32 */
 
 #define SERIAL_PORT_DFNS                               \
-       COBALT_SERIAL_PORT_DEFNS                        \
        DDB5477_SERIAL_PORT_DEFNS                       \
        EV96100_SERIAL_PORT_DEFNS                       \
        EXTRA_SERIAL_PORT_DEFNS                         \
diff -urN linux/include/asm-mips/cobalt/cobalt.h 
linux/include/asm-mips/cobalt/cobalt.h
--- linux/include/asm-mips/cobalt/cobalt.h      2005/02/21 16:18:36     1.12
+++ linux/include/asm-mips/cobalt/cobalt.h      2005/03/04 15:13:37     1.13
@@ -29,6 +29,7 @@
 #define COBALT_SCC_IRQ          19             /* pre-production has 85C30 */
 #define COBALT_RAQ_SCSI_IRQ    19
 #define COBALT_ETH0_IRQ                19
+#define COBALT_QUBE1_ETH0_IRQ  20
 #define COBALT_ETH1_IRQ                20
 #define COBALT_SERIAL_IRQ      21
 #define COBALT_SCSI_IRQ         21