CVSROOT: /home/cvs
Module name: linux
Changes by: ralf@ftp.linux-mips.org 05/03/01 18:15:08
Modified files:
arch/mips/kernel: traps.c
Log message:
On 24K we did always disable cache parity protection - obviously not
the greatest thing to do. Try to enable parity protection, check if
we actually succeeded and print a message about the outcome of this.
diff -urN linux/arch/mips/kernel/traps.c linux/arch/mips/kernel/traps.c
--- linux/arch/mips/kernel/traps.c 2005/02/07 02:54:34 1.208
+++ linux/arch/mips/kernel/traps.c 2005/03/01 18:15:08 1.209
@@ -736,16 +736,12 @@
{
switch (current_cpu_data.cputype) {
case CPU_24K:
- /* 24K cache parity not currently implemented in FPGA */
- printk(KERN_INFO "Disable cache parity protection for "
- "MIPS 24K CPU.\n");
- write_c0_ecc(read_c0_ecc() & ~0x80000000);
- break;
case CPU_5KC:
- /* Set the PE bit (bit 31) in the c0_ecc register. */
- printk(KERN_INFO "Enable cache parity protection for "
- "MIPS 5KC/24K CPUs.\n");
- write_c0_ecc(read_c0_ecc() | 0x80000000);
+ write_c0_ecc(0x80000000);
+ back_to_back_c0_hazard();
+ /* Set the PE bit (bit 31) in the c0_errctl register. */
+ printk(KERN_INFO "Cache parity protection %sabled\n",
+ (read_c0_ecc() & 0x80000000) ? "en" : "dis");
break;
case CPU_20KC:
case CPU_25KF:
|