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CVS Update@linux-mips.org: linux

To: linux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: linux
From: ralf@linux-mips.org
Date: Mon, 21 Feb 2005 16:24:08 +0000
Reply-to: linux-mips@linux-mips.org
Sender: linux-cvs-patches-bounce@linux-mips.org
CVSROOT:        /home/cvs
Module name:    linux
Changes by:     ralf@ftp.linux-mips.org 05/02/21 16:24:02

Modified files:
        arch/mips/pci  : fixup-cobalt.c 
Added files:
        include/asm-mips/cobalt: mach-gt64120.h 

Log message:
        PCI fixups for Cobalt systems.

diff -urN linux/arch/mips/pci/fixup-cobalt.c linux/arch/mips/pci/fixup-cobalt.c
--- linux/arch/mips/pci/fixup-cobalt.c  2004/10/31 16:07:33     1.7
+++ linux/arch/mips/pci/fixup-cobalt.c  2005/02/21 16:24:02     1.8
@@ -47,6 +47,7 @@
 static void qube_raq_galileo_fixup(struct pci_dev *dev)
 {
        unsigned short galileo_id;
+       int i;
 
        /* Fix PCI latency-timer and cache-line-size values in Galileo
         * host bridge.
@@ -55,6 +56,13 @@
        pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7);
 
        /*
+        * The code described by the comment below has been removed
+        * as it causes bus mastering by the Ethernet controllers
+        * to break under any kind of network load. We always set
+        * the retry timeouts to their maximum.
+        *
+        * --x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--
+        *
         * On all machines prior to Q2, we had the STOP line disconnected
         * from Galileo to VIA on PCI.  The new Galileo does not function
         * correctly unless we have it connected.
@@ -64,19 +72,34 @@
         */
        pci_read_config_word(dev, PCI_REVISION_ID, &galileo_id);
        galileo_id &= 0xff;     /* mask off class info */
+
+       printk("Galileo ID: %u\n", galileo_id);
+
+#if 0
        if (galileo_id >= 0x10) {
                /* New Galileo, assumes PCI stop line to VIA is connected. */
                GALILEO_OUTL(0x4020, GT_PCI0_TOR_OFS);
-       } else if (galileo_id == 0x1 || galileo_id == 0x2) {
+       } else if (galileo_id == 0x1 || galileo_id == 0x2)
+#endif
+       {
                signed int timeo;
                /* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */
                timeo = GALILEO_INL(GT_PCI0_TOR_OFS);
                /* Old Galileo, assumes PCI STOP line to VIA is disconnected. */
                GALILEO_OUTL(0xffff, GT_PCI0_TOR_OFS);
        }
+
+       /*
+        * hide Galileo from the kernel's PCI resource assignment. The BARs
+        * on Galileo will already have been set up by the boot loader to
+        * match the DRAM configuration so we don't want them being monkeyed
+        * around with.
+        */
+       for (i = 0; i < DEVICE_COUNT_RESOURCE; ++i)
+               dev->resource[i].start = dev->resource[i].end = 
dev->resource[i].flags = 0;
 }
 
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_GALILEO, PCI_ANY_ID,
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID,
         qube_raq_galileo_fixup);
 
 static char irq_tab_cobalt[] __initdata = {
diff -urN linux/include/asm-mips/cobalt/mach-gt64120.h 
linux/include/asm-mips/cobalt/mach-gt64120.h
--- linux/include/asm-mips/cobalt/mach-gt64120.h        1970/01/01 00:00:00
+++ linux/include/asm-mips/cobalt/mach-gt64120.h        Mon Feb 21 16:24:02 
2005        1.1
@@ -0,0 +1 @@
+/* there's something here ... in the dark */

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