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CVS Update@linux-mips.org: linux

To: linux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: linux
From: ths@linux-mips.org
Date: Mon, 21 Feb 2005 11:11:38 +0000
Reply-to: linux-mips@linux-mips.org
Sender: linux-cvs-patches-bounce@linux-mips.org
CVSROOT:        /home/cvs
Module name:    linux
Changes by:     ths@ftp.linux-mips.org  05/02/21 11:11:33

Modified files:
        include/asm-mips: pgtable-32.h pgtable-64.h 

Log message:
        Fix compilation, and bring 32/64 bit variants more in line.

diff -urN linux/include/asm-mips/pgtable-32.h 
linux/include/asm-mips/pgtable-32.h
--- linux/include/asm-mips/pgtable-32.h 2005/02/10 12:19:59     1.15
+++ linux/include/asm-mips/pgtable-32.h 2005/02/21 11:11:32     1.16
@@ -43,10 +43,6 @@
  * works even with the cache aliasing problem the R4k and above have.
  */
 
-/* PMD_SHIFT determines the size of the area a second-level page table can map 
*/
-#define PMD_SIZE       (1UL << PMD_SHIFT)
-#define PMD_MASK       (~(PMD_SIZE-1))
-
 /* PGDIR_SHIFT determines what a third-level page table entry can map */
 #ifdef CONFIG_64BIT_PHYS_ADDR
 #define PGDIR_SHIFT    21
@@ -58,26 +54,27 @@
 
 /*
  * Entries per page directory level: we use two-level, so
- * we don't really have any PMD directory physically.
+ * we don't really have any PUD/PMD directory physically.
  */
 #ifdef CONFIG_64BIT_PHYS_ADDR
 #define PGD_ORDER      1
-#define PMD_ORDER      0
+#define PUD_ORDER      aieeee_attempt_to_allocate_pud
+#define PMD_ORDER      1
 #define PTE_ORDER      0
 #else
 #define PGD_ORDER      0
-#define PMD_ORDER      0
+#define PUD_ORDER      aieeee_attempt_to_allocate_pud
+#define PMD_ORDER      1
 #define PTE_ORDER      0
 #endif
 
 #define PTRS_PER_PGD   ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
-#define PTRS_PER_PMD   1
 #define PTRS_PER_PTE   ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
 
 #define USER_PTRS_PER_PGD      (0x80000000UL/PGDIR_SIZE)
 #define FIRST_USER_PGD_NR      0
 
-#define VMALLOC_START     KSEG2
+#define VMALLOC_START     MAP_BASE
 
 #ifdef CONFIG_HIGHMEM
 # define VMALLOC_END   (PKMAP_BASE-2*PAGE_SIZE)
@@ -145,12 +142,13 @@
 #endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */
 
 #define __pgd_offset(address)  pgd_index(address)
+#define __pud_offset(address)  (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
 #define __pmd_offset(address)  (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
 
 /* to find an entry in a kernel page-table-directory */
 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 
-#define pgd_index(address)     ((address) >> PGDIR_SHIFT)
+#define pgd_index(address)     (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 
 /* to find an entry in a page-table-directory */
 #define pgd_offset(mm,addr)    ((mm)->pgd + pgd_index(addr))
diff -urN linux/include/asm-mips/pgtable-64.h 
linux/include/asm-mips/pgtable-64.h
--- linux/include/asm-mips/pgtable-64.h 2005/02/11 22:34:24     1.20
+++ linux/include/asm-mips/pgtable-64.h 2005/02/21 11:11:32     1.21
@@ -59,7 +59,7 @@
  * two levels would be easy to implement.
  *
  * For 16kB page size we use a 2 level page tree which permits a total of
- * 36 bits of virtual address space.  We could add a third leve. but it seems
+ * 36 bits of virtual address space.  We could add a third level but it seems
  * like at the moment there's no need for this.
  *
  * For 64kB page size we use a 2 level page table tree for a total of 42 bits
@@ -97,7 +97,7 @@
 #define USER_PTRS_PER_PGD      (TASK_SIZE / PGDIR_SIZE)
 #define FIRST_USER_PGD_NR      0
 
-#define VMALLOC_START          XKSEG
+#define VMALLOC_START          MAP_BASE
 #define VMALLOC_END    \
        (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE)
 
@@ -134,7 +134,7 @@
 }
 
 /*
- * Empty pgd entries point to the invalid_pmd_table.
+ * Empty pud entries point to the invalid_pmd_table.
  */
 static inline int pud_none(pud_t pud)
 {
@@ -166,12 +166,13 @@
 #endif
 
 #define __pgd_offset(address)  pgd_index(address)
+#define __pud_offset(address)  (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
 #define page_pte(page) page_pte_prot(page, __pgprot(0))
 
 /* to find an entry in a kernel page-table-directory */
 #define pgd_offset_k(address) pgd_offset(&init_mm, 0)
 
-#define pgd_index(address)             (((address) >> PGDIR_SHIFT) & 
(PTRS_PER_PGD-1))
+#define pgd_index(address)     (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 
 /* to find an entry in a page-table-directory */
 #define pgd_offset(mm,addr)    ((mm)->pgd + pgd_index(addr))

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