CVSROOT: /home/cvs
Module name: linux
Changes by: ralf@ftp.linux-mips.org 05/02/13 20:16:34
Modified files:
. : CREDITS MAINTAINERS Makefile
Documentation : kernel-parameters.txt
Documentation/filesystems: proc.txt
Documentation/scsi: ChangeLog.megaraid
arch/arm/boot/compressed: ofw-shark.c
arch/arm/common: via82c505.c
arch/arm/kernel: calls.S entry-armv.S entry-common.S
arch/arm/mach-h720x: Kconfig cpu-h7202.c
arch/arm/mach-pxa: lubbock.c
arch/arm/mach-shark: core.c irq.c pci.c
arch/arm/mm : alignment.c tlb-v4.S tlb-v4wb.S
arch/arm/oprofile: common.c op_arm_model.h op_model_xscale.c
arch/arm/vfp : vfphw.S
arch/frv/kernel: entry.S irq-routing.c irq.c pm.c semaphore.c
signal.c switch_to.S vmlinux.lds.S
arch/i386/crypto: aes.c
arch/i386/kernel: pci-dma.c time_hpet.c
arch/i386/kernel/cpu/cpufreq: speedstep-lib.c
arch/i386/lib : usercopy.c
arch/i386/oprofile: nmi_int.c
arch/ia64 : Kconfig Makefile
arch/ia64/configs: bigsur_defconfig
arch/ia64/ia32 : ia32_signal.c sys_ia32.c
arch/ia64/kernel: asm-offsets.c efi.c entry.S head.S ivt.S mca.c
mca_asm.S minstate.h perfmon.c ptrace.c
setup.c signal.c sys_ia64.c traps.c
arch/ia64/mm : contig.c discontig.c init.c
arch/ia64/pci : pci.c
arch/ia64/sn/kernel: bte.c bte_error.c huberror.c
arch/mips : defconfig
arch/mips/configs: atlas_defconfig capcella_defconfig
cobalt_defconfig db1000_defconfig
db1100_defconfig db1500_defconfig
db1550_defconfig ddb5476_defconfig
ddb5477_defconfig decstation_defconfig
e55_defconfig ev64120_defconfig
ev96100_defconfig ip22_defconfig
ip27_defconfig ip32_defconfig
it8172_defconfig ivr_defconfig
jaguar-atx_defconfig jmr3927_defconfig
lasat200_defconfig malta_defconfig
mpc30x_defconfig ocelot_3_defconfig
ocelot_c_defconfig ocelot_defconfig
ocelot_g_defconfig osprey_defconfig
pb1100_defconfig pb1500_defconfig
pb1550_defconfig rm200_defconfig
sb1250-swarm_defconfig sead_defconfig
tb0226_defconfig tb0229_defconfig
workpad_defconfig yosemite_defconfig
arch/mips/kernel: linux32.c
arch/ppc/boot/simple: Makefile pibs.c
arch/ppc/kernel: head_44x.S
arch/ppc/lib : locks.c
arch/ppc/platforms/4xx: Kconfig Makefile ebony.c ocotea.c
ocotea.h
arch/ppc/platforms/85xx: mpc85xx_cds_common.c
arch/ppc/syslib: Makefile ibm44x_common.c mv64x60.c ppc4xx_dma.c
ppc4xx_sgdma.c ppc85xx_setup.c
arch/ppc64/kernel: entry.S prom_init.c ptrace.c syscalls.c
sysfs.c
arch/s390 : defconfig
arch/s390/kernel: compat_linux.c compat_linux.h compat_signal.c
compat_wrapper.S cpcmd.c debug.c module.c
s390_ksyms.c setup.c sys_s390.c
arch/s390/mm : cmm.c extmem.c mmap.c
arch/sparc/kernel: pcic.c ptrace.c signal.c sparc_ksyms.c
sys_sparc.c
arch/sparc/lib : atomic32.c
arch/sparc/mm : srmmu.c
arch/sparc64 : defconfig
arch/sparc64/kernel: binfmt_aout32.c process.c ptrace.c smp.c
sparc64_ksyms.c sys_sparc.c sys_sparc32.c
arch/sparc64/lib: atomic.S bitops.S debuglocks.c user_fixup.c
arch/sparc64/prom: memory.c
arch/um : Kconfig Kconfig_i386 Kconfig_x86_64 Makefile
arch/um/include: ptrace_user.h
arch/um/include/sysdep-x86_64: ptrace_user.h
arch/um/kernel : mem.c process.c sys_call_table.c time_kern.c
trap_kern.c
arch/um/kernel/skas: Makefile process.c trap_user.c
arch/um/kernel/tt: exec_user.c tracer.c
arch/x86_64/ia32: ia32_binfmt.c ipc32.c
arch/x86_64/kernel: process.c setup64.c
drivers/atm : horizon.c iphase.c zatm.c
drivers/block : cciss_scsi.c sx8.c
drivers/bluetooth: Kconfig Makefile hci_usb.c hci_usb.h
drivers/cdrom : Kconfig
drivers/char : hvcs.c mmtimer.c mxser.c sonypi.c tty_io.c
drivers/char/agp: intel-agp.c
drivers/char/drm: drm_drv.c drm_os_linux.h radeon_drv.h
radeon_state.c
drivers/char/ipmi: ipmi_si_intf.c
drivers/cpufreq: cpufreq.c
drivers/i2c/busses: i2c-sis5595.c i2c-viapro.c
drivers/i2c/chips: ds1621.c it87.c pc87360.c via686a.c w83781d.c
drivers/ide : ide-disk.c ide-dma.c ide-floppy.c ide-io.c
ide-iops.c ide-lib.c ide-pnp.c ide-probe.c
ide-tape.c ide-taskfile.c ide.c
drivers/ide/legacy: ide-cs.c
drivers/ide/pci: Makefile aec62xx.c cmd64x.c cy82c693.c
generic.c hpt366.c it8172.c opti621.c
pdc202xx_new.c pdc202xx_old.c piix.c
serverworks.c sgiioc4.c siimage.c via82cxxx.c
drivers/infiniband/hw/mthca: mthca_cq.c mthca_qp.c
drivers/input : mousedev.c
drivers/isdn/hardware/eicon: capifunc.c dadapter.c dadapter.h
di.c di.h diva_didd.c divamnt.c
divasmain.c io.c io.h message.c
os_4bri.c xdi_vers.h
drivers/isdn/hisax: avm_a1p.c isdnhdlc.c
drivers/md : dm-crypt.c dm-log.c dm-log.h dm-raid1.c
dm-stripe.c dm-table.c dm.c dm.h md.c raid5.c
raid6main.c
drivers/media/video: tda9887.c
drivers/mtd/chips: cfi_cmdset_0001.c
drivers/net : ibmveth.c sunlance.c tg3.c tg3.h
drivers/pci : pci-sysfs.c probe.c quirks.c
drivers/pci/hotplug: rpaphp.h rpaphp_core.c
drivers/pci/pcie: portdrv.h portdrv_bus.c portdrv_core.c
portdrv_pci.c
drivers/pcmcia : ds.c i82365.c m32r_cfc.c m32r_pcc.c
drivers/pnp/pnpbios: core.c
drivers/s390/block: dasd.c
drivers/s390/cio: cio.c cio.h device_ops.c
drivers/s390/net: qeth.h qeth_main.c qeth_sys.c
drivers/s390/scsi: zfcp_erp.c zfcp_fsf.c
drivers/scsi : ahci.c ide-scsi.c libata-core.c libata-scsi.c
sata_nv.c sata_promise.c sata_sil.c
scsi_transport_fc.c scsi_transport_iscsi.c
scsi_transport_spi.c
drivers/scsi/megaraid: Kconfig.megaraid mega_common.h
megaraid_ioctl.h megaraid_mbox.c
megaraid_mbox.h megaraid_mm.c
megaraid_mm.h
drivers/scsi/qla2xxx: qla_isr.c qla_os.c
drivers/serial : 8250.c Makefile
drivers/serial/cpm_uart: cpm_uart_cpm2.c
drivers/usb/class: cdc-acm.c
drivers/usb/core: devio.c hcd.c
drivers/usb/input: hid-core.c
drivers/usb/net: usbnet.c
drivers/usb/serial: Kconfig ftdi_sio.c garmin_gps.c
drivers/usb/storage: unusual_devs.h
drivers/video : cg14.c cg3.c radeonfb.c sbuslib.c
drivers/video/aty: ati_ids.h aty128fb.c radeon_base.c
radeon_monitor.c radeon_pm.c radeonfb.h
fs : Kconfig binfmt_elf.c compat_ioctl.c
read_write.c
fs/ext2 : xattr.c
fs/ext3 : xattr.c
fs/hostfs : hostfs.h hostfs_kern.c
fs/nfsd : nfsproc.c vfs.c
fs/nls : nls_cp932.c nls_cp936.c nls_cp949.c nls_cp950.c
fs/reiserfs : super.c
fs/xfs/linux-2.6: xfs_file.c
include/asm-alpha: dma-mapping.h
include/asm-arm/arch-h720x: h7202-regs.h hardware.h
include/asm-arm/arch-ixp2000: io.h
include/asm-arm/arch-pxa: pxa-regs.h
include/asm-arm/arch-s3c2410: regs-clock.h regs-gpioj.h
include/asm-frv: bitops.h processor.h system.h thread_info.h
include/asm-ia64: kregs.h mca.h mca_asm.h page.h percpu.h
processor.h unistd.h
include/asm-ppc: ibm44x.h ibm4xx.h io.h mv64x60.h ppc4xx_dma.h
reg.h rwsem.h spinlock.h
include/asm-ppc64: paca.h
include/asm-s390: ccwdev.h cpcmd.h spinlock.h
include/asm-sparc: checksum.h elf.h floppy.h io.h spinlock.h
svr4.h system.h
include/asm-sparc64: atomic.h bitops.h compat.h fbio.h io.h
mmu_context.h pgtable.h spinlock.h system.h
include/asm-um : pgtable.h processor-i386.h processor-x86_64.h
include/asm-x86_64: pgtable.h system.h
include/linux : acpi.h ata.h console.h device-mapper.h efi.h
fs.h highmem.h ide.h jiffies.h libata.h mm.h
netlink.h skbuff.h sonypi.h suspend.h sysctl.h
include/linux/netfilter_ipv4: ip_conntrack_tcp.h
ip_conntrack_tuple.h
include/linux/raid: raid5.h
include/net : dst.h
include/net/bluetooth: hci_core.h
include/video : radeon.h
init : Kconfig do_mounts_md.c
kernel : printk.c sched.c
mm : filemap.c madvise.c mincore.c mlock.c mmap.c
nommu.c shmem.c slab.c truncate.c vmalloc.c
vmscan.c
net/atm : addr.c addr.h
net/bluetooth : hci_core.c
net/core : dev.c dst.c sock.c
net/ipv4 : ipconfig.c route.c tcp_input.c tcp_output.c
net/ipv4/ipvs : ip_vs_sync.c
net/ipv4/netfilter: ip_conntrack_ftp.c ip_conntrack_proto_tcp.c
ip_nat_core.c ipt_hashlimit.c
net/ipv6 : ip6_tunnel.c
net/sched : cls_u32.c ipt.c sch_ingress.c sch_netem.c
net/xfrm : Makefile xfrm_algo.c xfrm_input.c xfrm_policy.c
xfrm_state.c
security/selinux: avc.c hooks.c
security/selinux/include: av_perm_to_string.h av_permissions.h
sound/core/ioctl32: ioctl32.c pcm32.c
sound/pci : atiixp.c intel8x0.c
sound/pci/ac97 : ac97_patch.c
usr : gen_init_cpio.c
Added files:
Documentation : atomic_ops.txt nommu-mmap.txt
arch/ppc/configs: luan_defconfig
arch/ppc/platforms/4xx: ibm440sp.c ibm440sp.h luan.c luan.h
arch/ppc/syslib: ibm440sp_common.c ibm440sp_common.h
drivers/bluetooth: bpa10x.c
include/asm-ia64/sn: shubio.h
Removed files:
Documentation/usb: silverlink.txt
arch/ia64/sn/include: shubio.h
arch/um : Kconfig_arch
drivers/char : sonypi.h
drivers/ide/pci: adma100.c adma100.h aec62xx.h cmd64x.h
cy82c693.h generic.h hpt366.h it8172.h
opti621.h pdc202xx_new.h pdc202xx_old.h piix.h
serverworks.h
net/xfrm : xfrm_export.c
Log message:
Merge with Linux 2.6.11-rc4.
diff -urN linux/CREDITS linux/CREDITS
--- linux/CREDITS 2005/02/07 02:54:29 1.138
+++ linux/CREDITS 2005/02/13 20:16:13 1.139
@@ -1811,7 +1811,8 @@
N: Greg Kroah-Hartman
E: greg@kroah.com
-W: http://www.kroah.com/linux-usb/
+E: gregkh@suse.de
+W: http://www.kroah.com/linux/
D: USB Serial Converter driver framework, USB Handspring Visor driver
D: ConnectTech WHITEHeat USB driver, Generic USB Serial driver
D: USB I/O Edgeport driver, USB Serial IrDA driver
@@ -1819,6 +1820,7 @@
D: bits and pieces of USB core code.
D: PCI Hotplug core, PCI Hotplug Compaq driver modifications
D: portions of the Linux Security Module (LSM) framework
+D: parts of the driver core, debugfs.
N: Russell Kroll
E: rkroll@exploits.org
@@ -2023,12 +2025,14 @@
N: Michal Ludvig
E: michal@logix.cz
+E: michal.ludvig@asterisk.co.nz
W: http://www.logix.cz/michal
P: 1024D/C45B2218 1162 6471 D391 76E0 9F99 29DA 0C3A 2509 C45B 2218
D: VIA PadLock driver
D: Netfilter pkttype module
-S: Prague 4
-S: Czech Republic
+S: Asterisk Ltd.
+S: Auckland
+S: New Zealand
N: Tuomas J. Lukka
E: Tuomas.Lukka@Helsinki.FI
diff -urN linux/MAINTAINERS linux/MAINTAINERS
--- linux/MAINTAINERS 2005/02/07 02:54:29 1.175
+++ linux/MAINTAINERS 2005/02/13 20:16:13 1.176
@@ -749,7 +749,7 @@
DRIVER CORE, KOBJECTS, AND SYSFS
P: Greg Kroah-Hartman
-M: greg@kroah.com
+M: gregkh@suse.de
L: linux-kernel@vger.kernel.org
S: Supported
@@ -1744,13 +1744,14 @@
PCI SUBSYSTEM
P: Greg Kroah-Hartman
-M: greg@kroah.com
+M: gregkh@suse.de
L: linux-kernel@vger.kernel.org
+L: linux-pci@atrey.karlin.mff.cuni.cz
S: Supported
PCI HOTPLUG CORE
P: Greg Kroah-Hartman
-M: greg@kroah.com
+M: gregkh@suse.de
S: Supported
PCI HOTPLUG COMPAQ DRIVER
@@ -2184,13 +2185,6 @@
M: hch@infradead.org
S: Maintained
-TI GRAPH LINK USB (SilverLink) CABLE DRIVER
-P: Romain Lievin
-M: roms@lpg.ticalc.org
-P: Julien Blache
-M: jb@technologeek.org
-S: Maintained
-
TI PARALLEL LINK CABLE DRIVER
P: Romain Lievin
M: roms@lpg.ticalc.org
@@ -2392,11 +2386,10 @@
USB SERIAL DRIVER
P: Greg Kroah-Hartman
-M: greg@kroah.com
+M: gregkh@suse.de
L: linux-usb-users@lists.sourceforge.net
L: linux-usb-devel@lists.sourceforge.net
-S: Maintained
-W: http://www.kroah.com/linux-usb/
+S: Supported
USB SERIAL BELKIN F5U103 DRIVER
P: William Greathouse
@@ -2458,7 +2451,7 @@
USB SUBSYSTEM
P: Greg Kroah-Hartman
-M: greg@kroah.com
+M: gregkh@suse.de
L: linux-usb-users@lists.sourceforge.net
L: linux-usb-devel@lists.sourceforge.net
W: http://www.linux-usb.org
diff -urN linux/Makefile linux/Makefile
--- linux/Makefile 2005/02/07 02:54:29 1.244
+++ linux/Makefile 2005/02/13 20:16:13 1.245
@@ -1,7 +1,7 @@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 11
-EXTRAVERSION =-rc3
+EXTRAVERSION =-rc4
NAME=Woozy Numbat
# *DOCUMENTATION*
diff -urN linux/Documentation/atomic_ops.txt linux/Documentation/atomic_ops.txt
--- linux/Documentation/atomic_ops.txt 1970/01/01 00:00:00
+++ linux/Documentation/atomic_ops.txt Sun Feb 13 20:16:13 2005 1.1
@@ -0,0 +1,456 @@
+ Semantics and Behavior of Atomic and
+ Bitmask Operations
+
+ David S. Miller
+
+ This document is intended to serve as a guide to Linux port
+maintainers on how to implement atomic counter, bitops, and spinlock
+interfaces properly.
+
+ The atomic_t type should be defined as a signed integer.
+Also, it should be made opaque such that any kind of cast to a normal
+C integer type will fail. Something like the following should
+suffice:
+
+ typedef struct { volatile int counter; } atomic_t;
+
+ The first operations to implement for atomic_t's are the
+initializers and plain reads.
+
+ #define ATOMIC_INIT(i) { (i) }
+ #define atomic_set(v, i) ((v)->counter = (i))
+
+The first macro is used in definitions, such as:
+
+static atomic_t my_counter = ATOMIC_INIT(1);
+
+The second interface can be used at runtime, as in:
+
+ struct foo { atomic_t counter; };
+ ...
+
+ struct foo *k;
+
+ k = kmalloc(sizeof(*k), GFP_KERNEL);
+ if (!k)
+ return -ENOMEM;
+ atomic_set(&k->counter, 0);
+
+Next, we have:
+
+ #define atomic_read(v) ((v)->counter)
+
+which simply reads the current value of the counter.
+
+Now, we move onto the actual atomic operation interfaces.
+
+ void atomic_add(int i, atomic_t *v);
+ void atomic_sub(int i, atomic_t *v);
+ void atomic_inc(atomic_t *v);
+ void atomic_dec(atomic_t *v);
+
+These four routines add and subtract integral values to/from the given
+atomic_t value. The first two routines pass explicit integers by
+which to make the adjustment, whereas the latter two use an implicit
+adjustment value of "1".
+
+One very important aspect of these two routines is that they DO NOT
+require any explicit memory barriers. They need only perform the
+atomic_t counter update in an SMP safe manner.
+
+Next, we have:
+
+ int atomic_inc_return(atomic_t *v);
+ int atomic_dec_return(atomic_t *v);
+
+These routines add 1 and subtract 1, respectively, from the given
+atomic_t and return the new counter value after the operation is
+performed.
+
+Unlike the above routines, it is required that explicit memory
+barriers are performed before and after the operation. It must be
+done such that all memory operations before and after the atomic
+operation calls are strongly ordered with respect to the atomic
+operation itself.
+
+For example, it should behave as if a smp_mb() call existed both
+before and after the atomic operation.
+
+If the atomic instructions used in an implementation provide explicit
+memory barrier semantics which satisfy the above requirements, that is
+fine as well.
+
+Let's move on:
+
+ int atomic_add_return(int i, atomic_t *v);
+ int atomic_sub_return(int i, atomic_t *v);
+
+These behave just like atomic_{inc,dec}_return() except that an
+explicit counter adjustment is given instead of the implicit "1".
+This means that like atomic_{inc,dec}_return(), the memory barrier
+semantics are required.
+
+Next:
+
+ int atomic_inc_and_test(atomic_t *v);
+ int atomic_dec_and_test(atomic_t *v);
+
+These two routines increment and decrement by 1, respectively, the
+given atomic counter. They return a boolean indicating whether the
+resulting counter value was zero or not.
+
+It requires explicit memory barrier semantics around the operation as
+above.
+
+ int atomic_sub_and_test(int i, atomic_t *v);
+
+This is identical to atomic_dec_and_test() except that an explicit
+decrement is given instead of the implicit "1". It requires explicit
+memory barrier semantics around the operation.
+
+ int atomic_add_negative(int i, atomic_t *v);
+
+The given increment is added to the given atomic counter value. A
+boolean is return which indicates whether the resulting counter value
+is negative. It requires explicit memory barrier semantics around the
+operation.
+
+If a caller requires memory barrier semantics around an atomic_t
+operation which does not return a value, a set of interfaces are
+defined which accomplish this:
+
+ void smp_mb__before_atomic_dec(void);
+ void smp_mb__after_atomic_dec(void);
+ void smp_mb__before_atomic_inc(void);
+ void smp_mb__after_atomic_dec(void);
+
+For example, smp_mb__before_atomic_dec() can be used like so:
+
+ obj->dead = 1;
+ smp_mb__before_atomic_dec();
+ atomic_dec(&obj->ref_count);
+
+It makes sure that all memory operations preceeding the atomic_dec()
+call are strongly ordered with respect to the atomic counter
+operation. In the above example, it guarentees that the assignment of
+"1" to obj->dead will be globally visible to other cpus before the
+atomic counter decrement.
+
+Without the explicitl smp_mb__before_atomic_dec() call, the
+implementation could legally allow the atomic counter update visible
+to other cpus before the "obj->dead = 1;" assignment.
+
+The other three interfaces listed are used to provide explicit
+ordering with respect to memory operations after an atomic_dec() call
+(smp_mb__after_atomic_dec()) and around atomic_inc() calls
+(smp_mb__{before,after}_atomic_inc()).
+
+A missing memory barrier in the cases where they are required by the
+atomic_t implementation above can have disasterous results. Here is
+an example, which follows a pattern occuring frequently in the Linux
+kernel. It is the use of atomic counters to implement reference
+counting, and it works such that once the counter falls to zero it can
+be guarenteed that no other entity can be accessing the object:
+
+static void obj_list_add(struct obj *obj)
+{
+ obj->active = 1;
+ list_add(&obj->list);
+}
+
+static void obj_list_del(struct obj *obj)
+{
+ list_del(&obj->list);
+ obj->active = 0;
+}
+
+static void obj_destroy(struct obj *obj)
+{
+ BUG_ON(obj->active);
+ kfree(obj);
+}
+
+struct obj *obj_list_peek(struct list_head *head)
+{
+ if (!list_empty(head)) {
+ struct obj *obj;
+
+ obj = list_entry(head->next, struct obj, list);
+ atomic_inc(&obj->refcnt);
+ return obj;
+ }
+ return NULL;
+}
+
+void obj_poke(void)
+{
+ struct obj *obj;
+
+ spin_lock(&global_list_lock);
+ obj = obj_list_peek(&global_list);
+ spin_unlock(&global_list_lock);
+
+ if (obj) {
+ obj->ops->poke(obj);
+ if (atomic_dec_and_test(&obj->refcnt))
+ obj_destroy(obj);
+ }
+}
+
+void obj_timeout(struct obj *obj)
+{
+ spin_lock(&global_list_lock);
+ obj_list_del(obj);
+ spin_unlock(&global_list_lock);
+
+ if (atomic_dec_and_test(&obj->refcnt))
+ obj_destroy(obj);
+}
+
+(This is a simplification of the ARP queue management in the
+ generic neighbour discover code of the networking. Olaf Kirch
+ found a bug wrt. memory barriers in kfree_skb() that exposed
+ the atomic_t memory barrier requirements quite clearly.)
+
+Given the above scheme, it must be the case that the obj->active
+update done by the obj list deletion be visible to other processors
+before the atomic counter decrement is performed.
+
+Otherwise, the counter could fall to zero, yet obj->active would still
+be set, thus triggering the assertion in obj_destroy(). The error
+sequence looks like this:
+
+ cpu 0 cpu 1
+ obj_poke() obj_timeout()
+ obj = obj_list_peek();
+ ... gains ref to obj, refcnt=2
+ obj_list_del(obj);
+ obj->active = 0 ...
+ ... visibility delayed ...
+ atomic_dec_and_test()
+ ... refcnt drops to 1 ...
+ atomic_dec_and_test()
+ ... refcount drops to 0 ...
+ obj_destroy()
+ BUG() triggers since obj->active
+ still seen as one
+ obj->active update visibility occurs
+
+With the memory barrier semantics required of the atomic_t operations
+which return values, the above sequence of memory visibility can never
+happen. Specifically, in the above case the atomic_dec_and_test()
+counter decrement would not become globally visible until the
+obj->active update does.
+
+As a historical note, 32-bit Sparc used to only allow usage of
+24-bits of it's atomic_t type. This was because it used 8 bits
+as a spinlock for SMP safety. Sparc32 lacked a "compare and swap"
+type instruction. However, 32-bit Sparc has since been moved over
+to a "hash table of spinlocks" scheme, that allows the full 32-bit
+counter to be realized. Essentially, an array of spinlocks are
+indexed into based upon the address of the atomic_t being operated
+on, and that lock protects the atomic operation. Parisc uses the
+same scheme.
+
+Another note is that the atomic_t operations returning values are
+extremely slow on an old 386.
+
+We will now cover the atomic bitmask operations. You will find that
+their SMP and memory barrier semantics are similar in shape and scope
+to the atomic_t ops above.
+
+Native atomic bit operations are defined to operate on objects aligned
+to the size of an "unsigned long" C data type, and are least of that
+size. The endianness of the bits within each "unsigned long" are the
+native endianness of the cpu.
+
+ void set_bit(unsigned long nr, volatils unsigned long *addr);
+ void clear_bit(unsigned long nr, volatils unsigned long *addr);
+ void change_bit(unsigned long nr, volatils unsigned long *addr);
+
+These routines set, clear, and change, respectively, the bit number
+indicated by "nr" on the bit mask pointed to by "ADDR".
+
+They must execute atomically, yet there are no implicit memory barrier
+semantics required of these interfaces.
+
+ int test_and_set_bit(unsigned long nr, volatils unsigned long *addr);
+ int test_and_clear_bit(unsigned long nr, volatils unsigned long *addr);
+ int test_and_change_bit(unsigned long nr, volatils unsigned long *addr);
+
+Like the above, except that these routines return a boolean which
+indicates whether the changed bit was set _BEFORE_ the atomic bit
+operation.
+
+WARNING! It is incredibly important that the value be a boolean,
+ie. "0" or "1". Do not try to be fancy and save a few instructions by
+declaring the above to return "long" and just returning something like
+"old_val & mask" because that will not work.
+
+For one thing, this return value gets truncated to int in many code
+paths using these interfaces, so on 64-bit if the bit is set in the
+upper 32-bits then testers will never see that.
+
+One great example of where this problem crops up are the thread_info
+flag operations. Routines such as test_and_set_ti_thread_flag() chop
+the return value into an int. There are other places where things
+like this occur as well.
+
+These routines, like the atomic_t counter operations returning values,
+require explicit memory barrier semantics around their execution. All
+memory operations before the atomic bit operation call must be made
+visible globally before the atomic bit operation is made visible.
+Likewise, the atomic bit operation must be visible globally before any
+subsequent memory operation is made visible. For example:
+
+ obj->dead = 1;
+ if (test_and_set_bit(0, &obj->flags))
+ /* ... */;
+ obj->killed = 1;
+
+The implementation of test_and_set_bit() must guarentee that
+"obj->dead = 1;" is visible to cpus before the atomic memory operation
+done by test_and_set_bit() becomes visible. Likewise, the atomic
+memory operation done by test_and_set_bit() must become visible before
+"obj->killed = 1;" is visible.
+
+Finally there is the basic operation:
+
+ int test_bit(unsigned long nr, __const__ volatile unsigned long *addr);
+
+Which returns a boolean indicating if bit "nr" is set in the bitmask
+pointed to by "addr".
+
+If explicit memory barriers are required around clear_bit() (which
+does not return a value, and thus does not need to provide memory
+barrier semantics), two interfaces are provided:
+
+ void smp_mb__before_clear_bit(void);
+ void smp_mb__after_clear_bit(void);
+
+They are used as follows, and are akin to their atomic_t operation
+brothers:
+
+ /* All memory operations before this call will
+ * be globally visible before the clear_bit().
+ */
+ smp_mb__before_clear_bit();
+ clear_bit( ... );
+
+ /* The clear_bit() will be visible before all
+ * subsequent memory operations.
+ */
+ smp_mb__after_clear_bit();
+
+Finally, there are non-atomic versions of the bitmask operations
+provided. They are used in contexts where some other higher-level SMP
+locking scheme is being used to protect the bitmask, and thus less
+expensive non-atomic operations may be used in the implementation.
+They have names similar to the above bitmask operation interfaces,
+except that two underscores are prefixed to the interface name.
+
+ void __set_bit(unsigned long nr, volatile unsigned long *addr);
+ void __clear_bit(unsigned long nr, volatile unsigned long *addr);
+ void __change_bit(unsigned long nr, volatile unsigned long *addr);
+ int __test_and_set_bit(unsigned long nr, volatile unsigned long *addr);
+ int __test_and_clear_bit(unsigned long nr, volatile unsigned long
*addr);
+ int __test_and_change_bit(unsigned long nr, volatile unsigned long
*addr);
+
+These non-atomic variants also do not require any special memory
+barrier semantics.
+
+The routines xchg() and cmpxchg() need the same exact memory barriers
+as the atomic and bit operations returning values.
+
+Spinlocks and rwlocks have memory barrier expectations as well.
+The rule to follow is simple:
+
+1) When acquiring a lock, the implementation must make it globally
+ visible before any subsequent memory operation.
+
+2) When releasing a lock, the implementation must make it such that
+ all previous memory operations are globally visible before the
+ lock release.
+
+Which finally brings us to _atomic_dec_and_lock(). There is an
+architecture-neutral version implemented in lib/dec_and_lock.c,
+but most platforms will wish to optimize this in assembler.
+
+ int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock);
+
+Atomically decrement the given counter, and if will drop to zero
+atomically acquire the given spinlock and perform the decrement
+of the counter to zero. If it does not drop to zero, do nothing
+with the spinlock.
+
+It is actually pretty simple to get the memory barrier correct.
+Simply satisfy the spinlock grab requirements, which is make
+sure the spinlock operation is globally visible before any
+subsequent memory operation.
+
+We can demonstrate this operation more clearly if we define
+an abstract atomic operation:
+
+ long cas(long *mem, long old, long new);
+
+"cas" stands for "compare and swap". It atomically:
+
+1) Compares "old" with the value currently at "mem".
+2) If they are equal, "new" is written to "mem".
+3) Regardless, the current value at "mem" is returned.
+
+As an example usage, here is what an atomic counter update
+might look like:
+
+void example_atomic_inc(long *counter)
+{
+ long old, new, ret;
+
+ while (1) {
+ old = *counter;
+ new = old + 1;
+
+ ret = cas(counter, old, new);
+ if (ret == old)
+ break;
+ }
+}
+
+Let's use cas() in order to build a pseudo-C atomic_dec_and_lock():
+
+int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock)
+{
+ long old, new, ret;
+ int went_to_zero;
+
+ went_to_zero = 0;
+ while (1) {
+ old = atomic_read(atomic);
+ new = old - 1;
+ if (new == 0) {
+ went_to_zero = 1;
+ spin_lock(lock);
+ }
+ ret = cas(atomic, old, new);
+ if (ret == old)
+ break;
+ if (went_to_zero) {
+ spin_unlock(lock);
+ went_to_zero = 0;
+ }
+ }
+
+ return went_to_zero;
+}
+
+Now, as far as memory barriers go, as long as spin_lock()
+strictly orders all subsequent memory operations (including
+the cas()) with respect to itself, things will be fine.
+
+Said another way, _atomic_dec_and_lock() must guarentee that
+a counter dropping to zero is never made visible before the
+spinlock being acquired.
+
+Note that this also means that for the case where the counter
+is not dropping to zero, there are no memory ordering
+requirements.
diff -urN linux/Documentation/nommu-mmap.txt linux/Documentation/nommu-mmap.txt
--- linux/Documentation/nommu-mmap.txt 1970/01/01 00:00:00
+++ linux/Documentation/nommu-mmap.txt Sun Feb 13 20:16:13 2005 1.1
@@ -0,0 +1,141 @@
+ =============================
+ NO-MMU MEMORY MAPPING SUPPORT
+ =============================
+
+The kernel has limited support for memory mapping under no-MMU conditions, such
+as are used in uClinux environments. From the userspace point of view, memory
+mapping is made use of in conjunction with the mmap() system call, the shmat()
+call and the execve() system call. From the kernel's point of view, execve()
+mapping is actually performed by the binfmt drivers, which call back into the
+mmap() routines to do the actual work.
+
+Memory mapping behaviour also involves the way fork(), vfork(), clone() and
+ptrace() work. Under uClinux there is no fork(), and clone() must be supplied
+the CLONE_VM flag.
+
+The behaviour is similar between the MMU and no-MMU cases, but not identical;
+and it's also much more restricted in the latter case:
+
+ (*) Anonymous mapping, MAP_PRIVATE
+
+ In the MMU case: VM regions backed by arbitrary pages; copy-on-write
+ across fork.
+
+ In the no-MMU case: VM regions backed by arbitrary contiguous runs of
+ pages.
+
+ (*) Anonymous mapping, MAP_SHARED
+
+ These behave very much like private mappings, except that they're
+ shared across fork() or clone() without CLONE_VM in the MMU case. Since
+ the no-MMU case doesn't support these, behaviour is identical to
+ MAP_PRIVATE there.
+
+ (*) File, MAP_PRIVATE, PROT_READ / PROT_EXEC, !PROT_WRITE
+
+ In the MMU case: VM regions backed by pages read from file; changes to
+ the underlying file are reflected in the mapping; copied across fork.
+
+ In the no-MMU case: VM regions backed by arbitrary contiguous runs of
+ pages into which the appropriate bit of the file is read; any remaining
+ bit of the mapping is cleared; such mappings are shared if possible;
+ writes to the file do not affect the mapping; writes to the mapping are
+ visible in other processes (no MMU protection), but should not happen.
+
+ (*) File, MAP_PRIVATE, PROT_READ / PROT_EXEC, PROT_WRITE
+
+ In the MMU case: like the non-PROT_WRITE case, except that the pages in
+ question get copied before the write actually happens. From that point
+ on writes to that page in the file no longer get reflected into the
+ mapping's backing pages.
+
+ In the no-MMU case: works exactly as for the non-PROT_WRITE case.
+
+ (*) Regular file / blockdev, MAP_SHARED, PROT_READ / PROT_EXEC / PROT_WRITE
+
+ In the MMU case: VM regions backed by pages read from file; changes to
+ pages written back to file; writes to file reflected into pages backing
+ mapping; shared across fork.
+
+ In the no-MMU case: not supported.
+
+ (*) Memory backed regular file, MAP_SHARED, PROT_READ / PROT_EXEC / PROT_WRITE
+
+ In the MMU case: As for ordinary regular files.
+
+ In the no-MMU case: The filesystem providing the memory-backed file
+ (such as ramfs or tmpfs) may choose to honour an open, truncate, mmap
+ sequence by providing a contiguous sequence of pages to map. In that
+ case, a shared-writable memory mapping will be possible. It will work
+ as for the MMU case. If the filesystem does not provide any such
+ support, then the mapping request will be denied.
+
+ (*) Memory backed chardev, MAP_SHARED, PROT_READ / PROT_EXEC / PROT_WRITE
+
+ In the MMU case: As for ordinary regular files.
+
+ In the no-MMU case: The character device driver may choose to honour
+ the mmap() by providing direct access to the underlying device if it
+ provides memory or quasi-memory that can be accessed directly. Examples
+ of such are frame buffers and flash devices. If the driver does not
+ provide any such support, then the mapping request will be denied.
+
+
+============================
+FURTHER NOTES ON NO-MMU MMAP
+============================
+
+ (*) A request for a private mapping of less than a page in size may not return
+ a page-aligned buffer. This is because the kernel calls kmalloc() to
+ allocate the buffer, not get_free_page().
+
+ (*) A list of all the mappings on the system is visible through /proc/maps in
+ no-MMU mode.
+
+ (*) Supplying MAP_FIXED or a requesting a particular mapping address will
+ result in an error.
+
+ (*) Files mapped privately must have a read method provided by the driver or
+ filesystem so that the contents can be read into the memory allocated. An
+ error will result if they don't. This is most likely to be encountered
+ with character device files, pipes, fifos and sockets.
+
+
+============================================
+PROVIDING SHAREABLE CHARACTER DEVICE SUPPORT
+============================================
+
+To provide shareable character device support, a driver must provide a
+file->f_op->get_unmapped_area() operation. The mmap() routines will call this
+to get a proposed address for the mapping. This may return an error if it
+doesn't wish to honour the mapping because it's too long, at a weird offset,
+under some unsupported combination of flags or whatever.
+
+The vm_ops->close() routine will be invoked when the last mapping on a chardev
+is removed. An existing mapping will be shared, partially or not, if possible
+without notifying the driver.
+
+It is permitted also for the file->f_op->get_unmapped_area() operation to
+return -ENOSYS. This will be taken to mean that this operation just doesn't
+want to handle it, despite the fact it's got an operation. For instance, it
+might try directing the call to a secondary driver which turns out not to
+implement it. Such is the case for the framebuffer driver which attempts to
+direct the call to the device-specific driver.
+
+
+==============================================
+PROVIDING SHAREABLE MEMORY-BACKED FILE SUPPORT
+==============================================
+
+Provision of shared mappings on memory backed files is similar to the provision
+of support for shared mapped character devices. The main difference is that the
+filesystem providing the service will probably allocate a contiguous collection
+of pages and permit mappings to be made on that.
+
+It is recommended that a truncate operation applied to such a file that
+increases the file size, if that file is empty, be taken as a request to gather
+enough pages to honour a mapping. This is required to support POSIX shared
+memory.
+
+Memory backed devices are indicated by the mapping's backing device info having
+the memory_backed flag set.
diff -urN linux/Documentation/kernel-parameters.txt
linux/Documentation/kernel-parameters.txt
--- linux/Documentation/kernel-parameters.txt 2005/02/07 02:54:29 1.56
+++ linux/Documentation/kernel-parameters.txt 2005/02/13 20:16:13 1.57
@@ -1363,9 +1363,6 @@
tipar.delay= [HW,PPT]
Set inter-bit delay in microseconds (default 10).
- tiusb= [HW,USB] Texas Instruments' USB GraphLink (aka
SilverLink)
- Format: <timeout>
-
tmc8xx= [HW,SCSI]
See header of drivers/scsi/seagate.c.
diff -urN linux/Documentation/filesystems/proc.txt
linux/Documentation/filesystems/proc.txt
--- linux/Documentation/filesystems/proc.txt 2004/11/15 11:49:12 1.31
+++ linux/Documentation/filesystems/proc.txt 2005/02/13 20:16:13 1.32
@@ -1709,12 +1709,13 @@
Writing to this file results in a flush of the routing cache.
-gc_elasticity, gc_interval, gc_min_interval, gc_tresh, gc_timeout,
-gc_thresh, gc_thresh1, gc_thresh2, gc_thresh3
---------------------------------------------------------------
+gc_elasticity, gc_interval, gc_min_interval_ms, gc_timeout, gc_thresh
+---------------------------------------------------------------------
Values to control the frequency and behavior of the garbage collection
-algorithm for the routing cache.
+algorithm for the routing cache. gc_min_interval is deprecated and replaced
+by gc_min_interval_ms.
+
max_size
--------
diff -urN linux/Documentation/scsi/ChangeLog.megaraid
linux/Documentation/scsi/ChangeLog.megaraid
--- linux/Documentation/scsi/ChangeLog.megaraid 2004/12/27 02:15:47 1.6
+++ linux/Documentation/scsi/ChangeLog.megaraid 2005/02/13 20:16:13 1.7
@@ -1,3 +1,105 @@
+Release Date : Thu Feb 03 12:27:22 EST 2005 - Seokmann Ju <sju@lsil.com>
+Current Version : 2.20.4.5 (scsi module), 2.20.2.5 (cmm module)
+Older Version : 2.20.4.4 (scsi module), 2.20.2.4 (cmm module)
+
+1. Modified name of two attributes in scsi_host_template.
+ On Wed, 2005-02-02 at 10:56 -0500, Ju, Seokmann wrote:
+ > + .sdev_attrs = megaraid_device_attrs,
+ > + .shost_attrs = megaraid_class_device_attrs,
+
+ These are, perhaps, slightly confusing names.
+ The terms device and class_device have well defined meanings in the
+ generic device model, neither of which is what you mean here.
+ Why not simply megaraid_sdev_attrs and megaraid_shost_attrs?
+
+ Other than this, it looks fine to me too.
+
+Release Date : Thu Jan 27 00:01:03 EST 2005 - Atul Mukker <atulm@lsil.com>
+Current Version : 2.20.4.4 (scsi module), 2.20.2.5 (cmm module)
+Older Version : 2.20.4.3 (scsi module), 2.20.2.4 (cmm module)
+
+1. Bump up the version of scsi module due to its conflict.
+
+Release Date : Thu Jan 21 00:01:03 EST 2005 - Atul Mukker <atulm@lsil.com>
+Current Version : 2.20.4.3 (scsi module), 2.20.2.5 (cmm module)
+Older Version : 2.20.4.2 (scsi module), 2.20.2.4 (cmm module)
+
+1. Remove driver ioctl for logical drive to scsi address translation and
+ replace with the sysfs attribute. To remove drives and change
+ capacity, application shall now use the device attribute to get the
+ logical drive number for a scsi device. For adding newly created
+ logical drives, class device attribute would be required to uniquely
+ identify each controller.
+ - Atul Mukker <atulm@lsil.com>
+
+ "James, I've been thinking about this a little more, and you may be on
+ to something here. Let each driver add files as such:"
+
+ - Matt Domsch <Matt_Domsch@dell.com>, 12.15.2004
+ linux-scsi mailing list
+
+
+ "Then, if you simply publish your LD number as an extra parameter of
+ the device, you can look through /sys to find it."
+
+ - James Bottomley <James.Bottomley@SteelEye.com>, 01.03.2005
+ linux-scsi mailing list
+
+
+ "I don't see why not ... it's your driver, you can publish whatever
+ extra information you need as scsi_device attributes; that was one of
+ the designs of the extensible attribute system."
+
+ - James Bottomley <James.Bottomley@SteelEye.com>, 01.06.2005
+ linux-scsi mailing list
+
+2. Add AMI megaraid support - Brian King <brking@charter.net>
+ PCI_VENDOR_ID_AMI, PCI_DEVICE_ID_AMI_MEGARAID3,
+ PCI_VENDOR_ID_AMI, PCI_SUBSYS_ID_PERC3_DC,
+
+3. Make some code static - Adrian Bunk <bunk@stusta.de>
+ Date: Mon, 15 Nov 2004 03:14:57 +0100
+
+ The patch below makes some needlessly global code static.
+ -wait_queue_head_t wait_q;
+ +static wait_queue_head_t wait_q;
+
+ Signed-off-by: Adrian Bunk <bunk@stusta.de>
+
+4. Added NEC ROMB support - NEC MegaRAID PCI Express ROMB controller
+ PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_MEGARAID_NEC_ROMB_2E,
+ PCI_SUBSYS_ID_NEC, PCI_SUBSYS_ID_MEGARAID_NEC_ROMB_2E,
+
+5. Fixed Tape drive issue : For any Direct CDB command to physical device
+ including tape, timeout value set by driver was 10 minutes. With this
+ value, most of command will return within timeout. However, for those
+ command like ERASE or FORMAT, it takes more than an hour depends on
+ capacity of the device and the command could be terminated before it
+ completes.
+ To address this issue, the 'timeout' field in the DCDB command will
+ have NO TIMEOUT (i.e., 4) value as its timeout on DCDB command.
+
+
+
+Release Date : Thu Dec 9 19:10:23 EST 2004
+ - Sreenivas Bagalkote <sreenib@lsil.com>
+
+Current Version : 2.20.4.2 (scsi module), 2.20.2.4 (cmm module)
+Older Version : 2.20.4.1 (scsi module), 2.20.2.3 (cmm module)
+
+i. Introduced driver ioctl that returns scsi address for a given ld.
+
+ "Why can't the existing sysfs interfaces be used to do this?"
+ - Brian King (brking@us.ibm.com)
+
+ "I've looked into solving this another way, but I cannot see how
+ to get this driver-private mapping of logical drive number-> HCTL
+ without putting code something like this into the driver."
+
+ "...and by providing a mapping a function to userspace, the driver
+ is free to change its mapping algorithm in the future if necessary .."
+ - Matt Domsch (Matt_Domsch@dell.com)
+
Release Date : Thu Dec 9 19:02:14 EST 2004 - Sreenivas Bagalkote
<sreenib@lsil.com>
Current Version : 2.20.4.1 (scsi module), 2.20.2.3 (cmm module)
@@ -13,7 +115,7 @@
i. Handle IOCTL cmd timeouts more properly.
ii. pci_dma_sync_{sg,single}_for_cpu was introduced into megaraid_mbox
- incorrectly (instead of _for_device). Changed to appropriate
+ incorrectly (instead of _for_device). Changed to appropriate
pci_dma_sync_{sg,single}_for_device.
Release Date : Wed Oct 06 11:15:29 EDT 2004 - Sreenivas Bagalkote
<sreenib@lsil.com>
diff -urN linux/Documentation/usb/silverlink.txt
linux/Documentation/usb/silverlink.txt
--- linux/Documentation/usb/Attic/silverlink.txt Sun Feb 13 20:16:14
2005 1.3
+++ linux/Documentation/usb/Attic/silverlink.txt 1970/01/01 00:00:002002
@@ -1,78 +0,0 @@
--------------------------------------------------------------------------
-Readme for Linux device driver for the Texas Instruments SilverLink cable
-and direct USB cable provided by some TI's handhelds.
--------------------------------------------------------------------------
-
-Author: Romain Liévin & Julien Blache
-Homepage: http://lpg.ticalc.org/prj_usb
-
-INTRODUCTION:
-
-This is a driver for the TI-GRAPH LINK USB (aka SilverLink) cable, a cable
-designed by TI for connecting their TI8x/9x calculators to a computer
-(PC or Mac usually). It has been extended to support the USB port offered by
-some latest TI handhelds (TI84+ and TI89 Titanium).
-
-If you need more information, please visit the 'SilverLink drivers' homepage
-at the above URL.
-
-WHAT YOU NEED:
-
-A TI calculator of course and a program capable to communicate with your
-calculator.
-TiLP will work for sure (since I am his developer !). yal92 may be able to use
-it by changing tidev for tiglusb (may require some hacking...).
-
-HOW TO USE IT:
-
-You must have first compiled USB support, support for your specific USB host
-controller (UHCI or OHCI).
-
-Next, (as root) from your appropriate modules directory (lib/modules/2.5.XX):
-
- insmod usb/usbcore.o
- insmod usb/usb-uhci.o <OR> insmod usb/ohci-hcd.o
- insmod tiglusb.o
-
-If it is not already there (it usually is), create the device:
-
- mknod /dev/tiglusb0 c 115 16
-
-You will have to set permissions on this device to allow you to read/write
-from it:
-
- chmod 666 /dev/tiglusb0
-
-Now you are ready to run a linking program such as TiLP. Be sure to configure
-it properly (RTFM).
-
-MODULE PARAMETERS:
-
- You can set these with: insmod tiglusb NAME=VALUE
- There is currently no way to set these on a per-cable basis.
-
- NAME: timeout
- TYPE: integer
- DEFAULT: 15
- DESC: Timeout value in tenth of seconds. If no data is available once this
- time has expired then the driver will return with a timeout error.
-
-QUIRKS:
-
-The following problem seems to be specific to the link cable since it appears
-on all platforms (Linux, Windows, Mac OS-X).
-
-In some very particular cases, the driver returns with success but
-without any data. The application should retry a read operation at least once.
-
-HOW TO CONTACT US:
-
-You can email me at roms@lpg.ticalc.org. Please prefix the subject line
-with "TIGLUSB: " so that I am certain to notice your message.
-You can also mail JB at jb@jblache.org: he has written the first release of
-this driver but he better knows the Mac OS-X driver.
-
-CREDITS:
-
-The code is based on dabusb.c, printer.c and scanner.c !
-The driver has been developed independently of Texas Instruments Inc.
diff -urN linux/arch/arm/boot/compressed/ofw-shark.c
linux/arch/arm/boot/compressed/ofw-shark.c
--- linux/arch/arm/boot/compressed/ofw-shark.c 2003/06/01 08:23:59 1.6
+++ linux/arch/arm/boot/compressed/ofw-shark.c 2005/02/13 20:16:14 1.7
@@ -24,6 +24,8 @@
int j,i,m,k,nr_banks,size;
unsigned char *c;
+ k = 0;
+
/* Head of the taglist */
tag->hdr.tag = ATAG_CORE;
tag->hdr.size = tag_size(tag_core);
diff -urN linux/arch/arm/common/via82c505.c linux/arch/arm/common/via82c505.c
--- linux/arch/arm/common/via82c505.c 2003/06/04 14:05:37 1.1
+++ linux/arch/arm/common/via82c505.c 2005/02/13 20:16:14 1.2
@@ -59,7 +59,7 @@
.write = via82c505_write_config,
};
-void __init via82c505_preinit(void *sysdata)
+void __init via82c505_preinit(void)
{
printk(KERN_DEBUG "PCI: VIA 82c505\n");
if (!request_region(0xA8,2,"via config")) {
diff -urN linux/arch/arm/kernel/calls.S linux/arch/arm/kernel/calls.S
--- linux/arch/arm/kernel/calls.S 2005/02/07 02:54:30 1.26
+++ linux/arch/arm/kernel/calls.S 2005/02/13 20:16:14 1.27
@@ -134,7 +134,7 @@
.long sys_ipc
.long sys_fsync
.long sys_sigreturn_wrapper
-/* 120 */ .long sys_clone_wapper
+/* 120 */ .long sys_clone_wrapper
.long sys_setdomainname
.long sys_newuname
.long sys_ni_syscall
@@ -254,7 +254,7 @@
.long sys_fremovexattr
.long sys_tkill
.long sys_sendfile64
-/* 240 */ .long sys_futex
+/* 240 */ .long sys_futex_wrapper
.long sys_sched_setaffinity
.long sys_sched_getaffinity
.long sys_io_setup
diff -urN linux/arch/arm/kernel/entry-armv.S linux/arch/arm/kernel/entry-armv.S
--- linux/arch/arm/kernel/entry-armv.S 2005/02/07 02:54:30 1.63
+++ linux/arch/arm/kernel/entry-armv.S 2005/02/13 20:16:14 1.64
@@ -379,8 +379,6 @@
.previous
/*
- * r0 = instruction.
- *
* Check whether the instruction is a co-processor instruction.
* If yes, we need to call the relevant co-processor handler.
*
@@ -391,8 +389,9 @@
* for the ARM6/ARM7 SWI bug.
*
* Emulators may wish to make use of the following registers:
- * r0 - instruction opcode.
- * r10 - this threads thread_info structure.
+ * r0 = instruction opcode.
+ * r2 = PC+4
+ * r10 = this threads thread_info structure.
*/
call_fpe:
tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have
bit 27
@@ -447,7 +446,7 @@
/*
* The FP module is called with these registers set:
* r0 = instruction
- * r5 = PC
+ * r2 = PC+4
* r9 = normal "successful" return address
* r10 = FP workspace
* lr = unrecognised FP instruction return address
diff -urN linux/arch/arm/kernel/entry-common.S
linux/arch/arm/kernel/entry-common.S
--- linux/arch/arm/kernel/entry-common.S 2005/02/07 02:54:30 1.33
+++ linux/arch/arm/kernel/entry-common.S 2005/02/13 20:16:14 1.34
@@ -11,6 +11,7 @@
#include <asm/thread_info.h>
#include <asm/ptrace.h>
+#include <asm/unistd.h>
#include "entry-header.S"
@@ -190,13 +191,14 @@
.type sys_syscall, #function
sys_syscall:
eor scno, r0, #OS_NUMBER << 20
- cmp scno, #NR_syscalls @ check range
- stmleia sp, {r5, r6} @ shuffle args
- movle r0, r1
- movle r1, r2
- movle r2, r3
- movle r3, r4
- ldrle pc, [tbl, scno, lsl #2]
+ cmp scno, #__NR_syscall - __NR_SYSCALL_BASE
+ cmpne scno, #NR_syscalls @ check range
+ stmloia sp, {r5, r6} @ shuffle args
+ movlo r0, r1
+ movlo r1, r2
+ movlo r2, r3
+ movlo r3, r4
+ ldrlo pc, [tbl, scno, lsl #2]
b sys_ni_syscall
sys_fork_wrapper:
@@ -211,7 +213,7 @@
add r3, sp, #S_OFF
b sys_execve
-sys_clone_wapper:
+sys_clone_wrapper:
add ip, sp, #S_OFF
str ip, [sp, #4]
b sys_clone
@@ -236,6 +238,10 @@
ldr r2, [sp, #S_OFF + S_SP]
b do_sigaltstack
+sys_futex_wrapper:
+ str r5, [sp, #4] @ push sixth arg
+ b sys_futex
+
/*
* Note: off_4k (r5) is always units of 4K. If we can't do the requested
* offset, we return EINVAL.
diff -urN linux/arch/arm/mach-h720x/Kconfig linux/arch/arm/mach-h720x/Kconfig
--- linux/arch/arm/mach-h720x/Kconfig 2004/11/15 11:49:14 1.2
+++ linux/arch/arm/mach-h720x/Kconfig 2005/02/13 20:16:14 1.3
@@ -27,5 +27,12 @@
bool
help
Select code specific to h7202 variants
+config H7202_SERIAL23
+ depends on CPU_H7202
+ bool "Use serial ports 2+3"
+ help
+ Say Y here if you wish to use serial ports 2+3. They share their
+ pins with the keyboard matrix controller, so you have to decide.
+
endif
diff -urN linux/arch/arm/mach-h720x/cpu-h7202.c
linux/arch/arm/mach-h720x/cpu-h7202.c
--- linux/arch/arm/mach-h720x/cpu-h7202.c 2004/11/15 11:49:14 1.3
+++ linux/arch/arm/mach-h720x/cpu-h7202.c 2005/02/13 20:16:14 1.4
@@ -5,7 +5,7 @@
* 2003 Robert Schwebel <r.schwebel@pengutronix.de>
* 2004 Sascha Hauer <s.hauer@pengutronix.de>
*
- * processor specific stuff for the Hynix h7201
+ * processor specific stuff for the Hynix h7202
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -48,7 +48,8 @@
static struct plat_serial8250_port serial_platform_data[] = {
{
- .membase = SERIAL0_BASE,
+ .membase = (void*)SERIAL0_VIRT,
+ .mapbase = SERIAL0_BASE,
.irq = IRQ_UART0,
.uartclk = 2*1843200,
.regshift = 2,
@@ -56,15 +57,18 @@
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
},
{
- .membase = SERIAL1_BASE,
+ .membase = (void*)SERIAL1_VIRT,
+ .mapbase = SERIAL1_BASE,
.irq = IRQ_UART1,
.uartclk = 2*1843200,
.regshift = 2,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
},
+#ifdef CONFIG_H7202_SERIAL23
{
- .membase = SERIAL2_BASE,
+ .membase = (void*)SERIAL2_VIRT,
+ .mapbase = SERIAL2_BASE,
.irq = IRQ_UART2,
.uartclk = 2*1843200,
.regshift = 2,
@@ -72,13 +76,15 @@
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
},
{
- .membase = SERIAL3_BASE,
+ .membase = (void*)SERIAL3_VIRT,
+ .mapbase = SERIAL3_BASE,
.irq = IRQ_UART3,
.uartclk = 2*1843200,
.regshift = 2,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
},
+#endif
{ },
};
@@ -210,5 +216,13 @@
/* Enable clocks */
CPU_REG (PMU_BASE, PMU_PLL_CTRL) |= PLL_2_EN | PLL_1_EN | PLL_3_MUTE;
+ CPU_REG (SERIAL0_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN;
+ CPU_REG (SERIAL1_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN;
+#ifdef CONFIG_H7202_SERIAL23
+ CPU_REG (SERIAL2_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN;
+ CPU_REG (SERIAL3_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN;
+ CPU_IO (GPIO_AMULSEL) = AMULSEL_USIN2 | AMULSEL_USOUT2 |
+ AMULSEL_USIN3 | AMULSEL_USOUT3;
+#endif
(void) platform_add_devices(devices, ARRAY_SIZE(devices));
}
diff -urN linux/arch/arm/mach-pxa/lubbock.c linux/arch/arm/mach-pxa/lubbock.c
--- linux/arch/arm/mach-pxa/lubbock.c 2004/12/04 18:15:58 1.21
+++ linux/arch/arm/mach-pxa/lubbock.c 2005/02/13 20:16:14 1.22
@@ -29,12 +29,13 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <asm/hardware/sa1111.h>
+
#include <asm/arch/pxa-regs.h>
#include <asm/arch/lubbock.h>
#include <asm/arch/udc.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/mmc.h>
-#include <asm/hardware/sa1111.h>
#include "generic.h"
diff -urN linux/arch/arm/mach-shark/core.c linux/arch/arm/mach-shark/core.c
--- linux/arch/arm/mach-shark/core.c 2004/11/15 11:49:15 1.5
+++ linux/arch/arm/mach-shark/core.c 2005/02/13 20:16:14 1.6
@@ -93,8 +93,6 @@
*/
static void __init shark_timer_init(void)
{
- unsigned long flags;
-
outb(0x34, 0x43); /* binary, mode 0, LSB/MSB, Ch 0 */
outb(HZ_TIME & 0xff, 0x40); /* LSB of count */
outb(HZ_TIME >> 8, 0x40);
diff -urN linux/arch/arm/mach-shark/irq.c linux/arch/arm/mach-shark/irq.c
--- linux/arch/arm/mach-shark/irq.c 2002/10/30 22:28:18 1.3
+++ linux/arch/arm/mach-shark/irq.c 2005/02/13 20:16:14 1.4
@@ -61,9 +61,10 @@
static void shark_ack_8259A_irq(unsigned int irq){}
-static void bogus_int(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t bogus_int(int irq, void *dev_id, struct pt_regs *regs)
{
printk("Got interrupt %i!\n",irq);
+ return IRQ_NONE;
}
static struct irqaction cascade;
@@ -103,7 +104,6 @@
cascade.handler = bogus_int;
cascade.flags = 0;
- cascade.mask = 0;
cascade.name = "cascade";
cascade.next = NULL;
cascade.dev_id = NULL;
diff -urN linux/arch/arm/mach-shark/pci.c linux/arch/arm/mach-shark/pci.c
--- linux/arch/arm/mach-shark/pci.c 2002/10/30 22:28:18 1.5
+++ linux/arch/arm/mach-shark/pci.c 2005/02/13 20:16:14 1.6
@@ -21,7 +21,7 @@
else return 255;
}
-extern void __init via82c505_preinit(void *sysdata);
+extern void __init via82c505_preinit(void);
static struct hw_pci shark_pci __initdata = {
.setup = via82c505_setup,
@@ -29,7 +29,7 @@
.map_irq = shark_map_irq,
.nr_controllers = 1,
.scan = via82c505_scan_bus,
- .preinit = via82c505_preinit
+ .preinit = via82c505_preinit,
};
static int __init shark_pci_init(void)
diff -urN linux/arch/arm/mm/alignment.c linux/arch/arm/mm/alignment.c
--- linux/arch/arm/mm/alignment.c 2005/01/13 14:05:19 1.10
+++ linux/arch/arm/mm/alignment.c 2005/02/13 20:16:14 1.11
@@ -133,6 +133,18 @@
#define TYPE_LDST 2
#define TYPE_DONE 3
+#ifdef __ARMEB__
+#define BE 1
+#define FIRST_BYTE_16 "mov %1, %1, ror #8\n"
+#define FIRST_BYTE_32 "mov %1, %1, ror #24\n"
+#define NEXT_BYTE "ror #24"
+#else
+#define BE 0
+#define FIRST_BYTE_16
+#define FIRST_BYTE_32
+#define NEXT_BYTE "lsr #8"
+#endif
+
#define __get8_unaligned_check(ins,val,addr,err) \
__asm__( \
"1: "ins" %1, [%2], #1\n" \
@@ -152,9 +164,10 @@
#define __get16_unaligned_check(ins,val,addr) \
do { \
unsigned int err = 0, v, a = addr; \
- __get8_unaligned_check(ins,val,a,err); \
__get8_unaligned_check(ins,v,a,err); \
- val |= v << 8; \
+ val = v << ((BE) ? 8 : 0); \
+ __get8_unaligned_check(ins,v,a,err); \
+ val |= v << ((BE) ? 0 : 8); \
if (err) \
goto fault; \
} while (0)
@@ -168,13 +181,14 @@
#define __get32_unaligned_check(ins,val,addr) \
do { \
unsigned int err = 0, v, a = addr; \
- __get8_unaligned_check(ins,val,a,err); \
__get8_unaligned_check(ins,v,a,err); \
- val |= v << 8; \
+ val = v << ((BE) ? 24 : 0); \
+ __get8_unaligned_check(ins,v,a,err); \
+ val |= v << ((BE) ? 16 : 8); \
__get8_unaligned_check(ins,v,a,err); \
- val |= v << 16; \
+ val |= v << ((BE) ? 8 : 16); \
__get8_unaligned_check(ins,v,a,err); \
- val |= v << 24; \
+ val |= v << ((BE) ? 0 : 24); \
if (err) \
goto fault; \
} while (0)
@@ -188,9 +202,9 @@
#define __put16_unaligned_check(ins,val,addr) \
do { \
unsigned int err = 0, v = val, a = addr; \
- __asm__( \
+ __asm__( FIRST_BYTE_16 \
"1: "ins" %1, [%2], #1\n" \
- " mov %1, %1, lsr #8\n" \
+ " mov %1, %1, "NEXT_BYTE"\n" \
"2: "ins" %1, [%2]\n" \
"3:\n" \
" .section .fixup,\"ax\"\n" \
@@ -218,13 +232,13 @@
#define __put32_unaligned_check(ins,val,addr) \
do { \
unsigned int err = 0, v = val, a = addr; \
- __asm__( \
+ __asm__( FIRST_BYTE_32 \
"1: "ins" %1, [%2], #1\n" \
- " mov %1, %1, lsr #8\n" \
+ " mov %1, %1, "NEXT_BYTE"\n" \
"2: "ins" %1, [%2], #1\n" \
- " mov %1, %1, lsr #8\n" \
+ " mov %1, %1, "NEXT_BYTE"\n" \
"3: "ins" %1, [%2], #1\n" \
- " mov %1, %1, lsr #8\n" \
+ " mov %1, %1, "NEXT_BYTE"\n" \
"4: "ins" %1, [%2]\n" \
"5:\n" \
" .section .fixup,\"ax\"\n" \
diff -urN linux/arch/arm/mm/tlb-v4.S linux/arch/arm/mm/tlb-v4.S
--- linux/arch/arm/mm/tlb-v4.S 2003/09/30 14:27:17 1.7
+++ linux/arch/arm/mm/tlb-v4.S 2005/02/13 20:16:14 1.8
@@ -44,7 +44,7 @@
mov pc, lr
/*
- * v4_flush_kerm_tlb_range(start, end)
+ * v4_flush_kern_tlb_range(start, end)
*
* Invalidate a range of TLB entries in the specified kernel
* address range.
diff -urN linux/arch/arm/mm/tlb-v4wb.S linux/arch/arm/mm/tlb-v4wb.S
--- linux/arch/arm/mm/tlb-v4wb.S 2003/09/30 14:27:17 1.7
+++ linux/arch/arm/mm/tlb-v4wb.S 2005/02/13 20:16:14 1.8
@@ -47,7 +47,7 @@
mov pc, lr
/*
- * v4_flush_kerm_tlb_range(start, end)
+ * v4_flush_kern_tlb_range(start, end)
*
* Invalidate a range of TLB entries in the specified kernel
* address range.
diff -urN linux/arch/arm/oprofile/common.c linux/arch/arm/oprofile/common.c
--- linux/arch/arm/oprofile/common.c 2005/02/07 02:54:31 1.3
+++ linux/arch/arm/oprofile/common.c 2005/02/13 20:16:14 1.4
@@ -11,6 +11,7 @@
#include <linux/oprofile.h>
#include <linux/errno.h>
#include <asm/semaphore.h>
+#include <linux/sysdev.h>
#include "op_counter.h"
#include "op_arm_model.h"
@@ -25,6 +26,26 @@
static int pmu_create_files(struct super_block *, struct dentry *);
#ifdef CONFIG_PM
+static int pmu_suspend(struct sys_device *dev, u32 state)
+{
+ if (pmu_enabled)
+ pmu_stop();
+ return 0;
+}
+
+static int pmu_resume(struct sys_device *dev)
+{
+ if (pmu_enabled)
+ pmu_start();
+ return 0;
+}
+
+static struct sysdev_class oprofile_sysclass = {
+ set_kset_name("oprofile"),
+ .resume = pmu_resume,
+ .suspend = pmu_suspend,
+};
+
static struct sys_device device_oprofile = {
.id = 0,
.cls = &oprofile_sysclass,
@@ -35,14 +56,14 @@
int ret;
if (!(ret = sysdev_class_register(&oprofile_sysclass)))
- ret = sys_device_register(&device_oprofile);
+ ret = sysdev_register(&device_oprofile);
return ret;
}
-static void __exit exit_driverfs(void)
+static void exit_driverfs(void)
{
- sys_device_unregister(&device_oprofile);
+ sysdev_unregister(&device_oprofile);
sysdev_class_unregister(&oprofile_sysclass);
}
#else
@@ -105,8 +126,7 @@
up(&pmu_sem);
}
-int __init
-pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec)
+int __init pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec
*spec)
{
init_MUTEX(&pmu_sem);
diff -urN linux/arch/arm/oprofile/op_arm_model.h
linux/arch/arm/oprofile/op_arm_model.h
--- linux/arch/arm/oprofile/op_arm_model.h 2004/04/23 15:54:06 1.1
+++ linux/arch/arm/oprofile/op_arm_model.h 2005/02/13 20:16:14 1.2
@@ -24,6 +24,6 @@
extern struct op_arm_model_spec op_xscale_spec;
#endif
-extern int pmu_init(struct oprofile_operations **ops, struct op_arm_model_spec
*spec);
+extern int __init pmu_init(struct oprofile_operations *ops, struct
op_arm_model_spec *spec);
extern void pmu_exit(void);
#endif /* OP_ARM_MODEL_H */
diff -urN linux/arch/arm/oprofile/op_model_xscale.c
linux/arch/arm/oprofile/op_model_xscale.c
--- linux/arch/arm/oprofile/op_model_xscale.c 2005/01/13 14:05:20 1.5
+++ linux/arch/arm/oprofile/op_model_xscale.c 2005/02/13 20:16:14 1.6
@@ -42,6 +42,9 @@
#ifdef CONFIG_ARCH_IOP331
#define XSCALE_PMU_IRQ IRQ_IOP331_CORE_PMU
#endif
+#ifdef CONFIG_ARCH_PXA
+#define XSCALE_PMU_IRQ IRQ_PMU
+#endif
/*
* Different types of events that can be counted by the XScale PMU
@@ -305,9 +308,9 @@
/* Overflow bit gets cleared. There's no workaround. */
/* Fixed in B stepping or later */
- pmnc &= ~(PMU_ENABLE | pmu->cnt_ovf[PMN0] | pmu->cnt_ovf[PMN1] |
- pmu->cnt_ovf[CCNT]);
- write_pmnc(pmnc);
+ /* Write the value back to clear the overflow flags. Overflow */
+ /* flags remain in pmnc for use below */
+ write_pmnc(pmnc & ~PMU_ENABLE);
for (i = CCNT; i <= PMN1; i++) {
if (!(pmu->int_mask[i] & pmu->int_enable))
diff -urN linux/arch/arm/vfp/vfphw.S linux/arch/arm/vfp/vfphw.S
--- linux/arch/arm/vfp/vfphw.S 2004/11/15 11:49:15 1.2
+++ linux/arch/arm/vfp/vfphw.S 2005/02/13 20:16:14 1.3
@@ -62,14 +62,14 @@
@ VFP hardware support entry point.
@
@ r0 = faulted instruction
-@ r5 = faulted PC+4
+@ r2 = faulted PC+4
@ r9 = successful return
@ r10 = vfp_state union
@ lr = failure return
.globl vfp_support_entry
vfp_support_entry:
- DBGSTR3 "instr %08x pc %08x state %p", r0, r5, r10
+ DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10
VFPFMRX r1, FPEXC @ Is the VFP enabled?
DBGSTR1 "fpexc %08x", r1
@@ -80,14 +80,14 @@
ldr r3, last_VFP_context_address
orr r1, r1, #FPEXC_ENABLE @ user FPEXC has the enable bit set
ldr r4, [r3] @ last_VFP_context pointer
- bic r2, r1, #FPEXC_EXCEPTION @ make sure exceptions are disabled
+ bic r5, r1, #FPEXC_EXCEPTION @ make sure exceptions are disabled
cmp r4, r10
beq check_for_exception @ we are returning to the same
@ process, so the registers are
@ still there. In this case, we do
@ not want to drop a pending exception.
- VFPFMXR FPEXC, r2 @ enable VFP, disable any pending
+ VFPFMXR FPEXC, r5 @ enable VFP, disable any pending
@ exceptions, so we can get at the
@ rest of it
@@ -96,14 +96,14 @@
DBGSTR1 "save old state %p", r4
cmp r4, #0
beq no_old_VFP_process
- VFPFMRX r2, FPSCR @ current status
+ VFPFMRX r5, FPSCR @ current status
VFPFMRX r6, FPINST @ FPINST (always there, rev0 onwards)
tst r1, #FPEXC_FPV2 @ is there an FPINST2 to read?
VFPFMRX r8, FPINST2, NE @ FPINST2 if needed - avoids reading
@ nonexistant reg on rev0
VFPFSTMIA r4 @ save the working registers
add r4, r4, #8*16+4
- stmia r4, {r1, r2, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
+ stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
@ and point r4 at the word at the
@ start of the register dump
@@ -112,14 +112,14 @@
str r10, [r3] @ update the last_VFP_context pointer
@ Load the saved state back into the VFP
add r4, r10, #8*16+4
- ldmia r4, {r1, r2, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
+ ldmia r4, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
VFPFLDMIA r10 @ reload the working registers while
@ FPEXC is in a safe state
tst r1, #FPEXC_FPV2 @ is there an FPINST2 to write?
VFPFMXR FPINST2, r8, NE @ FPINST2 if needed - avoids writing
@ nonexistant reg on rev0
VFPFMXR FPINST, r6
- VFPFMXR FPSCR, r2 @ restore status
+ VFPFMXR FPSCR, r5 @ restore status
check_for_exception:
tst r1, #FPEXC_EXCEPTION
@@ -128,16 +128,16 @@
@ out before setting an FPEXC that
@ stops us reading stuff
VFPFMXR FPEXC, r1 @ restore FPEXC last
- sub r5, r5, #4
- str r5, [sp, #S_PC] @ retry the instruction
+ sub r2, r2, #4
+ str r2, [sp, #S_PC] @ retry the instruction
mov pc, r9 @ we think we have handled things
look_for_VFP_exceptions:
tst r1, #FPEXC_EXCEPTION
bne process_exception
- VFPFMRX r2, FPSCR
- tst r2, #FPSCR_IXE @ IXE doesn't set FPEXC_EXCEPTION !
+ VFPFMRX r5, FPSCR
+ tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EXCEPTION !
bne process_exception
@ Fall into hand on to next handler - appropriate coproc instr
@@ -148,8 +148,8 @@
process_exception:
DBGSTR "bounce"
- sub r5, r5, #4
- str r5, [sp, #S_PC] @ retry the instruction on exit from
+ sub r2, r2, #4
+ str r2, [sp, #S_PC] @ retry the instruction on exit from
@ the imprecise exception handling in
@ the support code
mov r2, sp @ nothing stacked - regdump is at TOS
diff -urN linux/arch/frv/kernel/entry.S linux/arch/frv/kernel/entry.S
--- linux/arch/frv/kernel/entry.S 2005/01/25 04:27:54 1.2
+++ linux/arch/frv/kernel/entry.S 2005/02/13 20:16:15 1.3
@@ -782,13 +782,12 @@
###############################################################################
#
# the return path for a newly forked child process
-# - __switch_to() saved the old current pointer in GR27 for us
+# - __switch_to() saved the old current pointer in GR8 for us
#
###############################################################################
.globl ret_from_fork
ret_from_fork:
LEDS 0x6100
- ori.p gr27,0,gr8
call schedule_tail
# fork & co. return 0 to child
diff -urN linux/arch/frv/kernel/irq-routing.c
linux/arch/frv/kernel/irq-routing.c
--- linux/arch/frv/kernel/irq-routing.c 2005/01/13 14:05:22 1.1
+++ linux/arch/frv/kernel/irq-routing.c 2005/02/13 20:16:15 1.2
@@ -82,7 +82,7 @@
int status = 0;
// if (!(action->flags & SA_INTERRUPT))
-// sti();
+// local_irq_enable();
do {
status |= action->flags;
@@ -92,7 +92,7 @@
if (status & SA_SAMPLE_RANDOM)
add_interrupt_randomness(irq);
- cli();
+ local_irq_disable();
}
}
}
diff -urN linux/arch/frv/kernel/irq.c linux/arch/frv/kernel/irq.c
--- linux/arch/frv/kernel/irq.c 2005/01/25 04:27:54 1.2
+++ linux/arch/frv/kernel/irq.c 2005/02/13 20:16:15 1.3
@@ -316,16 +316,16 @@
do_softirq();
#ifdef CONFIG_PREEMPT
- cli();
+ local_irq_disable();
while (--current->preempt_count == 0) {
- if (!(__frame->psr & PSR_S)
- || (current->need_resched == 0)
- || in_interrupt())
+ if (!(__frame->psr & PSR_S) ||
+ current->need_resched == 0 ||
+ in_interrupt())
break;
current->preempt_count++;
- sti();
+ local_irq_enable();
preempt_schedule();
- cli();
+ local_irq_disable();
}
#endif
diff -urN linux/arch/frv/kernel/pm.c linux/arch/frv/kernel/pm.c
--- linux/arch/frv/kernel/pm.c 2005/01/13 14:05:22 1.1
+++ linux/arch/frv/kernel/pm.c 2005/02/13 20:16:15 1.2
@@ -36,7 +36,7 @@
int pm_do_suspend(void)
{
- cli();
+ local_irq_disable();
__set_LEDS(0xb1);
@@ -45,7 +45,7 @@
__set_LEDS(0xb2);
- sti();
+ local_irq_enable();
return 0;
}
@@ -84,7 +84,7 @@
int pm_do_bus_sleep(void)
{
- cli();
+ local_irq_disable();
/*
* Here is where we need some platform-dependent setup
@@ -113,7 +113,7 @@
*/
__power_switch_wake_cleanup();
- sti();
+ local_irq_enable();
return 0;
}
@@ -134,7 +134,7 @@
#define CTL_PM_P0 4
#define CTL_PM_CM 5
-static int user_atoi(char *ubuf, int len)
+static int user_atoi(char *ubuf, size_t len)
{
char buf[16];
unsigned long ret;
@@ -191,7 +191,7 @@
pm_send_all(PM_SUSPEND, (void *)3);
/* now change cmode */
- cli();
+ local_irq_disable();
frv_dma_pause_all();
frv_change_cmode(new_cmode);
@@ -203,7 +203,7 @@
determine_clocks(1);
#endif
frv_dma_resume_all();
- sti();
+ local_irq_enable();
/* tell all the drivers we're resuming */
pm_send_all(PM_RESUME, (void *)0);
diff -urN linux/arch/frv/kernel/semaphore.c linux/arch/frv/kernel/semaphore.c
--- linux/arch/frv/kernel/semaphore.c 2005/01/13 14:05:22 1.1
+++ linux/arch/frv/kernel/semaphore.c 2005/02/13 20:16:15 1.2
@@ -43,17 +43,18 @@
struct task_struct *tsk = current;
struct sem_waiter waiter;
- semtrace(sem,"Entering __down");
+ semtrace(sem, "Entering __down");
/* set up my own style of waitqueue */
- waiter.task = tsk;
+ waiter.task = tsk;
+ get_task_struct(tsk);
list_add_tail(&waiter.list, &sem->wait_list);
/* we don't need to touch the semaphore struct anymore */
spin_unlock_irqrestore(&sem->wait_lock, flags);
- /* wait to be given the lock */
+ /* wait to be given the semaphore */
set_task_state(tsk, TASK_UNINTERRUPTIBLE);
for (;;) {
@@ -64,7 +65,7 @@
}
tsk->state = TASK_RUNNING;
- semtrace(sem,"Leaving __down");
+ semtrace(sem, "Leaving __down");
}
EXPORT_SYMBOL(__down);
@@ -83,6 +84,7 @@
/* set up my own style of waitqueue */
waiter.task = tsk;
+ get_task_struct(tsk);
list_add_tail(&waiter.list, &sem->wait_list);
@@ -91,7 +93,7 @@
spin_unlock_irqrestore(&sem->wait_lock, flags);
- /* wait to be given the lock */
+ /* wait to be given the semaphore */
ret = 0;
for (;;) {
if (list_empty(&waiter.list))
@@ -116,6 +118,8 @@
}
spin_unlock_irqrestore(&sem->wait_lock, flags);
+ if (ret == -EINTR)
+ put_task_struct(current);
goto out;
}
@@ -127,14 +131,24 @@
*/
void __up(struct semaphore *sem)
{
+ struct task_struct *tsk;
struct sem_waiter *waiter;
semtrace(sem,"Entering __up");
/* grant the token to the process at the front of the queue */
waiter = list_entry(sem->wait_list.next, struct sem_waiter, list);
+
+ /* We must be careful not to touch 'waiter' after we set ->task = NULL.
+ * It is an allocated on the waiter's stack and may become invalid at
+ * any time after that point (due to a wakeup from another source).
+ */
list_del_init(&waiter->list);
- wake_up_process(waiter->task);
+ tsk = waiter->task;
+ mb();
+ waiter->task = NULL;
+ wake_up_process(tsk);
+ put_task_struct(tsk);
semtrace(sem,"Leaving __up");
}
diff -urN linux/arch/frv/kernel/signal.c linux/arch/frv/kernel/signal.c
--- linux/arch/frv/kernel/signal.c 2005/01/13 14:05:22 1.1
+++ linux/arch/frv/kernel/signal.c 2005/02/13 20:16:15 1.2
@@ -242,18 +242,9 @@
if (restore_sigcontext(&frame->uc.uc_mcontext, &gr8))
goto badframe;
- if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st)))
+ if (do_sigaltstack(&frame->uc.uc_stack, NULL, __frame->sp) == -EFAULT)
goto badframe;
- /* It is more difficult to avoid calling this function than to
- * call it and ignore errors. */
- /*
- * THIS CANNOT WORK! "&st" is a kernel address, and "do_sigaltstack()"
- * takes a user address (and verifies that it is a user address). End
- * result: it does exactly _nothing_.
- */
- do_sigaltstack(&st, NULL, __frame->sp);
-
return gr8;
badframe:
diff -urN linux/arch/frv/kernel/switch_to.S linux/arch/frv/kernel/switch_to.S
--- linux/arch/frv/kernel/switch_to.S 2005/01/13 14:05:22 1.1
+++ linux/arch/frv/kernel/switch_to.S 2005/02/13 20:16:15 1.2
@@ -43,20 +43,22 @@
###############################################################################
#
-# struct task_struct *__switch_to(struct thread_struct *prev, struct
thread_struct *next)
+# struct task_struct *__switch_to(struct thread_struct *prev_thread,
+# struct thread_struct *next_thread,
+# struct task_struct *prev)
#
###############################################################################
.globl __switch_to
__switch_to:
# save outgoing process's context
- sethi.p %hi(__switch_back),gr11
- setlo %lo(__switch_back),gr11
- movsg lr,gr10
+ sethi.p %hi(__switch_back),gr13
+ setlo %lo(__switch_back),gr13
+ movsg lr,gr12
stdi gr28,@(gr8,#__THREAD_FRAME)
sti sp ,@(gr8,#__THREAD_SP)
sti fp ,@(gr8,#__THREAD_FP)
- stdi gr10,@(gr8,#__THREAD_LR)
+ stdi gr12,@(gr8,#__THREAD_LR)
stdi gr16,@(gr8,#__THREAD_GR(16))
stdi gr18,@(gr8,#__THREAD_GR(18))
stdi gr20,@(gr8,#__THREAD_GR(20))
@@ -68,14 +70,14 @@
ldi.p @(gr8,#__THREAD_USER),gr8
call save_user_regs
or gr22,gr22,gr8
-
+
# retrieve the new context
sethi.p %hi(__kernel_frame0_ptr),gr6
setlo %lo(__kernel_frame0_ptr),gr6
movsg psr,gr4
lddi.p @(gr9,#__THREAD_FRAME),gr10
- or gr29,gr29,gr27 ; ret_from_fork needs to know
old current
+ or gr10,gr10,gr27 ; save prev for the return value
ldi @(gr11,#4),gr19 ; get new_current->thread_info
@@ -88,8 +90,8 @@
andi gr4,#~PSR_ET,gr5
movgs gr5,psr
- or.p gr10,gr0,gr28
- or gr11,gr0,gr29
+ or.p gr10,gr0,gr28 ; set __frame
+ or gr11,gr0,gr29 ; set __current
or.p gr12,gr0,sp
or gr13,gr0,fp
or gr19,gr0,gr15 ; set __current_thread_info
@@ -108,14 +110,17 @@
111:
# jump to __switch_back or ret_from_fork as appropriate
+ # - move prev to GR8
movgs gr4,psr
- jmpl @(gr18,gr0)
+ jmpl.p @(gr18,gr0)
+ or gr27,gr27,gr8
###############################################################################
#
# restore incoming process's context
# - on entry:
# - SP, FP, LR, GR15, GR28 and GR29 will have been set up appropriately
+# - GR8 will point to the outgoing task_struct
# - GR9 will point to the incoming thread_struct
#
###############################################################################
@@ -128,12 +133,16 @@
lddi @(gr9,#__THREAD_GR(26)),gr26
# fall through into restore_user_regs()
- ldi @(gr9,#__THREAD_USER),gr8
+ ldi.p @(gr9,#__THREAD_USER),gr8
+ or gr8,gr8,gr9
###############################################################################
#
# restore extra general regs and FP/Media regs
-# - void restore_user_regs(const struct user_context *target)
+# - void *restore_user_regs(const struct user_context *target, void *retval)
+# - on entry:
+# - GR8 will point to the user context to swap in
+# - GR9 will contain the value to be returned in GR8 (prev task on context
switch)
#
###############################################################################
.globl restore_user_regs
@@ -245,6 +254,7 @@
lddi @(gr8,#__FPMEDIA_FNER(0)),gr4
movsg fner0,gr4
movsg fner1,gr5
+ or.p gr9,gr9,gr8
bralr
# the FR451 also has ACC8-11/ACCG8-11 regs (but not 4-7...)
diff -urN linux/arch/frv/kernel/vmlinux.lds.S
linux/arch/frv/kernel/vmlinux.lds.S
--- linux/arch/frv/kernel/vmlinux.lds.S 2005/01/13 14:05:22 1.1
+++ linux/arch/frv/kernel/vmlinux.lds.S 2005/02/13 20:16:15 1.2
@@ -1,4 +1,4 @@
-/* ld script to make FRV Linux kernel -*- c -*-
+/* ld script to make FRV Linux kernel
* Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>;
*/
OUTPUT_FORMAT("elf32-frv", "elf32-frv", "elf32-frv")
diff -urN linux/arch/i386/crypto/aes.c linux/arch/i386/crypto/aes.c
--- linux/arch/i386/crypto/aes.c 2004/08/13 07:18:51 1.1
+++ linux/arch/i386/crypto/aes.c 2005/02/13 20:16:15 1.2
@@ -93,12 +93,12 @@
u32 ft_tab[4][256];
u32 fl_tab[4][256];
-u32 ls_tab[4][256];
-u32 im_tab[4][256];
+static u32 ls_tab[4][256];
+static u32 im_tab[4][256];
u32 il_tab[4][256];
u32 it_tab[4][256];
-void gen_tabs(void)
+static void gen_tabs(void)
{
u32 i, w;
u8 pow[512], log[256];
diff -urN linux/arch/i386/kernel/pci-dma.c linux/arch/i386/kernel/pci-dma.c
--- linux/arch/i386/kernel/pci-dma.c 2005/02/07 02:54:31 1.10
+++ linux/arch/i386/kernel/pci-dma.c 2005/02/13 20:16:15 1.11
@@ -89,11 +89,11 @@
if (!mem_base)
goto out;
- dev->dma_mem = kmalloc(GFP_KERNEL, sizeof(struct dma_coherent_mem));
+ dev->dma_mem = kmalloc(sizeof(struct dma_coherent_mem), GFP_KERNEL);
if (!dev->dma_mem)
goto out;
memset(dev->dma_mem, 0, sizeof(struct dma_coherent_mem));
- dev->dma_mem->bitmap = kmalloc(GFP_KERNEL, bitmap_size);
+ dev->dma_mem->bitmap = kmalloc(bitmap_size, GFP_KERNEL);
if (!dev->dma_mem->bitmap)
goto free1_out;
memset(dev->dma_mem->bitmap, 0, bitmap_size);
diff -urN linux/arch/i386/kernel/time_hpet.c linux/arch/i386/kernel/time_hpet.c
--- linux/arch/i386/kernel/time_hpet.c 2004/11/15 11:49:16 1.7
+++ linux/arch/i386/kernel/time_hpet.c 2005/02/13 20:16:15 1.8
@@ -81,6 +81,11 @@
cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
HPET_TN_SETVAL | HPET_TN_32BIT;
hpet_writel(cfg, HPET_T0_CFG);
+ /*
+ * Some systems seems to need two writes to HPET_T0_CMP,
+ * to get interrupts working
+ */
+ hpet_writel(tick, HPET_T0_CMP);
hpet_writel(tick, HPET_T0_CMP);
/*
diff -urN linux/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c
linux/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c
--- linux/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c 2004/11/15 11:49:16
1.8
+++ linux/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c 2005/02/13 20:16:15
1.9
@@ -160,7 +160,10 @@
printk(KERN_DEBUG "speedstep-lib: couldn't detect FSB speed.
Please send an e-mail to <linux@brodo.de>\n");
/* Multiplier. */
- mult = msr_lo >> 24;
+ if (c->x86_model < 2)
+ mult = msr_lo >> 27;
+ else
+ mult = msr_lo >> 24;
dprintk("P4 - FSB %u kHz; Multiplier %u; Speed %u kHz\n", fsb, mult,
(fsb * mult));
diff -urN linux/arch/i386/lib/usercopy.c linux/arch/i386/lib/usercopy.c
--- linux/arch/i386/lib/usercopy.c 2004/09/19 12:30:03 1.18
+++ linux/arch/i386/lib/usercopy.c 2005/02/13 20:16:15 1.19
@@ -514,6 +514,7 @@
unsigned long __copy_to_user_ll(void __user *to, const void *from, unsigned
long n)
{
+ BUG_ON((long) n < 0);
#ifndef CONFIG_X86_WP_WORKS_OK
if (unlikely(boot_cpu_data.wp_works_ok == 0) &&
((unsigned long )to) < TASK_SIZE) {
@@ -573,6 +574,7 @@
unsigned long
__copy_from_user_ll(void *to, const void __user *from, unsigned long n)
{
+ BUG_ON((long)n < 0);
if (movsl_is_ok(to, from, n))
__copy_user_zeroing(to, from, n);
else
@@ -597,6 +599,7 @@
copy_to_user(void __user *to, const void *from, unsigned long n)
{
might_sleep();
+ BUG_ON((long) n < 0);
if (access_ok(VERIFY_WRITE, to, n))
n = __copy_to_user(to, from, n);
return n;
@@ -623,6 +626,7 @@
copy_from_user(void *to, const void __user *from, unsigned long n)
{
might_sleep();
+ BUG_ON((long) n < 0);
if (access_ok(VERIFY_READ, from, n))
n = __copy_from_user(to, from, n);
else
diff -urN linux/arch/i386/oprofile/nmi_int.c linux/arch/i386/oprofile/nmi_int.c
--- linux/arch/i386/oprofile/nmi_int.c 2005/02/07 02:54:32 1.19
+++ linux/arch/i386/oprofile/nmi_int.c 2005/02/13 20:16:15 1.20
@@ -70,7 +70,7 @@
}
-static void __exit exit_driverfs(void)
+static void exit_driverfs(void)
{
sysdev_unregister(&device_oprofile);
sysdev_class_unregister(&oprofile_sysclass);
@@ -420,7 +420,7 @@
}
-void __exit nmi_exit(void)
+void nmi_exit(void)
{
if (using_nmi)
exit_driverfs();
diff -urN linux/arch/ia64/Kconfig linux/arch/ia64/Kconfig
--- linux/arch/ia64/Kconfig 2005/01/25 04:27:56 1.38
+++ linux/arch/ia64/Kconfig 2005/02/13 20:16:15 1.39
@@ -158,14 +158,6 @@
depends on ITANIUM
default y
-config ITANIUM_BSTEP_SPECIFIC
- bool "Itanium B-step specific code"
- depends on ITANIUM
- help
- Select this option to build a kernel for an Itanium prototype system
- with a B-step CPU. You have a B-step CPU if the "revision" field in
- /proc/cpuinfo has a value in the range from 1 to 4.
-
# align cache-sensitive data to 128 bytes
config IA64_L1_CACHE_SHIFT
int
diff -urN linux/arch/ia64/Makefile linux/arch/ia64/Makefile
--- linux/arch/ia64/Makefile 2005/01/25 04:27:56 1.47
+++ linux/arch/ia64/Makefile 2005/02/13 20:16:15 1.48
@@ -46,8 +46,6 @@
cflags-$(CONFIG_MCKINLEY) += -mtune=mckinley
endif
-cflags-$(CONFIG_ITANIUM_BSTEP_SPECIFIC) += -mb-step
-
CFLAGS += $(cflags-y)
head-y := arch/ia64/kernel/head.o arch/ia64/kernel/init_task.o
diff -urN linux/arch/ia64/configs/bigsur_defconfig
linux/arch/ia64/configs/bigsur_defconfig
--- linux/arch/ia64/configs/bigsur_defconfig 2004/12/04 18:15:59 1.2
+++ linux/arch/ia64/configs/bigsur_defconfig 2005/02/13 20:16:16 1.3
@@ -73,7 +73,6 @@
CONFIG_IA64_PAGE_SIZE_16KB=y
# CONFIG_IA64_PAGE_SIZE_64KB is not set
CONFIG_IA64_BRL_EMU=y
-# CONFIG_ITANIUM_BSTEP_SPECIFIC is not set
CONFIG_IA64_L1_CACHE_SHIFT=6
# CONFIG_NUMA is not set
# CONFIG_VIRTUAL_MEM_MAP is not set
diff -urN linux/arch/ia64/ia32/ia32_signal.c linux/arch/ia64/ia32/ia32_signal.c
--- linux/arch/ia64/ia32/ia32_signal.c 2005/01/13 14:05:26 1.26
+++ linux/arch/ia64/ia32/ia32_signal.c 2005/02/13 20:16:16 1.27
@@ -1,7 +1,7 @@
/*
* IA32 Architecture-specific signal handling support.
*
- * Copyright (C) 1999, 2001-2002 Hewlett-Packard Co
+ * Copyright (C) 1999, 2001-2002, 2005 Hewlett-Packard Co
* David Mosberger-Tang <davidm@hpl.hp.com>
* Copyright (C) 1999 Arun Sharma <arun.sharma@intel.com>
* Copyright (C) 2000 VA Linux Co
@@ -970,11 +970,10 @@
}
asmlinkage long
-sys32_sigreturn (int arg0, int arg1, int arg2, int arg3, int arg4, int arg5,
int arg6, int arg7,
- unsigned long stack)
+sys32_sigreturn (int arg0, int arg1, int arg2, int arg3, int arg4, int arg5,
+ int arg6, int arg7, struct pt_regs regs)
{
- struct pt_regs *regs = (struct pt_regs *) &stack;
- unsigned long esp = (unsigned int) regs->r12;
+ unsigned long esp = (unsigned int) regs.r12;
struct sigframe_ia32 __user *frame = (struct sigframe_ia32 __user
*)(esp - 8);
sigset_t set;
int eax;
@@ -993,7 +992,7 @@
recalc_sigpending();
spin_unlock_irq(¤t->sighand->siglock);
- if (restore_sigcontext_ia32(regs, &frame->sc, &eax))
+ if (restore_sigcontext_ia32(®s, &frame->sc, &eax))
goto badframe;
return eax;
@@ -1003,11 +1002,10 @@
}
asmlinkage long
-sys32_rt_sigreturn (int arg0, int arg1, int arg2, int arg3, int arg4, int
arg5, int arg6, int arg7,
- unsigned long stack)
+sys32_rt_sigreturn (int arg0, int arg1, int arg2, int arg3, int arg4,
+ int arg5, int arg6, int arg7, struct pt_regs regs)
{
- struct pt_regs *regs = (struct pt_regs *) &stack;
- unsigned long esp = (unsigned int) regs->r12;
+ unsigned long esp = (unsigned int) regs.r12;
struct rt_sigframe_ia32 __user *frame = (struct rt_sigframe_ia32 __user
*)(esp - 4);
sigset_t set;
int eax;
@@ -1023,7 +1021,7 @@
recalc_sigpending();
spin_unlock_irq(¤t->sighand->siglock);
- if (restore_sigcontext_ia32(regs, &frame->uc.uc_mcontext, &eax))
+ if (restore_sigcontext_ia32(®s, &frame->uc.uc_mcontext, &eax))
goto badframe;
/* It is more difficult to avoid calling this function than to
diff -urN linux/arch/ia64/ia32/sys_ia32.c linux/arch/ia64/ia32/sys_ia32.c
--- linux/arch/ia64/ia32/sys_ia32.c 2005/02/07 02:54:32 1.71
+++ linux/arch/ia64/ia32/sys_ia32.c 2005/02/13 20:16:16 1.72
@@ -6,7 +6,7 @@
* Copyright (C) 1999 Arun Sharma <arun.sharma@intel.com>
* Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
* Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 2000-2003 Hewlett-Packard Co
+ * Copyright (C) 2000-2003, 2005 Hewlett-Packard Co
* David Mosberger-Tang <davidm@hpl.hp.com>
* Copyright (C) 2004 Gordon Jin <gordon.jin@intel.com>
*
@@ -1415,7 +1415,7 @@
case SHMDT:
return sys_shmdt(compat_ptr(ptr));
case SHMGET:
- return sys_shmget(first, second, third);
+ return sys_shmget(first, (unsigned)second, third);
case SHMCTL:
return compat_sys_shmctl(first, second, compat_ptr(ptr));
@@ -1436,7 +1436,7 @@
}
static unsigned int
-ia32_peek (struct pt_regs *regs, struct task_struct *child, unsigned long
addr, unsigned int *val)
+ia32_peek (struct task_struct *child, unsigned long addr, unsigned int *val)
{
size_t copied;
unsigned int ret;
@@ -1446,7 +1446,7 @@
}
static unsigned int
-ia32_poke (struct pt_regs *regs, struct task_struct *child, unsigned long
addr, unsigned int val)
+ia32_poke (struct task_struct *child, unsigned long addr, unsigned int val)
{
if (access_process_vm(child, addr, &val, sizeof(val), 1) != sizeof(val))
@@ -1751,25 +1751,16 @@
return 0;
}
-/*
- * Note that the IA32 version of `ptrace' calls the IA64 routine for
- * many of the requests. This will only work for requests that do
- * not need access to the calling processes `pt_regs' which is located
- * at the address of `stack'. Once we call the IA64 `sys_ptrace' then
- * the address of `stack' will not be the address of the `pt_regs'.
- */
asmlinkage long
-sys32_ptrace (int request, pid_t pid, unsigned int addr, unsigned int data,
- long arg4, long arg5, long arg6, long arg7, long stack)
+sys32_ptrace (int request, pid_t pid, unsigned int addr, unsigned int data)
{
- struct pt_regs *regs = (struct pt_regs *) &stack;
struct task_struct *child;
unsigned int value, tmp;
long i, ret;
lock_kernel();
if (request == PTRACE_TRACEME) {
- ret = sys_ptrace(request, pid, addr, data, arg4, arg5, arg6,
arg7, stack);
+ ret = sys_ptrace(request, pid, addr, data);
goto out;
}
@@ -1786,7 +1777,7 @@
goto out_tsk;
if (request == PTRACE_ATTACH) {
- ret = sys_ptrace(request, pid, addr, data, arg4, arg5, arg6,
arg7, stack);
+ ret = sys_ptrace(request, pid, addr, data);
goto out_tsk;
}
@@ -1797,7 +1788,7 @@
switch (request) {
case PTRACE_PEEKTEXT:
case PTRACE_PEEKDATA: /* read word at location addr */
- ret = ia32_peek(regs, child, addr, &value);
+ ret = ia32_peek(child, addr, &value);
if (ret == 0)
ret = put_user(value, (unsigned int __user *)
compat_ptr(data));
else
@@ -1806,7 +1797,7 @@
case PTRACE_POKETEXT:
case PTRACE_POKEDATA: /* write the word at location addr */
- ret = ia32_poke(regs, child, addr, data);
+ ret = ia32_poke(child, addr, data);
goto out_tsk;
case PTRACE_PEEKUSR: /* read word at addr in USER area */
@@ -1882,7 +1873,7 @@
case PTRACE_KILL:
case PTRACE_SINGLESTEP: /* execute chile for one instruction */
case PTRACE_DETACH: /* detach a process */
- ret = sys_ptrace(request, pid, addr, data, arg4, arg5, arg6,
arg7, stack);
+ ret = sys_ptrace(request, pid, addr, data);
break;
default:
@@ -1905,9 +1896,9 @@
asmlinkage long
sys32_sigaltstack (ia32_stack_t __user *uss32, ia32_stack_t __user *uoss32,
- long arg2, long arg3, long arg4, long arg5, long arg6, long
arg7, long stack)
+ long arg2, long arg3, long arg4, long arg5, long arg6,
+ long arg7, struct pt_regs pt)
{
- struct pt_regs *pt = (struct pt_regs *) &stack;
stack_t uss, uoss;
ia32_stack_t buf32;
int ret;
@@ -1928,7 +1919,7 @@
}
set_fs(KERNEL_DS);
ret = do_sigaltstack(uss32 ? (stack_t __user *) &uss : NULL,
- (stack_t __user *) &uoss, pt->r12);
+ (stack_t __user *) &uoss, pt.r12);
current->sas_ss_size = buf32.ss_size;
set_fs(old_fs);
out:
diff -urN linux/arch/ia64/kernel/asm-offsets.c
linux/arch/ia64/kernel/asm-offsets.c
--- linux/arch/ia64/kernel/asm-offsets.c 2005/01/25 04:27:57 1.7
+++ linux/arch/ia64/kernel/asm-offsets.c 2005/02/13 20:16:16 1.8
@@ -193,9 +193,17 @@
DEFINE(IA64_CLONE_VM, CLONE_VM);
BLANK();
- DEFINE(IA64_CPUINFO_NSEC_PER_CYC_OFFSET, offsetof (struct cpuinfo_ia64,
nsec_per_cyc));
- DEFINE(IA64_TIMESPEC_TV_NSEC_OFFSET, offsetof (struct timespec,
tv_nsec));
-
+ DEFINE(IA64_CPUINFO_NSEC_PER_CYC_OFFSET,
+ offsetof (struct cpuinfo_ia64, nsec_per_cyc));
+ DEFINE(IA64_CPUINFO_PTCE_BASE_OFFSET,
+ offsetof (struct cpuinfo_ia64, ptce_base));
+ DEFINE(IA64_CPUINFO_PTCE_COUNT_OFFSET,
+ offsetof (struct cpuinfo_ia64, ptce_count));
+ DEFINE(IA64_CPUINFO_PTCE_STRIDE_OFFSET,
+ offsetof (struct cpuinfo_ia64, ptce_stride));
+ BLANK();
+ DEFINE(IA64_TIMESPEC_TV_NSEC_OFFSET,
+ offsetof (struct timespec, tv_nsec));
DEFINE(CLONE_SETTLS_BIT, 19);
#if CLONE_SETTLS != (1<<19)
@@ -203,19 +211,16 @@
#endif
BLANK();
- /* used by arch/ia64/kernel/mca_asm.S */
- DEFINE(IA64_CPUINFO_PERCPU_PADDR, offsetof (struct cpuinfo_ia64,
percpu_paddr));
- DEFINE(IA64_CPUINFO_PAL_PADDR, offsetof (struct cpuinfo_ia64,
pal_paddr));
- DEFINE(IA64_CPUINFO_PA_MCA_INFO, offsetof (struct cpuinfo_ia64,
ia64_pa_mca_data));
- DEFINE(IA64_MCA_PROC_STATE_DUMP, offsetof (struct ia64_mca_cpu_s,
ia64_mca_proc_state_dump));
- DEFINE(IA64_MCA_STACK, offsetof (struct ia64_mca_cpu_s,
ia64_mca_stack));
- DEFINE(IA64_MCA_STACKFRAME, offsetof (struct ia64_mca_cpu_s,
ia64_mca_stackframe));
- DEFINE(IA64_MCA_BSPSTORE, offsetof (struct ia64_mca_cpu_s,
ia64_mca_bspstore));
- DEFINE(IA64_INIT_STACK, offsetof (struct ia64_mca_cpu_s,
ia64_init_stack));
-
- /* used by head.S */
- DEFINE(IA64_CPUINFO_NSEC_PER_CYC_OFFSET, offsetof (struct cpuinfo_ia64,
nsec_per_cyc));
-
+ DEFINE(IA64_MCA_CPU_PROC_STATE_DUMP_OFFSET,
+ offsetof (struct ia64_mca_cpu, proc_state_dump));
+ DEFINE(IA64_MCA_CPU_STACK_OFFSET,
+ offsetof (struct ia64_mca_cpu, stack));
+ DEFINE(IA64_MCA_CPU_STACKFRAME_OFFSET,
+ offsetof (struct ia64_mca_cpu, stackframe));
+ DEFINE(IA64_MCA_CPU_RBSTORE_OFFSET,
+ offsetof (struct ia64_mca_cpu, rbstore));
+ DEFINE(IA64_MCA_CPU_INIT_STACK_OFFSET,
+ offsetof (struct ia64_mca_cpu, init_stack));
BLANK();
/* used by fsys_gettimeofday in arch/ia64/kernel/fsys.S */
DEFINE(IA64_TIME_INTERPOLATOR_ADDRESS_OFFSET, offsetof (struct
time_interpolator, addr));
diff -urN linux/arch/ia64/kernel/efi.c linux/arch/ia64/kernel/efi.c
--- linux/arch/ia64/kernel/efi.c 2005/02/07 02:54:32 1.39
+++ linux/arch/ia64/kernel/efi.c 2005/02/13 20:16:16 1.40
@@ -415,8 +415,8 @@
* Abstraction Layer chapter 11 in ADAG
*/
-static efi_memory_desc_t *
-pal_code_memdesc (void)
+void *
+efi_get_pal_addr (void)
{
void *efi_map_start, *efi_map_end, *p;
efi_memory_desc_t *md;
@@ -474,51 +474,31 @@
md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT),
vaddr & mask, (vaddr & mask) + IA64_GRANULE_SIZE);
#endif
- return md;
+ return __va(md->phys_addr);
}
-
+ printk(KERN_WARNING "%s: no PAL-code memory-descriptor found",
+ __FUNCTION__);
return NULL;
}
void
-efi_get_pal_addr (void)
-{
- efi_memory_desc_t *md = pal_code_memdesc();
- u64 vaddr, mask;
- struct cpuinfo_ia64 *cpuinfo;
-
- if (md != NULL) {
-
- vaddr = PAGE_OFFSET + md->phys_addr;
- mask = ~((1 << IA64_GRANULE_SHIFT) - 1);
-
- cpuinfo = (struct cpuinfo_ia64
*)__va(ia64_get_kr(IA64_KR_PA_CPU_INFO));
- cpuinfo->pal_base = vaddr & mask;
- cpuinfo->pal_paddr = pte_val(mk_pte_phys(md->phys_addr,
PAGE_KERNEL));
- }
-}
-
-void
efi_map_pal_code (void)
{
- efi_memory_desc_t *md = pal_code_memdesc();
- u64 vaddr, mask, psr;
-
- if (md != NULL) {
+ void *pal_vaddr = efi_get_pal_addr ();
+ u64 psr;
- vaddr = PAGE_OFFSET + md->phys_addr;
- mask = ~((1 << IA64_GRANULE_SHIFT) - 1);
+ if (!pal_vaddr)
+ return;
- /*
- * Cannot write to CRx with PSR.ic=1
- */
- psr = ia64_clear_ic();
- ia64_itr(0x1, IA64_TR_PALCODE, vaddr & mask,
- pte_val(pfn_pte(md->phys_addr >> PAGE_SHIFT,
PAGE_KERNEL)),
- IA64_GRANULE_SHIFT);
- ia64_set_psr(psr); /* restore psr */
- ia64_srlz_i();
- }
+ /*
+ * Cannot write to CRx with PSR.ic=1
+ */
+ psr = ia64_clear_ic();
+ ia64_itr(0x1, IA64_TR_PALCODE, GRANULEROUNDDOWN((unsigned long)
pal_vaddr),
+ pte_val(pfn_pte(__pa(pal_vaddr) >> PAGE_SHIFT, PAGE_KERNEL)),
+ IA64_GRANULE_SHIFT);
+ ia64_set_psr(psr); /* restore psr */
+ ia64_srlz_i();
}
void __init
diff -urN linux/arch/ia64/kernel/entry.S linux/arch/ia64/kernel/entry.S
--- linux/arch/ia64/kernel/entry.S 2005/02/07 02:54:32 1.54
+++ linux/arch/ia64/kernel/entry.S 2005/02/13 20:16:16 1.55
@@ -558,7 +558,7 @@
.mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot
for r8
.mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in
slot for r10
br.call.sptk.many rp=syscall_trace_leave // give parent a chance to
catch return value
-.ret3: br.cond.sptk ia64_leave_syscall
+.ret3: br.cond.sptk .work_pending_syscall_end
strace_error:
ld8 r3=[r2] // load pt_regs.r8
@@ -621,10 +621,7 @@
PT_REGS_UNWIND_INFO(0)
cmp.ge p6,p7=r8,r0 // syscall executed
successfully?
adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
- adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
- ;;
-.mem.offset 0,0; (p6) st8.spill [r2]=r8 // store return value in slot
for r8 and set unat bit
-.mem.offset 8,0; (p6) st8.spill [r3]=r0 // clear error indication in
slot for r10 and set unat bit
+ mov r10=r0 // clear error indication in r10
(p7) br.cond.spnt handle_syscall_error // handle potential syscall
failure
END(ia64_ret_from_syscall)
// fall through
@@ -709,27 +706,23 @@
ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for
"loadrs"
mov b7=r0 // clear b7
;;
- ld8 r23=[r3],PT(R9)-PT(AR_BSPSTORE) // load ar.bspstore (may be
garbage)
- ld8 r18=[r2],PT(R8)-PT(B6) // load b6
+ ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be
garbage)
+ ld8 r18=[r2],PT(R9)-PT(B6) // load b6
(p6) and r15=TIF_WORK_MASK,r31 // any work other than
TIF_SYSCALL_TRACE?
;;
mov r16=ar.bsp // M2 get existing backing
store pointer
(p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending?
-(p6) br.cond.spnt .work_pending
+(p6) br.cond.spnt .work_pending_syscall
;;
// start restoring the state saved on the kernel stack (struct pt_regs):
- ld8.fill r8=[r2],16
- ld8.fill r9=[r3],16
+ ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
+ ld8 r11=[r3],PT(CR_IIP)-PT(R11)
mov f6=f0 // clear f6
;;
invala // M0|1 invalidate ALAT
rsm psr.i | psr.ic // M2 initiate turning off of interrupt and
interruption collection
mov f9=f0 // clear f9
- ld8.fill r10=[r2],16
- ld8.fill r11=[r3],16
- mov f7=f0 // clear f7
- ;;
ld8 r29=[r2],16 // load cr.ipsr
ld8 r28=[r3],16 // load cr.iip
mov f8=f0 // clear f8
@@ -760,7 +753,7 @@
;;
srlz.d // M0 ensure interruption collection is off
ld8.fill r13=[r3],16
- nop.i 0
+ mov f7=f0 // clear f7
;;
ld8.fill r12=[r2] // restore r12 (sp)
ld8.fill r15=[r3] // restore r15
@@ -770,8 +763,8 @@
(pUStk) st1 [r14]=r17
mov b6=r18 // I0 restore b6
;;
- shr.u r18=r19,16 // I0|1 get byte size of existing "dirty"
partition
mov r14=r0 // clear r14
+ shr.u r18=r19,16 // I0|1 get byte size of existing "dirty"
partition
(pKStk) br.cond.dpnt.many skip_rbs_switch
mov.m ar.ccv=r0 // clear ar.ccv
@@ -987,7 +980,7 @@
shladd in0=loc1,3,r17
mov in1=0
;;
- .align 32
+ TEXT_ALIGN(32)
rse_clear_invalid:
#ifdef CONFIG_ITANIUM
// cycle 0
@@ -1083,6 +1076,12 @@
* On exit:
* p6 = TRUE if work-pending-check needs to be redone
*/
+.work_pending_syscall:
+ add r2=-8,r2
+ add r3=-8,r3
+ ;;
+ st8 [r2]=r8
+ st8 [r3]=r10
.work_pending:
tbit.nz p6,p0=r31,TIF_SIGDELAYED // signal delayed from
MCA/INIT/NMI/PMI context?
(p6) br.cond.sptk.few .sigdelayed
@@ -1104,13 +1103,13 @@
;;
(pKStk) st4 [r20]=r0 // preempt_count() <- 0
#endif
-(pLvSys)br.cond.sptk.many .work_processed_syscall // re-check
+(pLvSys)br.cond.sptk.few .work_pending_syscall_end
br.cond.sptk.many .work_processed_kernel // re-check
.notify:
(pUStk) br.call.spnt.many rp=notify_resume_user
.ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0
-(pLvSys)br.cond.sptk.many .work_processed_syscall // don't re-check
+(pLvSys)br.cond.sptk.few .work_pending_syscall_end
br.cond.sptk.many .work_processed_kernel // don't re-check
// There is a delayed signal that was detected in MCA/INIT/NMI/PMI context
where
@@ -1121,9 +1120,17 @@
.sigdelayed:
br.call.sptk.many rp=do_sigdelayed
cmp.eq p6,p0=r0,r0 // p6 <- 1, always
re-check
-(pLvSys)br.cond.sptk.many .work_processed_syscall // re-check
+(pLvSys)br.cond.sptk.few .work_pending_syscall_end
br.cond.sptk.many .work_processed_kernel // re-check
+.work_pending_syscall_end:
+ adds r2=PT(R8)+16,r12
+ adds r3=PT(R10)+16,r12
+ ;;
+ ld8 r8=[r2]
+ ld8 r10=[r3]
+ br.cond.sptk.many .work_processed_syscall // re-check
+
END(ia64_leave_kernel)
ENTRY(handle_syscall_error)
@@ -1135,17 +1142,11 @@
*/
PT_REGS_UNWIND_INFO(0)
ld8 r3=[r2] // load pt_regs.r8
- sub r9=0,r8 // negate return value to get errno
;;
- mov r10=-1 // return -1 in pt_regs.r10 to indicate error
cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0?
- adds r3=16,r2 // r3=&pt_regs.r10
- ;;
-(p6) mov r9=r8
-(p6) mov r10=0
;;
-.mem.offset 0,0; st8.spill [r2]=r9 // store errno in pt_regs.r8 and set
unat bit
-.mem.offset 8,0; st8.spill [r3]=r10 // store error indication in
pt_regs.r10 and set unat bit
+(p7) mov r10=-1
+(p7) sub r8=0,r8 // negate return value to get errno
br.cond.sptk ia64_leave_syscall
END(handle_syscall_error)
diff -urN linux/arch/ia64/kernel/head.S linux/arch/ia64/kernel/head.S
--- linux/arch/ia64/kernel/head.S 2005/01/25 04:27:57 1.30
+++ linux/arch/ia64/kernel/head.S 2005/02/13 20:16:16 1.31
@@ -5,7 +5,7 @@
* to set up the kernel's global pointer and jump to the kernel
* entry point.
*
- * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co
+ * Copyright (C) 1998-2001, 2003, 2005 Hewlett-Packard Co
* David Mosberger-Tang <davidm@hpl.hp.com>
* Stephane Eranian <eranian@hpl.hp.com>
* Copyright (C) 1999 VA Linux Systems
@@ -232,21 +232,6 @@
;;
(isBP) st8 [r2]=r28 // save the address of the boot param area
passed by the bootloader
-#ifdef CONFIG_IA64_EARLY_PRINTK
- .rodata
-alive_msg:
- stringz "I'm alive and well\n"
-alive_msg_end:
- .previous
-
- alloc r2=ar.pfs,0,0,2,0
- movl out0=alive_msg
- movl out1=alive_msg_end-alive_msg-1
- ;;
- br.call.sptk.many rp=early_printk
-1: // force new bundle
-#endif /* CONFIG_IA64_EARLY_PRINTK */
-
#ifdef CONFIG_SMP
(isAP) br.call.sptk.many rp=start_secondary
.ret0:
@@ -267,7 +252,9 @@
;;
ld8 out0=[r3]
br.call.sptk.many b0=console_print
-self: br.sptk.many self // endless loop
+
+self: hint @pause
+ br.sptk.many self // endless loop
END(_start)
GLOBAL_ENTRY(ia64_save_debug_regs)
diff -urN linux/arch/ia64/kernel/ivt.S linux/arch/ia64/kernel/ivt.S
--- linux/arch/ia64/kernel/ivt.S 2005/02/07 02:54:32 1.25
+++ linux/arch/ia64/kernel/ivt.S 2005/02/13 20:16:16 1.26
@@ -548,7 +548,7 @@
#endif
mov pr=r31,-1 // restore pr
rfi
-END(idirty_bit)
+END(dirty_bit)
.org ia64_ivt+0x2400
/////////////////////////////////////////////////////////////////////////////////////////
diff -urN linux/arch/ia64/kernel/mca.c linux/arch/ia64/kernel/mca.c
--- linux/arch/ia64/kernel/mca.c 2005/02/07 02:54:32 1.41
+++ linux/arch/ia64/kernel/mca.c 2005/02/13 20:16:16 1.42
@@ -67,6 +67,7 @@
#include <asm/delay.h>
#include <asm/machvec.h>
+#include <asm/meminit.h>
#include <asm/page.h>
#include <asm/ptrace.h>
#include <asm/system.h>
@@ -86,6 +87,12 @@
ia64_mca_sal_to_os_state_t ia64_sal_to_os_handoff_state;
ia64_mca_os_to_sal_state_t ia64_os_to_sal_handoff_state;
u64 ia64_mca_serialize;
+DEFINE_PER_CPU(u64, ia64_mca_data); /* == __per_cpu_mca[smp_processor_id()] */
+DEFINE_PER_CPU(u64, ia64_mca_per_cpu_pte); /* PTE to map per-CPU area */
+DEFINE_PER_CPU(u64, ia64_mca_pal_pte); /* PTE to map PAL code */
+DEFINE_PER_CPU(u64, ia64_mca_pal_base); /* vaddr PAL code granule */
+
+unsigned long __per_cpu_mca[NR_CPUS];
/* In mca_asm.S */
extern void ia64_monarch_init_handler (void);
@@ -1195,6 +1202,53 @@
};
#endif /* CONFIG_ACPI */
+/* Do per-CPU MCA-related initialization. */
+
+void __devinit
+ia64_mca_cpu_init(void *cpu_data)
+{
+ void *pal_vaddr;
+
+ if (smp_processor_id() == 0) {
+ void *mca_data;
+ int cpu;
+
+ mca_data = alloc_bootmem(sizeof(struct ia64_mca_cpu)
+ * NR_CPUS);
+ for (cpu = 0; cpu < NR_CPUS; cpu++) {
+ __per_cpu_mca[cpu] = __pa(mca_data);
+ mca_data += sizeof(struct ia64_mca_cpu);
+ }
+ }
+
+ /*
+ * The MCA info structure was allocated earlier and its
+ * physical address saved in __per_cpu_mca[cpu]. Copy that
+ * address * to ia64_mca_data so we can access it as a per-CPU
+ * variable.
+ */
+ __get_cpu_var(ia64_mca_data) = __per_cpu_mca[smp_processor_id()];
+
+ /*
+ * Stash away a copy of the PTE needed to map the per-CPU page.
+ * We may need it during MCA recovery.
+ */
+ __get_cpu_var(ia64_mca_per_cpu_pte) =
+ pte_val(mk_pte_phys(__pa(cpu_data), PAGE_KERNEL));
+
+ /*
+ * Also, stash away a copy of the PAL address and the PTE
+ * needed to map it.
+ */
+ pal_vaddr = efi_get_pal_addr();
+ if (!pal_vaddr)
+ return;
+ __get_cpu_var(ia64_mca_pal_base) =
+ GRANULEROUNDDOWN((unsigned long) pal_vaddr);
+ __get_cpu_var(ia64_mca_pal_pte) = pte_val(mk_pte_phys(__pa(pal_vaddr),
+ PAGE_KERNEL));
+}
+
/*
* ia64_mca_init
*
diff -urN linux/arch/ia64/kernel/mca_asm.S linux/arch/ia64/kernel/mca_asm.S
--- linux/arch/ia64/kernel/mca_asm.S 2005/01/25 04:27:57 1.17
+++ linux/arch/ia64/kernel/mca_asm.S 2005/02/13 20:16:16 1.18
@@ -101,6 +101,11 @@
ld8 tmp=[sal_to_os_handoff];; \
st8 [os_to_sal_handoff]=tmp;;
+#define GET_IA64_MCA_DATA(reg) \
+ GET_THIS_PADDR(reg, ia64_mca_data) \
+ ;; \
+ ld8 reg=[reg]
+
.global ia64_os_mca_dispatch
.global ia64_os_mca_dispatch_end
.global ia64_sal_to_os_handoff_state
@@ -144,24 +149,26 @@
// The following code purges TC and TR entries. Then reload all TC
entries.
// Purge percpu data TC entries.
begin_tlb_purge_and_reload:
- GET_PERCPU_PADDR(r2) // paddr of percpu_paddr in cpuinfo struct
- ;;
- mov r17=r2
- ;;
- adds r17=8,r17
+
+#define O(member) IA64_CPUINFO_##member##_OFFSET
+
+ GET_THIS_PADDR(r2, cpu_info) // load phys addr of cpu_info into r2
;;
- ld8 r18=[r17],8 // r18=ptce_base
- ;;
- ld4 r19=[r17],4 // r19=ptce_count[0]
+ addl r17=O(PTCE_STRIDE),r2
+ addl r2=O(PTCE_BASE),r2
;;
- ld4 r20=[r17],4 // r20=ptce_count[1]
+ ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base
+ ld4 r19=[r2],4 // r19=ptce_count[0]
+ ld4 r21=[r17],4 // r21=ptce_stride[0]
;;
- ld4 r21=[r17],4 // r21=ptce_stride[0]
+ ld4 r20=[r2] // r20=ptce_count[1]
+ ld4 r22=[r17] // r22=ptce_stride[1]
mov r24=0
;;
- ld4 r22=[r17],4 // r22=ptce_stride[1]
adds r20=-1,r20
;;
+#undef O
+
2:
cmp.ltu p6,p7=r24,r19
(p7) br.cond.dpnt.few 4f
@@ -201,9 +208,9 @@
srlz.d
;;
// 3. Purge ITR for PAL code.
- adds r17=40,r23
+ GET_THIS_PADDR(r2, ia64_mca_pal_base)
;;
- ld8 r16=[r17]
+ ld8 r16=[r2]
mov r18=IA64_GRANULE_SHIFT<<2
;;
ptr.i r16,r18
@@ -246,16 +253,15 @@
srlz.d
;;
// 2. Reload DTR register for PERCPU data.
- GET_PERCPU_PADDR(r2) // paddr of percpu_paddr in cpuinfo
struct
+ GET_THIS_PADDR(r2, ia64_mca_per_cpu_pte)
;;
- mov r17=r2
movl r16=PERCPU_ADDR // vaddr
movl r18=PERCPU_PAGE_SHIFT<<2
;;
mov cr.itir=r18
mov cr.ifa=r16
;;
- ld8 r18=[r17] // pte
+ ld8 r18=[r2] // load per-CPU PTE
mov r16=IA64_TR_PERCPU_DATA;
;;
itr.d dtr[r16]=r18
@@ -263,13 +269,13 @@
srlz.d
;;
// 3. Reload ITR for PAL code.
- GET_CPUINFO_PAL_PADDR(r2) // paddr of pal_paddr in cpuinfo struct
+ GET_THIS_PADDR(r2, ia64_mca_pal_pte)
;;
- mov r17=r2
+ ld8 r18=[r2] // load PAL PTE
;;
- ld8 r18=[r17],8 // pte
+ GET_THIS_PADDR(r2, ia64_mca_pal_base)
;;
- ld8 r16=[r17] // vaddr
+ ld8 r16=[r2] // load PAL vaddr
mov r19=IA64_GRANULE_SHIFT<<2
;;
mov cr.itir=r19
@@ -308,14 +314,18 @@
done_tlb_purge_and_reload:
// Setup new stack frame for OS_MCA handling
- GET_MCA_BSPSTORE(r2) // paddr of bspstore save area
- GET_MCA_STACKFRAME(r3);; // paddr of stack frame save area
+ GET_IA64_MCA_DATA(r2)
+ ;;
+ add r3 = IA64_MCA_CPU_STACKFRAME_OFFSET, r2
+ add r2 = IA64_MCA_CPU_RBSTORE_OFFSET, r2
+ ;;
rse_switch_context(r6,r3,r2);; // RSC management in this new context
- GET_MCA_STACK(r2);; // paddr of stack save area
- // stack size must be same as C array
- addl r2=8*1024-16,r2;; // stack base @ bottom of array
- mov r12=r2 // allow 16 bytes of scratch
- // (C calling convention)
+
+ GET_IA64_MCA_DATA(r2)
+ ;;
+ add r2 = IA64_MCA_CPU_STACK_OFFSET+IA64_MCA_STACK_SIZE-16, r2
+ ;;
+ mov r12=r2 // establish new stack-pointer
// Enter virtual mode from physical mode
VIRTUAL_MODE_ENTER(r2, r3, ia64_os_mca_virtual_begin, r4)
@@ -331,7 +341,10 @@
ia64_os_mca_virtual_end:
// restore the original stack frame here
- GET_MCA_STACKFRAME(r2);; // phys addr of MCA save area
+ GET_IA64_MCA_DATA(r2)
+ ;;
+ add r2 = IA64_MCA_CPU_STACKFRAME_OFFSET, r2
+ ;;
movl r4=IA64_PSR_MC
;;
rse_return_context(r4,r3,r2) // switch from interrupt context for RSE
@@ -372,8 +385,10 @@
ia64_os_mca_proc_state_dump:
// Save bank 1 GRs 16-31 which will be used by c-language code when we switch
// to virtual addressing mode.
- GET_MCA_DUMP_PADDR(r2);; // phys addr of MCA save area
-
+ GET_IA64_MCA_DATA(r2)
+ ;;
+ add r2 = IA64_MCA_CPU_PROC_STATE_DUMP_OFFSET, r2
+ ;;
// save ar.NaT
mov r5=ar.unat // ar.unat
@@ -603,7 +618,9 @@
ia64_os_mca_proc_state_restore:
// Restore bank1 GR16-31
- GET_MCA_DUMP_PADDR(r2);; // phys addr of proc state dump
area
+ GET_IA64_MCA_DATA(r2)
+ ;;
+ add r2 = IA64_MCA_CPU_PROC_STATE_DUMP_OFFSET, r2
restore_GRs: // restore bank-1 GRs 16-31
bsw.1;;
diff -urN linux/arch/ia64/kernel/minstate.h linux/arch/ia64/kernel/minstate.h
--- linux/arch/ia64/kernel/minstate.h 2005/01/25 04:27:57 1.13
+++ linux/arch/ia64/kernel/minstate.h 2005/02/13 20:16:16 1.14
@@ -37,10 +37,10 @@
* go virtual and don't want to destroy the iip or ipsr.
*/
#define MINSTATE_START_SAVE_MIN_PHYS
\
-(pKStk) mov r3=ar.k3;;
\
-(pKStk) addl r3=IA64_CPUINFO_PA_MCA_INFO,r3;;
\
+(pKStk) mov r3=IA64_KR(PER_CPU_DATA);;
\
+(pKStk) addl r3=THIS_CPU(ia64_mca_data),r3;;
\
(pKStk) ld8 r3 = [r3];;
\
-(pKStk) addl r3=IA64_INIT_STACK,r3;;
\
+(pKStk) addl r3=IA64_MCA_CPU_INIT_STACK_OFFSET,r3;;
\
(pKStk) addl sp=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r3;
\
(pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0,
little-endian, loadrs=0 */ \
(pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of
register backing store */ \
diff -urN linux/arch/ia64/kernel/perfmon.c linux/arch/ia64/kernel/perfmon.c
--- linux/arch/ia64/kernel/perfmon.c 2005/01/13 14:05:26 1.49
+++ linux/arch/ia64/kernel/perfmon.c 2005/02/13 20:16:16 1.50
@@ -5,13 +5,13 @@
* The initial version of perfmon.c was written by
* Ganesh Venkitachalam, IBM Corp.
*
- * Then it was modified for perfmon-1.x by Stephane Eranian and
+ * Then it was modified for perfmon-1.x by Stephane Eranian and
* David Mosberger, Hewlett Packard Co.
- *
+ *
* Version Perfmon-2.x is a rewrite of perfmon-1.x
- * by Stephane Eranian, Hewlett Packard Co.
+ * by Stephane Eranian, Hewlett Packard Co.
*
- * Copyright (C) 1999-2003 Hewlett Packard Co
+ * Copyright (C) 1999-2003, 2005 Hewlett Packard Co
* Stephane Eranian <eranian@hpl.hp.com>
* David Mosberger-Tang <davidm@hpl.hp.com>
*
@@ -4778,10 +4778,8 @@
* system-call entry point (must return long)
*/
asmlinkage long
-sys_perfmonctl (int fd, int cmd, void __user *arg, int count, long arg5, long
arg6, long arg7,
- long arg8, long stack)
+sys_perfmonctl (int fd, int cmd, void __user *arg, int count)
{
- struct pt_regs *regs = (struct pt_regs *)&stack;
struct file *file = NULL;
pfm_context_t *ctx = NULL;
unsigned long flags = 0UL;
@@ -4905,7 +4903,7 @@
if (unlikely(ret)) goto abort_locked;
skip_fd:
- ret = (*func)(ctx, args_k, count, regs);
+ ret = (*func)(ctx, args_k, count, ia64_task_regs(current));
call_made = 1;
@@ -6671,8 +6669,7 @@
}
#else /* !CONFIG_PERFMON */
asmlinkage long
-sys_perfmonctl (int fd, int cmd, void *arg, int count, long arg5, long arg6,
long arg7,
- long arg8, long stack)
+sys_perfmonctl (int fd, int cmd, void *arg, int count)
{
return -ENOSYS;
}
diff -urN linux/arch/ia64/kernel/ptrace.c linux/arch/ia64/kernel/ptrace.c
--- linux/arch/ia64/kernel/ptrace.c 2005/02/07 02:54:32 1.33
+++ linux/arch/ia64/kernel/ptrace.c 2005/02/13 20:16:16 1.34
@@ -1,11 +1,10 @@
/*
* Kernel support for the ptrace() and syscall tracing interfaces.
*
- * Copyright (C) 1999-2004 Hewlett-Packard Co
+ * Copyright (C) 1999-2005 Hewlett-Packard Co
* David Mosberger-Tang <davidm@hpl.hp.com>
*
- * Derived from the x86 and Alpha versions. Most of the code in here
- * could actually be factored into a common set of routines.
+ * Derived from the x86 and Alpha versions.
*/
#include <linux/config.h>
#include <linux/kernel.h>
@@ -40,9 +39,11 @@
* ri (restart instruction; two bits)
* is (instruction set; one bit)
*/
-#define IPSR_WRITE_MASK \
- (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS | IA64_PSR_ID | IA64_PSR_DD |
IA64_PSR_RI)
-#define IPSR_READ_MASK IPSR_WRITE_MASK
+#define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS \
+ | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI)
+
+#define MASK(nbits) ((1UL << (nbits)) - 1) /* mask with NBITS bits set */
+#define PFM_MASK MASK(38)
#define PTRACE_DEBUG 0
@@ -68,23 +69,24 @@
unsigned long
ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat)
{
-# define GET_BITS(first, last, unat)
\
- ({
\
- unsigned long bit = ia64_unat_pos(&pt->r##first);
\
- unsigned long mask = ((1UL << (last - first + 1)) - 1) <<
first; \
- unsigned long dist;
\
- if (bit < first)
\
- dist = 64 + bit - first;
\
- else
\
- dist = bit - first;
\
- ia64_rotr(unat, dist) & mask;
\
+# define GET_BITS(first, last, unat) \
+ ({ \
+ unsigned long bit = ia64_unat_pos(&pt->r##first); \
+ unsigned long nbits = (last - first + 1); \
+ unsigned long mask = MASK(nbits) << first; \
+ unsigned long dist; \
+ if (bit < first) \
+ dist = 64 + bit - first; \
+ else \
+ dist = bit - first; \
+ ia64_rotr(unat, dist) & mask; \
})
unsigned long val;
/*
- * Registers that are stored consecutively in struct pt_regs can be
handled in
- * parallel. If the register order in struct_pt_regs changes, this
code MUST be
- * updated.
+ * Registers that are stored consecutively in struct pt_regs
+ * can be handled in parallel. If the register order in
+ * struct_pt_regs changes, this code MUST be updated.
*/
val = GET_BITS( 1, 1, scratch_unat);
val |= GET_BITS( 2, 3, scratch_unat);
@@ -106,23 +108,24 @@
unsigned long
ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat)
{
-# define PUT_BITS(first, last, nat)
\
- ({
\
- unsigned long bit = ia64_unat_pos(&pt->r##first);
\
- unsigned long mask = ((1UL << (last - first + 1)) - 1) <<
first; \
- long dist;
\
- if (bit < first)
\
- dist = 64 + bit - first;
\
- else
\
- dist = bit - first;
\
- ia64_rotl(nat & mask, dist);
\
+# define PUT_BITS(first, last, nat) \
+ ({ \
+ unsigned long bit = ia64_unat_pos(&pt->r##first); \
+ unsigned long nbits = (last - first + 1); \
+ unsigned long mask = MASK(nbits) << first; \
+ long dist; \
+ if (bit < first) \
+ dist = 64 + bit - first; \
+ else \
+ dist = bit - first; \
+ ia64_rotl(nat & mask, dist); \
})
unsigned long scratch_unat;
/*
- * Registers that are stored consecutively in struct pt_regs can be
handled in
- * parallel. If the register order in struct_pt_regs changes, this
code MUST be
- * updated.
+ * Registers that are stored consecutively in struct pt_regs
+ * can be handled in parallel. If the register order in
+ * struct_pt_regs changes, this code MUST be updated.
*/
scratch_unat = PUT_BITS( 1, 1, nat);
scratch_unat |= PUT_BITS( 2, 3, nat);
@@ -185,10 +188,12 @@
}
/*
- * This routine is used to read an rnat bits that are stored on the kernel
backing store.
- * Since, in general, the alignment of the user and kernel are different, this
is not
- * completely trivial. In essence, we need to construct the user RNAT based
on up to two
- * kernel RNAT values and/or the RNAT value saved in the child's pt_regs.
+ * This routine is used to read an rnat bits that are stored on the
+ * kernel backing store. Since, in general, the alignment of the user
+ * and kernel are different, this is not completely trivial. In
+ * essence, we need to construct the user RNAT based on up to two
+ * kernel RNAT values and/or the RNAT value saved in the child's
+ * pt_regs.
*
* user rbs
*
@@ -221,24 +226,28 @@
* +--------+
* <--- child_stack->ar_bspstore
*
- * The way to think of this code is as follows: bit 0 in the user rnat
corresponds to some
- * bit N (0 <= N <= 62) in one of the kernel rnat value. The kernel rnat
value holding
- * this bit is stored in variable rnat0. rnat1 is loaded with the kernel rnat
value that
+ * The way to think of this code is as follows: bit 0 in the user rnat
+ * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat
+ * value. The kernel rnat value holding this bit is stored in
+ * variable rnat0. rnat1 is loaded with the kernel rnat value that
* form the upper bits of the user rnat value.
*
* Boundary cases:
*
- * o when reading the rnat "below" the first rnat slot on the kernel backing
store,
- * rnat0/rnat1 are set to 0 and the low order bits are merged in from
pt->ar_rnat.
+ * o when reading the rnat "below" the first rnat slot on the kernel
+ * backing store, rnat0/rnat1 are set to 0 and the low order bits are
+ * merged in from pt->ar_rnat.
*
- * o when reading the rnat "above" the last rnat slot on the kernel backing
store,
- * rnat0/rnat1 gets its value from sw->ar_rnat.
+ * o when reading the rnat "above" the last rnat slot on the kernel
+ * backing store, rnat0/rnat1 gets its value from sw->ar_rnat.
*/
static unsigned long
get_rnat (struct task_struct *task, struct switch_stack *sw,
- unsigned long *krbs, unsigned long *urnat_addr, unsigned long
*urbs_end)
+ unsigned long *krbs, unsigned long *urnat_addr,
+ unsigned long *urbs_end)
{
- unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr, umask = 0,
mask, m;
+ unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr;
+ unsigned long umask = 0, mask, m;
unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
long num_regs, nbits;
struct pt_regs *pt;
@@ -251,11 +260,12 @@
nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_end);
else
nbits = 63;
- mask = (1UL << nbits) - 1;
+ mask = MASK(nbits);
/*
- * First, figure out which bit number slot 0 in user-land maps to in
the kernel
- * rnat. Do this by figuring out how many register slots we're beyond
the user's
- * backingstore and then computing the equivalent address in kernel
space.
+ * First, figure out which bit number slot 0 in user-land maps
+ * to in the kernel rnat. Do this by figuring out how many
+ * register slots we're beyond the user's backingstore and
+ * then computing the equivalent address in kernel space.
*/
num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
@@ -265,7 +275,7 @@
if (ubspstore + 63 > urnat_addr) {
/* some bits need to be merged in from pt->ar_rnat */
- umask = ((1UL << ia64_rse_slot_num(ubspstore)) - 1) & mask;
+ umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
urnat = (pt->ar_rnat & umask);
mask &= ~umask;
if (!mask)
@@ -323,12 +333,13 @@
return;
nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_kargs);
}
- mask = (1UL << nbits) - 1;
+ mask = MASK(nbits);
/*
- * First, figure out which bit number slot 0 in user-land maps to in
the kernel
- * rnat. Do this by figuring out how many register slots we're beyond
the user's
- * backingstore and then computing the equivalent address in kernel
space.
+ * First, figure out which bit number slot 0 in user-land maps
+ * to in the kernel rnat. Do this by figuring out how many
+ * register slots we're beyond the user's backingstore and
+ * then computing the equivalent address in kernel space.
*/
num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
@@ -338,7 +349,7 @@
if (ubspstore + 63 > urnat_addr) {
/* some bits need to be place in pt->ar_rnat: */
- umask = ((1UL << ia64_rse_slot_num(ubspstore)) - 1) & mask;
+ umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask);
mask &= ~umask;
if (!mask)
@@ -364,25 +375,28 @@
}
static inline int
-on_kernel_rbs (unsigned long addr, unsigned long bspstore, unsigned long
urbs_end)
+on_kernel_rbs (unsigned long addr, unsigned long bspstore,
+ unsigned long urbs_end)
{
- return (addr >= bspstore
- && addr <= (unsigned long) ia64_rse_rnat_addr((unsigned long *)
urbs_end));
+ unsigned long *rnat_addr = ia64_rse_rnat_addr((unsigned long *)
+ urbs_end);
+ return (addr >= bspstore && addr <= (unsigned long) rnat_addr);
}
/*
- * Read a word from the user-level backing store of task CHILD. ADDR is the
user-level
- * address to read the word from, VAL a pointer to the return value, and
USER_BSP gives
- * the end of the user-level backing store (i.e., it's the address that would
be in ar.bsp
- * after the user executed a "cover" instruction).
+ * Read a word from the user-level backing store of task CHILD. ADDR
+ * is the user-level address to read the word from, VAL a pointer to
+ * the return value, and USER_BSP gives the end of the user-level
+ * backing store (i.e., it's the address that would be in ar.bsp after
+ * the user executed a "cover" instruction).
*
- * This routine takes care of accessing the kernel register backing store for
those
- * registers that got spilled there. It also takes care of calculating the
appropriate
- * RNaT collection words.
+ * This routine takes care of accessing the kernel register backing
+ * store for those registers that got spilled there. It also takes
+ * care of calculating the appropriate RNaT collection words.
*/
long
-ia64_peek (struct task_struct *child, struct switch_stack *child_stack,
unsigned long user_rbs_end,
- unsigned long addr, long *val)
+ia64_peek (struct task_struct *child, struct switch_stack *child_stack,
+ unsigned long user_rbs_end, unsigned long addr, long *val)
{
unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end, *rnat_addr;
struct pt_regs *child_regs;
@@ -394,10 +408,13 @@
child_regs = ia64_task_regs(child);
bspstore = (unsigned long *) child_regs->ar_bspstore;
krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
- if (on_kernel_rbs(addr, (unsigned long) bspstore, (unsigned long)
urbs_end)) {
+ if (on_kernel_rbs(addr, (unsigned long) bspstore,
+ (unsigned long) urbs_end))
+ {
/*
- * Attempt to read the RBS in an area that's actually on the
kernel RBS =>
- * read the corresponding bits in the kernel RBS.
+ * Attempt to read the RBS in an area that's actually
+ * on the kernel RBS => read the corresponding bits in
+ * the kernel RBS.
*/
rnat_addr = ia64_rse_rnat_addr(laddr);
ret = get_rnat(child, child_stack, krbs, rnat_addr, urbs_end);
@@ -410,18 +427,23 @@
if (((1UL << ia64_rse_slot_num(laddr)) & ret) != 0) {
/*
- * It is implementation dependent whether the data
portion of a
- * NaT value gets saved on a st8.spill or RSE spill
(e.g., see
- * EAS 2.6, 4.4.4.6 Register Spill and Fill). To get
consistent
- * behavior across all possible IA-64 implementations,
we return
- * zero in this case.
+ * It is implementation dependent whether the
+ * data portion of a NaT value gets saved on a
+ * st8.spill or RSE spill (e.g., see EAS 2.6,
+ * 4.4.4.6 Register Spill and Fill). To get
+ * consistent behavior across all possible
+ * IA-64 implementations, we return zero in
+ * this case.
*/
*val = 0;
return 0;
}
if (laddr < urbs_end) {
- /* the desired word is on the kernel RBS and is not a
NaT */
+ /*
+ * The desired word is on the kernel RBS and
+ * is not a NaT.
+ */
regnum = ia64_rse_num_regs(bspstore, laddr);
*val = *ia64_rse_skip_regs(krbs, regnum);
return 0;
@@ -435,43 +457,51 @@
}
long
-ia64_poke (struct task_struct *child, struct switch_stack *child_stack,
unsigned long user_rbs_end,
- unsigned long addr, long val)
+ia64_poke (struct task_struct *child, struct switch_stack *child_stack,
+ unsigned long user_rbs_end, unsigned long addr, long val)
{
- unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end = (long *)
user_rbs_end;
+ unsigned long *bspstore, *krbs, regnum, *laddr;
+ unsigned long *urbs_end = (long *) user_rbs_end;
struct pt_regs *child_regs;
laddr = (unsigned long *) addr;
child_regs = ia64_task_regs(child);
bspstore = (unsigned long *) child_regs->ar_bspstore;
krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
- if (on_kernel_rbs(addr, (unsigned long) bspstore, (unsigned long)
urbs_end)) {
+ if (on_kernel_rbs(addr, (unsigned long) bspstore,
+ (unsigned long) urbs_end))
+ {
/*
- * Attempt to write the RBS in an area that's actually on the
kernel RBS
- * => write the corresponding bits in the kernel RBS.
+ * Attempt to write the RBS in an area that's actually
+ * on the kernel RBS => write the corresponding bits
+ * in the kernel RBS.
*/
if (ia64_rse_is_rnat_slot(laddr))
- put_rnat(child, child_stack, krbs, laddr, val,
urbs_end);
+ put_rnat(child, child_stack, krbs, laddr, val,
+ urbs_end);
else {
if (laddr < urbs_end) {
regnum = ia64_rse_num_regs(bspstore, laddr);
*ia64_rse_skip_regs(krbs, regnum) = val;
}
}
- } else if (access_process_vm(child, addr, &val, sizeof(val), 1) !=
sizeof(val)) {
+ } else if (access_process_vm(child, addr, &val, sizeof(val), 1)
+ != sizeof(val))
return -EIO;
- }
return 0;
}
/*
- * Calculate the address of the end of the user-level register backing store.
This is the
- * address that would have been stored in ar.bsp if the user had executed a
"cover"
- * instruction right before entering the kernel. If CFMP is not NULL, it is
used to
- * return the "current frame mask" that was active at the time the kernel was
entered.
+ * Calculate the address of the end of the user-level register backing
+ * store. This is the address that would have been stored in ar.bsp
+ * if the user had executed a "cover" instruction right before
+ * entering the kernel. If CFMP is not NULL, it is used to return the
+ * "current frame mask" that was active at the time the kernel was
+ * entered.
*/
unsigned long
-ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt, unsigned
long *cfmp)
+ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt,
+ unsigned long *cfmp)
{
unsigned long *krbs, *bspstore, cfm = pt->cr_ifs;
long ndirty;
@@ -491,9 +521,11 @@
}
/*
- * Synchronize (i.e, write) the RSE backing store living in kernel space to
the VM of the
- * CHILD task. SW and PT are the pointers to the switch_stack and pt_regs
structures,
- * respectively. USER_RBS_END is the user-level address at which the backing
store ends.
+ * Synchronize (i.e, write) the RSE backing store living in kernel
+ * space to the VM of the CHILD task. SW and PT are the pointers to
+ * the switch_stack and pt_regs structures, respectively.
+ * USER_RBS_END is the user-level address at which the backing store
+ * ends.
*/
long
ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw,
@@ -507,7 +539,8 @@
ret = ia64_peek(child, sw, user_rbs_end, addr, &val);
if (ret < 0)
return ret;
- if (access_process_vm(child, addr, &val, sizeof(val), 1) !=
sizeof(val))
+ if (access_process_vm(child, addr, &val, sizeof(val), 1)
+ != sizeof(val))
return -EIO;
}
return 0;
@@ -521,13 +554,14 @@
if (ptrace_check_attach(thread, 0) < 0)
/*
- * If the thread is not in an attachable state, we'll ignore it.
- * The net effect is that if ADDR happens to overlap with the
- * portion of the thread's register backing store that is
- * currently residing on the thread's kernel stack, then
ptrace()
- * may end up accessing a stale value. But if the thread isn't
- * stopped, that's a problem anyhow, so we're doing as well as
we
- * can...
+ * If the thread is not in an attachable state, we'll
+ * ignore it. The net effect is that if ADDR happens
+ * to overlap with the portion of the thread's
+ * register backing store that is currently residing
+ * on the thread's kernel stack, then ptrace() may end
+ * up accessing a stale value. But if the thread
+ * isn't stopped, that's a problem anyhow, so we're
+ * doing as well as we can...
*/
return 0;
@@ -540,10 +574,11 @@
}
/*
- * GDB apparently wants to be able to read the register-backing store of any
thread when
- * attached to a given process. If we are peeking or poking an address that
happens to
- * reside in the kernel-backing store of another thread, we need to attach to
that thread,
- * because otherwise we end up accessing stale data.
+ * GDB apparently wants to be able to read the register-backing store
+ * of any thread when attached to a given process. If we are peeking
+ * or poking an address that happens to reside in the kernel-backing
+ * store of another thread, we need to attach to that thread, because
+ * otherwise we end up accessing stale data.
*
* task_list_lock must be read-locked before calling this routine!
*/
@@ -557,7 +592,8 @@
if (!(mm = get_task_mm(child)))
return child;
- mm_users = atomic_read(&mm->mm_users) - 1; /* -1 because of our
get_task_mm()... */
+ /* -1 because of our get_task_mm(): */
+ mm_users = atomic_read(&mm->mm_users) - 1;
if (mm_users <= 1)
goto out; /* not multi-threaded */
@@ -627,7 +663,8 @@
}
static int
-access_fr (struct unw_frame_info *info, int regnum, int hi, unsigned long
*data, int write_access)
+access_fr (struct unw_frame_info *info, int regnum, int hi,
+ unsigned long *data, int write_access)
{
struct ia64_fpreg fpval;
int ret;
@@ -649,7 +686,8 @@
* kernel exit-path, rather than the syscall-exit path.
*/
static void
-convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt,
unsigned long cfm)
+convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt,
+ unsigned long cfm)
{
struct unw_frame_info info, prev_info;
unsigned long ip, pr;
@@ -674,11 +712,51 @@
}
static int
-access_uarea (struct task_struct *child, unsigned long addr, unsigned long
*data, int write_access)
+access_nat_bits (struct task_struct *child, struct pt_regs *pt,
+ struct unw_frame_info *info,
+ unsigned long *data, int write_access)
+{
+ unsigned long regnum, nat_bits, scratch_unat, dummy = 0;
+ char nat = 0;
+
+ if (write_access) {
+ nat_bits = *data;
+ scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits);
+ if (unw_set_ar(info, UNW_AR_UNAT, scratch_unat) < 0) {
+ dprintk("ptrace: failed to set ar.unat\n");
+ return -1;
+ }
+ for (regnum = 4; regnum <= 7; ++regnum) {
+ unw_get_gr(info, regnum, &dummy, &nat);
+ unw_set_gr(info, regnum, dummy,
+ (nat_bits >> regnum) & 1);
+ }
+ } else {
+ if (unw_get_ar(info, UNW_AR_UNAT, &scratch_unat) < 0) {
+ dprintk("ptrace: failed to read ar.unat\n");
+ return -1;
+ }
+ nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat);
+ for (regnum = 4; regnum <= 7; ++regnum) {
+ unw_get_gr(info, regnum, &dummy, &nat);
+ nat_bits |= (nat != 0) << regnum;
+ }
+ *data = nat_bits;
+ }
+ return 0;
+}
+
+static int
+access_uarea (struct task_struct *child, unsigned long addr,
+ unsigned long *data, int write_access)
{
unsigned long *ptr, regnum, urbs_end, rnat_addr, cfm;
struct switch_stack *sw;
struct pt_regs *pt;
+# define pt_reg_addr(pt, reg) ((void *) \
+ ((unsigned long) (pt) \
+ + offsetof(struct pt_regs, reg)))
+
pt = ia64_task_regs(child);
sw = (struct switch_stack *) (child->thread.ksp + 16);
@@ -694,17 +772,20 @@
ia64_sync_fph(child);
else
ia64_flush_fph(child);
- ptr = (unsigned long *) ((unsigned long) &child->thread.fph +
addr);
+ ptr = (unsigned long *)
+ ((unsigned long) &child->thread.fph + addr);
} else if ((addr >= PT_F10) && (addr < PT_F11 + 16)) {
/* scratch registers untouched by kernel (saved in pt_regs) */
- ptr = (unsigned long *)
- ((long) pt + offsetof(struct pt_regs, f10) + addr -
PT_F10);
+ ptr = pt_reg_addr(pt, f10) + (addr - PT_F10);
} else if (addr >= PT_F12 && addr < PT_F15 + 16) {
- /* scratch registers untouched by kernel (saved in
switch_stack) */
- ptr = (unsigned long *) ((long) sw + (addr - PT_NAT_BITS - 32));
+ /*
+ * Scratch registers untouched by kernel (saved in
+ * switch_stack).
+ */
+ ptr = (unsigned long *) ((long) sw
+ + (addr - PT_NAT_BITS - 32));
} else if (addr < PT_AR_LC + 8) {
/* preserved state: */
- unsigned long nat_bits, scratch_unat, dummy = 0;
struct unw_frame_info info;
char nat = 0;
int ret;
@@ -715,62 +796,48 @@
switch (addr) {
case PT_NAT_BITS:
- if (write_access) {
- nat_bits = *data;
- scratch_unat = ia64_put_scratch_nat_bits(pt,
nat_bits);
- if (unw_set_ar(&info, UNW_AR_UNAT,
scratch_unat) < 0) {
- dprintk("ptrace: failed to set
ar.unat\n");
- return -1;
- }
- for (regnum = 4; regnum <= 7; ++regnum) {
- unw_get_gr(&info, regnum, &dummy, &nat);
- unw_set_gr(&info, regnum, dummy,
(nat_bits >> regnum) & 1);
- }
- } else {
- if (unw_get_ar(&info, UNW_AR_UNAT,
&scratch_unat) < 0) {
- dprintk("ptrace: failed to read
ar.unat\n");
- return -1;
- }
- nat_bits = ia64_get_scratch_nat_bits(pt,
scratch_unat);
- for (regnum = 4; regnum <= 7; ++regnum) {
- unw_get_gr(&info, regnum, &dummy, &nat);
- nat_bits |= (nat != 0) << regnum;
- }
- *data = nat_bits;
- }
- return 0;
+ return access_nat_bits(child, pt, &info,
+ data, write_access);
case PT_R4: case PT_R5: case PT_R6: case PT_R7:
if (write_access) {
/* read NaT bit first: */
unsigned long dummy;
- ret = unw_get_gr(&info, (addr - PT_R4)/8 + 4,
&dummy, &nat);
+ ret = unw_get_gr(&info, (addr - PT_R4)/8 + 4,
+ &dummy, &nat);
if (ret < 0)
return ret;
}
- return unw_access_gr(&info, (addr - PT_R4)/8 + 4, data,
&nat,
- write_access);
+ return unw_access_gr(&info, (addr - PT_R4)/8 + 4, data,
+ &nat, write_access);
- case PT_B1: case PT_B2: case PT_B3: case PT_B4: case
PT_B5:
- return unw_access_br(&info, (addr - PT_B1)/8 + 1, data,
write_access);
+ case PT_B1: case PT_B2: case PT_B3:
+ case PT_B4: case PT_B5:
+ return unw_access_br(&info, (addr - PT_B1)/8 + 1, data,
+ write_access);
case PT_AR_EC:
- return unw_access_ar(&info, UNW_AR_EC, data,
write_access);
+ return unw_access_ar(&info, UNW_AR_EC, data,
+ write_access);
case PT_AR_LC:
- return unw_access_ar(&info, UNW_AR_LC, data,
write_access);
+ return unw_access_ar(&info, UNW_AR_LC, data,
+ write_access);
default:
if (addr >= PT_F2 && addr < PT_F5 + 16)
- return access_fr(&info, (addr - PT_F2)/16 + 2,
(addr & 8) != 0,
- data, write_access);
+ return access_fr(&info, (addr - PT_F2)/16 + 2,
+ (addr & 8) != 0, data,
+ write_access);
else if (addr >= PT_F16 && addr < PT_F31 + 16)
- return access_fr(&info, (addr - PT_F16)/16 +
16, (addr & 8) != 0,
+ return access_fr(&info,
+ (addr - PT_F16)/16 + 16,
+ (addr & 8) != 0,
data, write_access);
else {
- dprintk("ptrace: rejecting access to register
address 0x%lx\n",
- addr);
+ dprintk("ptrace: rejecting access to register "
+ "address 0x%lx\n", addr);
return -1;
}
}
@@ -779,34 +846,49 @@
switch (addr) {
case PT_AR_BSP:
/*
- * By convention, we use PT_AR_BSP to refer to the end
of the user-level
- * backing store. Use ia64_rse_skip_regs(PT_AR_BSP,
-CFM.sof) to get
- * the real value of ar.bsp at the time the kernel was
entered.
+ * By convention, we use PT_AR_BSP to refer to
+ * the end of the user-level backing store.
+ * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof)
+ * to get the real value of ar.bsp at the time
+ * the kernel was entered.
*
- * Furthermore, when changing the contents of PT_AR_BSP
(or
- * PT_CFM) we MUST copy any users-level stacked
registers that are
- * stored on the kernel stack back to user-space because
- * otherwise, we might end up clobbering kernel stacked
registers.
- * Also, if this happens while the task is blocked in a
system
- * call, which convert the state such that the
non-system-call
- * exit path is used. This ensures that the proper
state will be
- * picked up when resuming execution. However, it
*also* means
- * that once we write PT_AR_BSP/PT_CFM, it won't be
possible to
- * modify the syscall arguments of the pending system
call any
- * longer. This shouldn't be an issue because modifying
- * PT_AR_BSP/PT_CFM generally implies that we're either
abandoning
- * the pending system call or that we defer it's
re-execution
- * (e.g., due to GDB doing an inferior function call).
+ * Furthermore, when changing the contents of
+ * PT_AR_BSP (or PT_CFM) we MUST copy any
+ * users-level stacked registers that are
+ * stored on the kernel stack back to
+ * user-space because otherwise, we might end
+ * up clobbering kernel stacked registers.
+ * Also, if this happens while the task is
+ * blocked in a system call, which convert the
+ * state such that the non-system-call exit
+ * path is used. This ensures that the proper
+ * state will be picked up when resuming
+ * execution. However, it *also* means that
+ * once we write PT_AR_BSP/PT_CFM, it won't be
+ * possible to modify the syscall arguments of
+ * the pending system call any longer. This
+ * shouldn't be an issue because modifying
+ * PT_AR_BSP/PT_CFM generally implies that
+ * we're either abandoning the pending system
+ * call or that we defer it's re-execution
+ * (e.g., due to GDB doing an inferior
+ * function call).
*/
urbs_end = ia64_get_user_rbs_end(child, pt, &cfm);
if (write_access) {
if (*data != urbs_end) {
if (ia64_sync_user_rbs(child, sw,
- pt->ar_bspstore,
urbs_end) < 0)
+ pt->ar_bspstore,
+ urbs_end) < 0)
return -1;
if (in_syscall(pt))
- convert_to_non_syscall(child,
pt, cfm);
- /* simulate user-level write of ar.bsp:
*/
+ convert_to_non_syscall(child,
+ pt,
+ cfm);
+ /*
+ * Simulate user-level write
+ * of ar.bsp:
+ */
pt->loadrs = 0;
pt->ar_bspstore = *data;
}
@@ -817,14 +899,17 @@
case PT_CFM:
urbs_end = ia64_get_user_rbs_end(child, pt, &cfm);
if (write_access) {
- if (((cfm ^ *data) & 0x3fffffffffUL) != 0) {
+ if (((cfm ^ *data) & PFM_MASK) != 0) {
if (ia64_sync_user_rbs(child, sw,
- pt->ar_bspstore,
urbs_end) < 0)
+ pt->ar_bspstore,
+ urbs_end) < 0)
return -1;
if (in_syscall(pt))
- convert_to_non_syscall(child,
pt, cfm);
- pt->cr_ifs = ((pt->cr_ifs &
~0x3fffffffffUL)
- | (*data &
0x3fffffffffUL));
+ convert_to_non_syscall(child,
+ pt,
+ cfm);
+ pt->cr_ifs = ((pt->cr_ifs & ~PFM_MASK)
+ | (*data & PFM_MASK));
}
} else
*data = cfm;
@@ -832,99 +917,94 @@
case PT_CR_IPSR:
if (write_access)
- pt->cr_ipsr = ((*data & IPSR_WRITE_MASK)
- | (pt->cr_ipsr &
~IPSR_WRITE_MASK));
+ pt->cr_ipsr = ((*data & IPSR_MASK)
+ | (pt->cr_ipsr & ~IPSR_MASK));
else
- *data = (pt->cr_ipsr & IPSR_READ_MASK);
+ *data = (pt->cr_ipsr & IPSR_MASK);
return 0;
case PT_AR_RNAT:
urbs_end = ia64_get_user_rbs_end(child, pt, NULL);
- rnat_addr = (long) ia64_rse_rnat_addr((long *)
urbs_end);
+ rnat_addr = (long) ia64_rse_rnat_addr((long *)
+ urbs_end);
if (write_access)
- return ia64_poke(child, sw, urbs_end,
rnat_addr, *data);
+ return ia64_poke(child, sw, urbs_end,
+ rnat_addr, *data);
else
- return ia64_peek(child, sw, urbs_end,
rnat_addr, data);
+ return ia64_peek(child, sw, urbs_end,
+ rnat_addr, data);
case PT_R1:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, r1));
+ ptr = pt_reg_addr(pt, r1);
break;
-
case PT_R2: case PT_R3:
- ptr = (unsigned long *)
- ((long) pt + offsetof(struct pt_regs, r2) +
addr - PT_R2);
+ ptr = pt_reg_addr(pt, r2) + (addr - PT_R2);
break;
case PT_R8: case PT_R9: case PT_R10: case PT_R11:
- ptr = (unsigned long *)
- ((long) pt + offsetof(struct pt_regs, r8)+
addr - PT_R8);
+ ptr = pt_reg_addr(pt, r8) + (addr - PT_R8);
break;
case PT_R12: case PT_R13:
- ptr = (unsigned long *)
- ((long) pt + offsetof(struct pt_regs, r12)+
addr - PT_R12);
+ ptr = pt_reg_addr(pt, r12) + (addr - PT_R12);
break;
case PT_R14:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, r14));
+ ptr = pt_reg_addr(pt, r14);
break;
case PT_R15:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, r15));
+ ptr = pt_reg_addr(pt, r15);
break;
case PT_R16: case PT_R17: case PT_R18: case PT_R19:
case PT_R20: case PT_R21: case PT_R22: case PT_R23:
case PT_R24: case PT_R25: case PT_R26: case PT_R27:
case PT_R28: case PT_R29: case PT_R30: case PT_R31:
- ptr = (unsigned long *)
- ((long) pt + offsetof(struct pt_regs, r16) +
addr - PT_R16);
+ ptr = pt_reg_addr(pt, r16) + (addr - PT_R16);
break;
case PT_B0:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, b0));
+ ptr = pt_reg_addr(pt, b0);
break;
case PT_B6:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, b6));
+ ptr = pt_reg_addr(pt, b6);
break;
case PT_B7:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, b7));
+ ptr = pt_reg_addr(pt, b7);
break;
case PT_F6: case PT_F6+8: case PT_F7: case PT_F7+8:
case PT_F8: case PT_F8+8: case PT_F9: case PT_F9+8:
- ptr = (unsigned long *)
- ((long) pt + offsetof(struct pt_regs, f6) +
addr - PT_F6);
+ ptr = pt_reg_addr(pt, f6) + (addr - PT_F6);
break;
case PT_AR_BSPSTORE:
- ptr = (unsigned long *)
- ((long) pt + offsetof(struct pt_regs,
ar_bspstore));
+ ptr = pt_reg_addr(pt, ar_bspstore);
break;
case PT_AR_RSC:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, ar_rsc));
+ ptr = pt_reg_addr(pt, ar_rsc);
break;
case PT_AR_UNAT:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, ar_unat));
+ ptr = pt_reg_addr(pt, ar_unat);
break;
case PT_AR_PFS:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, ar_pfs));
+ ptr = pt_reg_addr(pt, ar_pfs);
break;
case PT_AR_CCV:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, ar_ccv));
+ ptr = pt_reg_addr(pt, ar_ccv);
break;
case PT_AR_FPSR:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, ar_fpsr));
+ ptr = pt_reg_addr(pt, ar_fpsr);
break;
case PT_CR_IIP:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, cr_iip));
+ ptr = pt_reg_addr(pt, cr_iip);
break;
case PT_PR:
- ptr = (unsigned long *) ((long) pt + offsetof(struct
pt_regs, pr));
+ ptr = pt_reg_addr(pt, pr);
break;
/* scratch register */
default:
/* disallow accessing anything else... */
- dprintk("ptrace: rejecting access to register address
0x%lx\n",
- addr);
+ dprintk("ptrace: rejecting access to register "
+ "address 0x%lx\n", addr);
return -1;
}
} else if (addr <= PT_AR_SSD) {
- ptr = (unsigned long *)
- ((long) pt + offsetof(struct pt_regs, ar_csd) + addr -
PT_AR_CSD);
+ ptr = pt_reg_addr(pt, ar_csd) + (addr - PT_AR_CSD);
} else {
/* access debug registers */
@@ -937,41 +1017,46 @@
}
if (regnum >= 8) {
- dprintk("ptrace: rejecting access to register address
0x%lx\n", addr);
+ dprintk("ptrace: rejecting access to register "
+ "address 0x%lx\n", addr);
return -1;
}
#ifdef CONFIG_PERFMON
/*
- * Check if debug registers are used by perfmon. This test must
be done
- * once we know that we can do the operation, i.e. the
arguments are all
- * valid, but before we start modifying the state.
+ * Check if debug registers are used by perfmon. This
+ * test must be done once we know that we can do the
+ * operation, i.e. the arguments are all valid, but
+ * before we start modifying the state.
*
- * Perfmon needs to keep a count of how many processes are
trying to
- * modify the debug registers for system wide monitoring
sessions.
+ * Perfmon needs to keep a count of how many processes
+ * are trying to modify the debug registers for system
+ * wide monitoring sessions.
*
- * We also include read access here, because they may cause the
- * PMU-installed debug register state (dbr[], ibr[]) to be
reset. The two
- * arrays are also used by perfmon, but we do not use
- * IA64_THREAD_DBG_VALID. The registers are restored by the PMU
context
- * switch code.
+ * We also include read access here, because they may
+ * cause the PMU-installed debug register state
+ * (dbr[], ibr[]) to be reset. The two arrays are also
+ * used by perfmon, but we do not use
+ * IA64_THREAD_DBG_VALID. The registers are restored
+ * by the PMU context switch code.
*/
if (pfm_use_debug_registers(child)) return -1;
#endif
if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) {
child->thread.flags |= IA64_THREAD_DBG_VALID;
- memset(child->thread.dbr, 0, sizeof(child->thread.dbr));
- memset(child->thread.ibr, 0, sizeof(child->thread.ibr));
+ memset(child->thread.dbr, 0,
+ sizeof(child->thread.dbr));
+ memset(child->thread.ibr, 0,
+ sizeof(child->thread.ibr));
}
ptr += regnum;
- if (write_access)
- /* don't let the user set kernel-level breakpoints... */
+ if ((regnum & 1) && write_access) {
+ /* don't let the user set kernel-level breakpoints: */
*ptr = *data & ~(7UL << 56);
- else
- *data = *ptr;
- return 0;
+ return 0;
+ }
}
if (write_access)
*ptr = *data;
@@ -992,7 +1077,8 @@
char nat = 0;
int i;
- retval = verify_area(VERIFY_WRITE, ppr, sizeof(struct
pt_all_user_regs));
+ retval = verify_area(VERIFY_WRITE, ppr,
+ sizeof(struct pt_all_user_regs));
if (retval != 0) {
return -EIO;
}
@@ -1094,11 +1180,13 @@
/* fr6-fr11 */
- retval |= __copy_to_user(&ppr->fr[6], &pt->f6, sizeof(struct
ia64_fpreg) * 6);
+ retval |= __copy_to_user(&ppr->fr[6], &pt->f6,
+ sizeof(struct ia64_fpreg) * 6);
/* fp scratch regs(12-15) */
- retval |= __copy_to_user(&ppr->fr[12], &sw->f12, sizeof(struct
ia64_fpreg) * 4);
+ retval |= __copy_to_user(&ppr->fr[12], &sw->f12,
+ sizeof(struct ia64_fpreg) * 4);
/* fr16-fr31 */
@@ -1111,7 +1199,8 @@
/* fph */
ia64_flush_fph(child);
- retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph,
sizeof(ppr->fr[32]) * 96);
+ retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph,
+ sizeof(ppr->fr[32]) * 96);
/* preds */
@@ -1138,7 +1227,8 @@
memset(&fpval, 0, sizeof(fpval));
- retval = verify_area(VERIFY_READ, ppr, sizeof(struct pt_all_user_regs));
+ retval = verify_area(VERIFY_READ, ppr,
+ sizeof(struct pt_all_user_regs));
if (retval != 0) {
return -EIO;
}
@@ -1186,7 +1276,8 @@
for (i = 4; i < 8; i++) {
retval |= __get_user(val, &ppr->gr[i]);
- if (unw_set_gr(&info, i, val, 0) < 0) /* NaT bit will be set
via PT_NAT_BITS */
+ /* NaT bit will be set via PT_NAT_BITS: */
+ if (unw_set_gr(&info, i, val, 0) < 0)
return -EIO;
}
@@ -1230,16 +1321,19 @@
/* fr6-fr11 */
- retval |= __copy_from_user(&pt->f6, &ppr->fr[6], sizeof(ppr->fr[6]) *
6);
+ retval |= __copy_from_user(&pt->f6, &ppr->fr[6],
+ sizeof(ppr->fr[6]) * 6);
/* fp scratch regs(12-15) */
- retval |= __copy_from_user(&sw->f12, &ppr->fr[12], sizeof(ppr->fr[12])
* 4);
+ retval |= __copy_from_user(&sw->f12, &ppr->fr[12],
+ sizeof(ppr->fr[12]) * 4);
/* fr16-fr31 */
for (i = 16; i < 32; i++) {
- retval |= __copy_from_user(&fpval, &ppr->fr[i], sizeof(fpval));
+ retval |= __copy_from_user(&fpval, &ppr->fr[i],
+ sizeof(fpval));
if (unw_set_fr(&info, i, fpval) < 0)
return -EIO;
}
@@ -1247,7 +1341,8 @@
/* fph */
ia64_sync_fph(child);
- retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32],
sizeof(ppr->fr[32]) * 96);
+ retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32],
+ sizeof(ppr->fr[32]) * 96);
/* preds */
@@ -1279,16 +1374,15 @@
{
struct ia64_psr *child_psr = ia64_psr(ia64_task_regs(child));
- /* make sure the single step/take-branch tra bits are not set: */
+ /* make sure the single step/taken-branch trap bits are not set: */
child_psr->ss = 0;
child_psr->tb = 0;
}
asmlinkage long
-sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data,
- long arg4, long arg5, long arg6, long arg7, long stack)
+sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data)
{
- struct pt_regs *pt, *regs = (struct pt_regs *) &stack;
+ struct pt_regs *pt;
unsigned long urbs_end, peek_or_poke;
struct task_struct *child;
struct switch_stack *sw;
@@ -1308,8 +1402,10 @@
goto out;
}
- peek_or_poke = (request == PTRACE_PEEKTEXT || request == PTRACE_PEEKDATA
- || request == PTRACE_POKETEXT || request ==
PTRACE_POKEDATA);
+ peek_or_poke = (request == PTRACE_PEEKTEXT
+ || request == PTRACE_PEEKDATA
+ || request == PTRACE_POKETEXT
+ || request == PTRACE_POKEDATA);
ret = -ESRCH;
read_lock(&tasklist_lock);
{
@@ -1341,31 +1437,37 @@
switch (request) {
case PTRACE_PEEKTEXT:
- case PTRACE_PEEKDATA: /* read word at location addr */
+ case PTRACE_PEEKDATA:
+ /* read word at location addr */
urbs_end = ia64_get_user_rbs_end(child, pt, NULL);
ret = ia64_peek(child, sw, urbs_end, addr, &data);
if (ret == 0) {
ret = data;
- regs->r8 = 0; /* ensure "ret" is not mistaken as an
error code */
+ /* ensure "ret" is not mistaken as an error code: */
+ force_successful_syscall_return();
}
goto out_tsk;
case PTRACE_POKETEXT:
- case PTRACE_POKEDATA: /* write the word at location
addr */
+ case PTRACE_POKEDATA:
+ /* write the word at location addr */
urbs_end = ia64_get_user_rbs_end(child, pt, NULL);
ret = ia64_poke(child, sw, urbs_end, addr, data);
goto out_tsk;
- case PTRACE_PEEKUSR: /* read the word at addr in the
USER area */
+ case PTRACE_PEEKUSR:
+ /* read the word at addr in the USER area */
if (access_uarea(child, addr, &data, 0) < 0) {
ret = -EIO;
goto out_tsk;
}
ret = data;
- regs->r8 = 0; /* ensure "ret" is not mistaken as an error
code */
+ /* ensure "ret" is not mistaken as an error code */
+ force_successful_syscall_return();
goto out_tsk;
- case PTRACE_POKEUSR: /* write the word at addr in the
USER area */
+ case PTRACE_POKEUSR:
+ /* write the word at addr in the USER area */
if (access_uarea(child, addr, &data, 1) < 0) {
ret = -EIO;
goto out_tsk;
@@ -1373,16 +1475,20 @@
ret = 0;
goto out_tsk;
- case PTRACE_OLD_GETSIGINFO: /* for
backwards-compatibility */
+ case PTRACE_OLD_GETSIGINFO:
+ /* for backwards-compatibility */
ret = ptrace_request(child, PTRACE_GETSIGINFO, addr, data);
goto out_tsk;
- case PTRACE_OLD_SETSIGINFO: /* for
backwards-compatibility */
+ case PTRACE_OLD_SETSIGINFO:
+ /* for backwards-compatibility */
ret = ptrace_request(child, PTRACE_SETSIGINFO, addr, data);
goto out_tsk;
- case PTRACE_SYSCALL: /* continue and stop at next (return
from) syscall */
- case PTRACE_CONT: /* restart after signal. */
+ case PTRACE_SYSCALL:
+ /* continue and stop at next (return from) syscall */
+ case PTRACE_CONT:
+ /* restart after signal. */
ret = -EIO;
if (data > _NSIG)
goto out_tsk;
@@ -1392,7 +1498,10 @@
clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
child->exit_code = data;
- /* make sure the single step/taken-branch trap bits are not
set: */
+ /*
+ * Make sure the single step/taken-branch trap bits
+ * are not set:
+ */
ia64_psr(pt)->ss = 0;
ia64_psr(pt)->tb = 0;
@@ -1406,19 +1515,18 @@
* sigkill. Perhaps it should be put in the status
* that it wants to exit.
*/
- if (child->exit_state == EXIT_ZOMBIE) /* already dead
*/
+ if (child->exit_state == EXIT_ZOMBIE)
+ /* already dead */
goto out_tsk;
child->exit_code = SIGKILL;
- /* make sure the single step/take-branch tra bits are not set:
*/
- ia64_psr(pt)->ss = 0;
- ia64_psr(pt)->tb = 0;
-
+ ptrace_disable(child);
wake_up_process(child);
ret = 0;
goto out_tsk;
- case PTRACE_SINGLESTEP: /* let child execute for one
instruction */
+ case PTRACE_SINGLESTEP:
+ /* let child execute for one instruction */
case PTRACE_SINGLEBLOCK:
ret = -EIO;
if (data > _NSIG)
@@ -1437,16 +1545,19 @@
ret = 0;
goto out_tsk;
- case PTRACE_DETACH: /* detach a process that was
attached. */
+ case PTRACE_DETACH:
+ /* detach a process that was attached. */
ret = ptrace_detach(child, data);
goto out_tsk;
case PTRACE_GETREGS:
- ret = ptrace_getregs(child, (struct pt_all_user_regs __user *)
data);
+ ret = ptrace_getregs(child,
+ (struct pt_all_user_regs __user *) data);
goto out_tsk;
case PTRACE_SETREGS:
- ret = ptrace_setregs(child, (struct pt_all_user_regs __user *)
data);
+ ret = ptrace_setregs(child,
+ (struct pt_all_user_regs __user *) data);
goto out_tsk;
default:
@@ -1469,15 +1580,16 @@
if (!(current->ptrace & PT_PTRACED))
return;
/*
- * The 0x80 provides a way for the tracing parent to distinguish
between a syscall
- * stop and SIGTRAP delivery.
+ * The 0x80 provides a way for the tracing parent to
+ * distinguish between a syscall stop and SIGTRAP delivery.
*/
- ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ? 0x80 :
0));
+ ptrace_notify(SIGTRAP
+ | ((current->ptrace & PT_TRACESYSGOOD) ? 0x80 : 0));
/*
- * This isn't the same as continuing with a signal, but it will do for
normal use.
- * strace only continues with a signal if the stopping signal is not
SIGTRAP.
- * -brl
+ * This isn't the same as continuing with a signal, but it
+ * will do for normal use. strace only continues with a
+ * signal if the stopping signal is not SIGTRAP. -brl
*/
if (current->exit_code) {
send_sig(current->exit_code, current, 1);
@@ -1489,21 +1601,22 @@
asmlinkage void
syscall_trace_enter (long arg0, long arg1, long arg2, long arg3,
- long arg4, long arg5, long arg6, long arg7, long stack)
+ long arg4, long arg5, long arg6, long arg7,
+ struct pt_regs regs)
{
- struct pt_regs *regs = (struct pt_regs *) &stack;
long syscall;
if (unlikely(current->audit_context)) {
- if (IS_IA32_PROCESS(regs))
- syscall = regs->r1;
+ if (IS_IA32_PROCESS(®s))
+ syscall = regs.r1;
else
- syscall = regs->r15;
+ syscall = regs.r15;
audit_syscall_entry(current, syscall, arg0, arg1, arg2, arg3);
}
- if (test_thread_flag(TIF_SYSCALL_TRACE) && (current->ptrace &
PT_PTRACED))
+ if (test_thread_flag(TIF_SYSCALL_TRACE)
+ && (current->ptrace & PT_PTRACED))
syscall_trace();
}
@@ -1511,11 +1624,13 @@
asmlinkage void
syscall_trace_leave (long arg0, long arg1, long arg2, long arg3,
- long arg4, long arg5, long arg6, long arg7, long stack)
+ long arg4, long arg5, long arg6, long arg7,
+ struct pt_regs regs)
{
if (unlikely(current->audit_context))
- audit_syscall_exit(current, ((struct pt_regs *) &stack)->r8);
+ audit_syscall_exit(current, regs.r8);
- if (test_thread_flag(TIF_SYSCALL_TRACE) && (current->ptrace &
PT_PTRACED))
+ if (test_thread_flag(TIF_SYSCALL_TRACE)
+ && (current->ptrace & PT_PTRACED))
syscall_trace();
}
diff -urN linux/arch/ia64/kernel/setup.c linux/arch/ia64/kernel/setup.c
--- linux/arch/ia64/kernel/setup.c 2005/01/25 04:27:57 1.45
+++ linux/arch/ia64/kernel/setup.c 2005/02/13 20:16:16 1.46
@@ -60,7 +60,6 @@
unsigned long __per_cpu_offset[NR_CPUS];
EXPORT_SYMBOL(__per_cpu_offset);
#endif
-unsigned long __per_cpu_mca[NR_CPUS];
DEFINE_PER_CPU(struct cpuinfo_ia64, cpu_info);
DEFINE_PER_CPU(unsigned long, local_per_cpu_offset);
@@ -388,7 +387,7 @@
/* enable IA-64 Machine Check Abort Handling unless disabled */
if (!strstr(saved_command_line, "nomca"))
ia64_mca_init();
-
+
platform_setup(cmdline_p);
paging_init();
}
@@ -602,7 +601,6 @@
cpu_init (void)
{
extern void __devinit ia64_mmu_init (void *);
- extern void set_mca_pointer (struct cpuinfo_ia64 *, void *);
unsigned long num_phys_stacked;
pal_vm_info_2_u_t vmi;
unsigned int max_ctx;
@@ -611,6 +609,14 @@
cpu_data = per_cpu_init();
+ /*
+ * We set ar.k3 so that assembly code in MCA handler can compute
+ * physical addresses of per cpu variables with a simple:
+ * phys = ar.k3 + &per_cpu_var
+ */
+ ia64_set_kr(IA64_KR_PER_CPU_DATA,
+ ia64_tpa(cpu_data) - (long) __per_cpu_start);
+
get_max_cacheline_size();
/*
@@ -657,7 +663,7 @@
BUG();
ia64_mmu_init(ia64_imva(cpu_data));
- set_mca_pointer(cpu_info, cpu_data);
+ ia64_mca_cpu_init(ia64_imva(cpu_data));
#ifdef CONFIG_IA32_SUPPORT
ia32_cpu_init();
diff -urN linux/arch/ia64/kernel/signal.c linux/arch/ia64/kernel/signal.c
--- linux/arch/ia64/kernel/signal.c 2005/01/25 04:27:57 1.37
+++ linux/arch/ia64/kernel/signal.c 2005/02/13 20:16:16 1.38
@@ -84,12 +84,11 @@
}
asmlinkage long
-sys_sigaltstack (const stack_t __user *uss, stack_t __user *uoss, long arg2,
long arg3, long arg4,
- long arg5, long arg6, long arg7, long stack)
+sys_sigaltstack (const stack_t __user *uss, stack_t __user *uoss, long arg2,
+ long arg3, long arg4, long arg5, long arg6, long arg7,
+ struct pt_regs regs)
{
- struct pt_regs *pt = (struct pt_regs *) &stack;
-
- return do_sigaltstack(uss, uoss, pt->r12);
+ return do_sigaltstack(uss, uoss, regs.r12);
}
static long
diff -urN linux/arch/ia64/kernel/sys_ia64.c linux/arch/ia64/kernel/sys_ia64.c
--- linux/arch/ia64/kernel/sys_ia64.c 2004/10/25 20:44:14 1.30
+++ linux/arch/ia64/kernel/sys_ia64.c 2005/02/13 20:16:16 1.31
@@ -2,7 +2,7 @@
* This file contains various system calls that have different calling
* conventions on different platforms.
*
- * Copyright (C) 1999-2000, 2002-2003 Hewlett-Packard Co
+ * Copyright (C) 1999-2000, 2002-2003, 2005 Hewlett-Packard Co
* David Mosberger-Tang <davidm@hpl.hp.com>
*/
#include <linux/config.h>
@@ -163,10 +163,9 @@
* and r9) as this is faster than doing a copy_to_user().
*/
asmlinkage long
-sys_pipe (long arg0, long arg1, long arg2, long arg3,
- long arg4, long arg5, long arg6, long arg7, long stack)
+sys_pipe (void)
{
- struct pt_regs *regs = (struct pt_regs *) &stack;
+ struct pt_regs *regs = ia64_task_regs(current);
int fd[2];
int retval;
diff -urN linux/arch/ia64/kernel/traps.c linux/arch/ia64/kernel/traps.c
--- linux/arch/ia64/kernel/traps.c 2004/10/12 14:36:32 1.33
+++ linux/arch/ia64/kernel/traps.c 2005/02/13 20:16:16 1.34
@@ -358,11 +358,10 @@
};
struct illegal_op_return
-ia64_illegal_op_fault (unsigned long ec, unsigned long arg1, unsigned long
arg2,
- unsigned long arg3, unsigned long arg4, unsigned long
arg5,
- unsigned long arg6, unsigned long arg7, unsigned long
stack)
+ia64_illegal_op_fault (unsigned long ec, long arg1, long arg2, long arg3,
+ long arg4, long arg5, long arg6, long arg7,
+ struct pt_regs regs)
{
- struct pt_regs *regs = (struct pt_regs *) &stack;
struct illegal_op_return rv;
struct siginfo si;
char buf[128];
@@ -371,19 +370,19 @@
{
extern struct illegal_op_return ia64_emulate_brl (struct
pt_regs *, unsigned long);
- rv = ia64_emulate_brl(regs, ec);
+ rv = ia64_emulate_brl(®s, ec);
if (rv.fkt != (unsigned long) -1)
return rv;
}
#endif
sprintf(buf, "IA-64 Illegal operation fault");
- die_if_kernel(buf, regs, 0);
+ die_if_kernel(buf, ®s, 0);
memset(&si, 0, sizeof(si));
si.si_signo = SIGILL;
si.si_code = ILL_ILLOPC;
- si.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri);
+ si.si_addr = (void __user *) (regs.cr_iip + ia64_psr(®s)->ri);
force_sig_info(SIGILL, &si, current);
rv.fkt = 0;
return rv;
@@ -391,11 +390,10 @@
void
ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa,
- unsigned long iim, unsigned long itir, unsigned long arg5,
- unsigned long arg6, unsigned long arg7, unsigned long stack)
+ unsigned long iim, unsigned long itir, long arg5, long arg6,
+ long arg7, struct pt_regs regs)
{
- struct pt_regs *regs = (struct pt_regs *) &stack;
- unsigned long code, error = isr;
+ unsigned long code, error = isr, iip;
struct siginfo siginfo;
char buf[128];
int result, sig;
@@ -415,10 +413,12 @@
* This fault was due to lfetch.fault, set "ed" bit in the psr
to cancel
* the lfetch.
*/
- ia64_psr(regs)->ed = 1;
+ ia64_psr(®s)->ed = 1;
return;
}
+ iip = regs.cr_iip + ia64_psr(®s)->ri;
+
switch (vector) {
case 24: /* General Exception */
code = (isr >> 4) & 0xf;
@@ -428,8 +428,8 @@
if (code == 8) {
# ifdef CONFIG_IA64_PRINT_HAZARDS
printk("%s[%d]: possible hazard @ ip=%016lx (pr =
%016lx)\n",
- current->comm, current->pid, regs->cr_iip +
ia64_psr(regs)->ri,
- regs->pr);
+ current->comm, current->pid,
+ regs.cr_iip + ia64_psr(®s)->ri, regs.pr);
# endif
return;
}
@@ -437,14 +437,14 @@
case 25: /* Disabled FP-Register */
if (isr & 2) {
- disabled_fph_fault(regs);
+ disabled_fph_fault(®s);
return;
}
sprintf(buf, "Disabled FPL fault---not supposed to happen!");
break;
case 26: /* NaT Consumption */
- if (user_mode(regs)) {
+ if (user_mode(®s)) {
void __user *addr;
if (((isr >> 4) & 0xf) == 2) {
@@ -456,7 +456,8 @@
/* register NaT consumption */
sig = SIGILL;
code = ILL_ILLOPN;
- addr = (void __user *) (regs->cr_iip +
ia64_psr(regs)->ri);
+ addr = (void __user *) (regs.cr_iip
+ + ia64_psr(®s)->ri);
}
siginfo.si_signo = sig;
siginfo.si_code = code;
@@ -467,17 +468,17 @@
siginfo.si_isr = isr;
force_sig_info(sig, &siginfo, current);
return;
- } else if (ia64_done_with_exception(regs))
+ } else if (ia64_done_with_exception(®s))
return;
sprintf(buf, "NaT consumption");
break;
case 31: /* Unsupported Data Reference */
- if (user_mode(regs)) {
+ if (user_mode(®s)) {
siginfo.si_signo = SIGILL;
siginfo.si_code = ILL_ILLOPN;
siginfo.si_errno = 0;
- siginfo.si_addr = (void __user *) (regs->cr_iip +
ia64_psr(regs)->ri);
+ siginfo.si_addr = (void __user *) iip;
siginfo.si_imm = vector;
siginfo.si_flags = __ISR_VALID;
siginfo.si_isr = isr;
@@ -490,7 +491,7 @@
case 29: /* Debug */
case 35: /* Taken Branch Trap */
case 36: /* Single Step Trap */
- if (fsys_mode(current, regs)) {
+ if (fsys_mode(current, ®s)) {
extern char __kernel_syscall_via_break[];
/*
* Got a trap in fsys-mode: Taken Branch Trap and
Single Step trap
@@ -498,13 +499,13 @@
*/
if (unlikely(vector == 29)) {
die("Got debug trap in fsys-mode---not supposed
to happen!",
- regs, 0);
+ ®s, 0);
return;
}
/* re-do the system call via break 0x100000: */
- regs->cr_iip = (unsigned long)
__kernel_syscall_via_break;
- ia64_psr(regs)->ri = 0;
- ia64_psr(regs)->cpl = 3;
+ regs.cr_iip = (unsigned long)
__kernel_syscall_via_break;
+ ia64_psr(®s)->ri = 0;
+ ia64_psr(®s)->cpl = 3;
return;
}
switch (vector) {
@@ -515,8 +516,8 @@
* Erratum 10 (IFA may contain incorrect address) now
has
* "NoFix" status. There are no plans for fixing this.
*/
- if (ia64_psr(regs)->is == 0)
- ifa = regs->cr_iip;
+ if (ia64_psr(®s)->is == 0)
+ ifa = regs.cr_iip;
#endif
break;
case 35: siginfo.si_code = TRAP_BRANCH; ifa = 0; break;
@@ -533,12 +534,12 @@
case 32: /* fp fault */
case 33: /* fp trap */
- result = handle_fpu_swa((vector == 32) ? 1 : 0, regs, isr);
+ result = handle_fpu_swa((vector == 32) ? 1 : 0, ®s, isr);
if ((result < 0) || (current->thread.flags &
IA64_THREAD_FPEMU_SIGFPE)) {
siginfo.si_signo = SIGFPE;
siginfo.si_errno = 0;
siginfo.si_code = FPE_FLTINV;
- siginfo.si_addr = (void __user *) (regs->cr_iip +
ia64_psr(regs)->ri);
+ siginfo.si_addr = (void __user *) iip;
siginfo.si_flags = __ISR_VALID;
siginfo.si_isr = isr;
siginfo.si_imm = 0;
@@ -554,19 +555,18 @@
* interesting work (e.g., signal delivery is done in
the kernel
* exit path).
*/
- ia64_psr(regs)->lp = 0;
+ ia64_psr(®s)->lp = 0;
return;
} else {
/* Unimplemented Instr. Address Trap */
- if (user_mode(regs)) {
+ if (user_mode(®s)) {
siginfo.si_signo = SIGILL;
siginfo.si_code = ILL_BADIADDR;
siginfo.si_errno = 0;
siginfo.si_flags = 0;
siginfo.si_isr = 0;
siginfo.si_imm = 0;
- siginfo.si_addr = (void __user *)
- (regs->cr_iip + ia64_psr(regs)->ri);
+ siginfo.si_addr = (void __user *) iip;
force_sig_info(SIGILL, &siginfo, current);
return;
}
@@ -576,23 +576,23 @@
case 45:
#ifdef CONFIG_IA32_SUPPORT
- if (ia32_exception(regs, isr) == 0)
+ if (ia32_exception(®s, isr) == 0)
return;
#endif
printk(KERN_ERR "Unexpected IA-32 exception (Trap 45)\n");
printk(KERN_ERR " iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx\n",
- regs->cr_iip, ifa, isr);
+ iip, ifa, isr);
force_sig(SIGSEGV, current);
break;
case 46:
#ifdef CONFIG_IA32_SUPPORT
- if (ia32_intercept(regs, isr) == 0)
+ if (ia32_intercept(®s, isr) == 0)
return;
#endif
printk(KERN_ERR "Unexpected IA-32 intercept trap (Trap 46)\n");
printk(KERN_ERR " iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx, iim -
0x%lx\n",
- regs->cr_iip, ifa, isr, iim);
+ iip, ifa, isr, iim);
force_sig(SIGSEGV, current);
return;
@@ -604,6 +604,6 @@
sprintf(buf, "Fault %lu", vector);
break;
}
- die_if_kernel(buf, regs, error);
+ die_if_kernel(buf, ®s, error);
force_sig(SIGILL, current);
}
diff -urN linux/arch/ia64/mm/contig.c linux/arch/ia64/mm/contig.c
--- linux/arch/ia64/mm/contig.c 2005/02/07 02:54:32 1.10
+++ linux/arch/ia64/mm/contig.c 2005/02/13 20:16:16 1.11
@@ -178,7 +178,7 @@
void *
per_cpu_init (void)
{
- void *cpu_data, *mca_data;
+ void *cpu_data;
int cpu;
/*
@@ -189,14 +189,11 @@
if (smp_processor_id() == 0) {
cpu_data = __alloc_bootmem(PERCPU_PAGE_SIZE * NR_CPUS,
PERCPU_PAGE_SIZE,
__pa(MAX_DMA_ADDRESS));
- mca_data = alloc_bootmem(PERCPU_MCA_SIZE * NR_CPUS);
for (cpu = 0; cpu < NR_CPUS; cpu++) {
memcpy(cpu_data, __phys_per_cpu_start, __per_cpu_end -
__per_cpu_start);
__per_cpu_offset[cpu] = (char *) cpu_data -
__per_cpu_start;
cpu_data += PERCPU_PAGE_SIZE;
per_cpu(local_per_cpu_offset, cpu) =
__per_cpu_offset[cpu];
- __per_cpu_mca[cpu] = (unsigned long)__pa(mca_data);
- mca_data += PERCPU_MCA_SIZE;
}
}
return __per_cpu_start + __per_cpu_offset[smp_processor_id()];
diff -urN linux/arch/ia64/mm/discontig.c linux/arch/ia64/mm/discontig.c
--- linux/arch/ia64/mm/discontig.c 2005/01/25 04:27:57 1.20
+++ linux/arch/ia64/mm/discontig.c 2005/02/13 20:16:16 1.21
@@ -26,7 +26,6 @@
#include <asm/meminit.h>
#include <asm/numa.h>
#include <asm/sections.h>
-#include <asm/mca.h>
/*
* Track per-node information needed to setup the boot memory allocator, the
@@ -294,9 +293,6 @@
* |------------------------|
* | local ia64_node_data |
* |------------------------|
- * | MCA/INIT data * |
- * | cpus_on_this_node |
- * |------------------------|
* | ??? |
* |________________________|
*
@@ -310,7 +306,7 @@
{
unsigned long epfn, cpu, cpus, phys_cpus;
unsigned long pernodesize = 0, pernode, pages, mapsize;
- void *cpu_data, *mca_data_phys;
+ void *cpu_data;
struct bootmem_data *bdp = &mem_data[node].bootmem_data;
epfn = (start + len) >> PAGE_SHIFT;
@@ -339,7 +335,6 @@
pernodesize += node * L1_CACHE_BYTES;
pernodesize += L1_CACHE_ALIGN(sizeof(pg_data_t));
pernodesize += L1_CACHE_ALIGN(sizeof(struct ia64_node_data));
- pernodesize += L1_CACHE_ALIGN(sizeof(ia64_mca_cpu_t)) * phys_cpus;
pernodesize = PAGE_ALIGN(pernodesize);
pernode = NODEDATA_ALIGN(start, node);
@@ -362,9 +357,6 @@
mem_data[node].pgdat->bdata = bdp;
pernode += L1_CACHE_ALIGN(sizeof(pg_data_t));
- mca_data_phys = (void *)pernode;
- pernode += L1_CACHE_ALIGN(sizeof(ia64_mca_cpu_t)) * phys_cpus;
-
/*
* Copy the static per-cpu data into the region we
* just set aside and then setup __per_cpu_offset
@@ -374,18 +366,6 @@
if (node == node_cpuid[cpu].nid) {
memcpy(__va(cpu_data), __phys_per_cpu_start,
__per_cpu_end - __per_cpu_start);
- if ((cpu == 0) || (node_cpuid[cpu].phys_id >
0)) {
- /*
- * The memory for the cpuinfo structure
is allocated
- * here, but the data in the structure
is initialized
- * later. Save the physical address of
the MCA save
- * area in __per_cpu_mca[cpu]. When
the cpuinfo struct
- * is initialized, the value in
__per_cpu_mca[cpu]
- * will be put in the cpuinfo structure.
- */
- __per_cpu_mca[cpu] =
__pa(mca_data_phys);
- mca_data_phys +=
L1_CACHE_ALIGN(sizeof(ia64_mca_cpu_t));
- }
__per_cpu_offset[cpu] = (char*)__va(cpu_data) -
__per_cpu_start;
cpu_data += PERCPU_PAGE_SIZE;
diff -urN linux/arch/ia64/mm/init.c linux/arch/ia64/mm/init.c
--- linux/arch/ia64/mm/init.c 2005/01/25 04:27:57 1.52
+++ linux/arch/ia64/mm/init.c 2005/02/13 20:16:16 1.53
@@ -40,7 +40,6 @@
DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
extern void ia64_tlb_init (void);
-extern void efi_get_pal_addr (void);
unsigned long MAX_DMA_ADDRESS = PAGE_OFFSET + 0x100000000UL;
@@ -292,27 +291,6 @@
ia64_patch_gate();
}
-void
-set_mca_pointer(struct cpuinfo_ia64 *cpuinfo, void *cpu_data)
-{
- void *my_cpu_data = ia64_imva(cpu_data);
-
- /*
- * The MCA info structure was allocated earlier and a physical address
pointer
- * saved in __per_cpu_mca[cpu]. Move that pointer into the cpuinfo
structure.
- */
-
- cpuinfo->ia64_pa_mca_data = (__u64 *)__per_cpu_mca[smp_processor_id()];
-
- cpuinfo->percpu_paddr = pte_val(mk_pte_phys(__pa(my_cpu_data),
PAGE_KERNEL));
- ia64_set_kr(IA64_KR_PA_CPU_INFO, __pa(cpuinfo));
-
- /*
- * Set pal_base and pal_paddr in cpuinfo structure.
- */
- efi_get_pal_addr();
-}
-
void __devinit
ia64_mmu_init (void *my_cpu_data)
{
diff -urN linux/arch/ia64/pci/pci.c linux/arch/ia64/pci/pci.c
--- linux/arch/ia64/pci/pci.c 2005/02/07 02:54:33 1.28
+++ linux/arch/ia64/pci/pci.c 2005/02/13 20:16:16 1.29
@@ -71,7 +71,7 @@
u64 addr, mode, data = 0;
int result = 0;
- if ((seg > 255) || (bus > 255) || (devfn > 255) || (reg > 4095))
+ if ((seg > 65535) || (bus > 255) || (devfn > 255) || (reg > 4095))
return -EINVAL;
if ((seg | reg) <= 255) {
diff -urN linux/arch/ia64/sn/include/shubio.h
linux/arch/ia64/sn/include/shubio.h
--- linux/arch/ia64/sn/include/Attic/shubio.h Sun Feb 13 20:16:16 2005
1.1
+++ linux/arch/ia64/sn/include/Attic/shubio.h 1970/01/01 00:00:002002
@@ -1,3476 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights
reserved.
- */
-
-#ifndef _ASM_IA64_SN_SHUBIO_H
-#define _ASM_IA64_SN_SHUBIO_H
-
-#define HUB_WIDGET_ID_MAX 0xf
-#define IIO_NUM_ITTES 7
-#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1)
-
-#define IIO_WID 0x00400000 /* Crosstalk Widget
Identification */
- /* This register is also
accessible from
- * Crosstalk at address
0x0. */
-#define IIO_WSTAT 0x00400008 /* Crosstalk Widget Status
*/
-#define IIO_WCR 0x00400020 /* Crosstalk Widget Control
Register */
-#define IIO_ILAPR 0x00400100 /* IO Local Access
Protection Register */
-#define IIO_ILAPO 0x00400108 /* IO Local Access
Protection Override */
-#define IIO_IOWA 0x00400110 /* IO Outbound Widget
Access */
-#define IIO_IIWA 0x00400118 /* IO Inbound Widget Access
*/
-#define IIO_IIDEM 0x00400120 /* IO Inbound Device Error
Mask */
-#define IIO_ILCSR 0x00400128 /* IO LLP Control and
Status Register */
-#define IIO_ILLR 0x00400130 /* IO LLP Log Register */
-#define IIO_IIDSR 0x00400138 /* IO Interrupt Destination
*/
-
-#define IIO_IGFX0 0x00400140 /* IO Graphics Node-Widget
Map 0 */
-#define IIO_IGFX1 0x00400148 /* IO Graphics Node-Widget
Map 1 */
-
-#define IIO_ISCR0 0x00400150 /* IO Scratch Register 0 */
-#define IIO_ISCR1 0x00400158 /* IO Scratch Register 1 */
-
-#define IIO_ITTE1 0x00400160 /* IO Translation Table
Entry 1 */
-#define IIO_ITTE2 0x00400168 /* IO Translation Table
Entry 2 */
-#define IIO_ITTE3 0x00400170 /* IO Translation Table
Entry 3 */
-#define IIO_ITTE4 0x00400178 /* IO Translation Table
Entry 4 */
-#define IIO_ITTE5 0x00400180 /* IO Translation Table
Entry 5 */
-#define IIO_ITTE6 0x00400188 /* IO Translation Table
Entry 6 */
-#define IIO_ITTE7 0x00400190 /* IO Translation Table
Entry 7 */
-
-#define IIO_IPRB0 0x00400198 /* IO PRB Entry 0 */
-#define IIO_IPRB8 0x004001A0 /* IO PRB Entry 8 */
-#define IIO_IPRB9 0x004001A8 /* IO PRB Entry 9 */
-#define IIO_IPRBA 0x004001B0 /* IO PRB Entry A */
-#define IIO_IPRBB 0x004001B8 /* IO PRB Entry B */
-#define IIO_IPRBC 0x004001C0 /* IO PRB Entry C */
-#define IIO_IPRBD 0x004001C8 /* IO PRB Entry D */
-#define IIO_IPRBE 0x004001D0 /* IO PRB Entry E */
-#define IIO_IPRBF 0x004001D8 /* IO PRB Entry F */
-
-#define IIO_IXCC 0x004001E0 /* IO Crosstalk Credit
Count Timeout */
-#define IIO_IMEM 0x004001E8 /* IO Miscellaneous Error
Mask */
-#define IIO_IXTT 0x004001F0 /* IO Crosstalk Timeout
Threshold */
-#define IIO_IECLR 0x004001F8 /* IO Error Clear Register
*/
-#define IIO_IBCR 0x00400200 /* IO BTE Control Register
*/
-
-#define IIO_IXSM 0x00400208 /* IO Crosstalk Spurious
Message */
-#define IIO_IXSS 0x00400210 /* IO Crosstalk Spurious
Sideband */
-
-#define IIO_ILCT 0x00400218 /* IO LLP Channel Test */
-
-#define IIO_IIEPH1 0x00400220 /* IO Incoming Error Packet
Header, Part 1 */
-#define IIO_IIEPH2 0x00400228 /* IO Incoming Error Packet
Header, Part 2 */
-
-
-#define IIO_ISLAPR 0x00400230 /* IO SXB Local Access
Protection Regster */
-#define IIO_ISLAPO 0x00400238 /* IO SXB Local Access
Protection Override */
-
-#define IIO_IWI 0x00400240 /* IO Wrapper Interrupt
Register */
-#define IIO_IWEL 0x00400248 /* IO Wrapper Error Log
Register */
-#define IIO_IWC 0x00400250 /* IO Wrapper Control
Register */
-#define IIO_IWS 0x00400258 /* IO Wrapper Status
Register */
-#define IIO_IWEIM 0x00400260 /* IO Wrapper Error
Interrupt Masking Register */
-
-#define IIO_IPCA 0x00400300 /* IO PRB Counter Adjust */
-
-#define IIO_IPRTE0_A 0x00400308 /* IO PIO Read Address
Table Entry 0, Part A */
-#define IIO_IPRTE1_A 0x00400310 /* IO PIO Read Address
Table Entry 1, Part A */
-#define IIO_IPRTE2_A 0x00400318 /* IO PIO Read Address
Table Entry 2, Part A */
-#define IIO_IPRTE3_A 0x00400320 /* IO PIO Read Address
Table Entry 3, Part A */
-#define IIO_IPRTE4_A 0x00400328 /* IO PIO Read Address
Table Entry 4, Part A */
-#define IIO_IPRTE5_A 0x00400330 /* IO PIO Read Address
Table Entry 5, Part A */
-#define IIO_IPRTE6_A 0x00400338 /* IO PIO Read Address
Table Entry 6, Part A */
-#define IIO_IPRTE7_A 0x00400340 /* IO PIO Read Address
Table Entry 7, Part A */
-
-#define IIO_IPRTE0_B 0x00400348 /* IO PIO Read Address
Table Entry 0, Part B */
-#define IIO_IPRTE1_B 0x00400350 /* IO PIO Read Address
Table Entry 1, Part B */
-#define IIO_IPRTE2_B 0x00400358 /* IO PIO Read Address
Table Entry 2, Part B */
-#define IIO_IPRTE3_B 0x00400360 /* IO PIO Read Address
Table Entry 3, Part B */
-#define IIO_IPRTE4_B 0x00400368 /* IO PIO Read Address
Table Entry 4, Part B */
-#define IIO_IPRTE5_B 0x00400370 /* IO PIO Read Address
Table Entry 5, Part B */
-#define IIO_IPRTE6_B 0x00400378 /* IO PIO Read Address
Table Entry 6, Part B */
-#define IIO_IPRTE7_B 0x00400380 /* IO PIO Read Address
Table Entry 7, Part B */
-
-#define IIO_IPDR 0x00400388 /* IO PIO Deallocation
Register */
-#define IIO_ICDR 0x00400390 /* IO CRB Entry
Deallocation Register */
-#define IIO_IFDR 0x00400398 /* IO IOQ FIFO Depth
Register */
-#define IIO_IIAP 0x004003A0 /* IO IIQ Arbitration
Parameters */
-#define IIO_ICMR 0x004003A8 /* IO CRB Management
Register */
-#define IIO_ICCR 0x004003B0 /* IO CRB Control Register
*/
-#define IIO_ICTO 0x004003B8 /* IO CRB Timeout */
-#define IIO_ICTP 0x004003C0 /* IO CRB Timeout Prescalar
*/
-
-#define IIO_ICRB0_A 0x00400400 /* IO CRB Entry 0_A */
-#define IIO_ICRB0_B 0x00400408 /* IO CRB Entry 0_B */
-#define IIO_ICRB0_C 0x00400410 /* IO CRB Entry 0_C */
-#define IIO_ICRB0_D 0x00400418 /* IO CRB Entry 0_D */
-#define IIO_ICRB0_E 0x00400420 /* IO CRB Entry 0_E */
-
-#define IIO_ICRB1_A 0x00400430 /* IO CRB Entry 1_A */
-#define IIO_ICRB1_B 0x00400438 /* IO CRB Entry 1_B */
-#define IIO_ICRB1_C 0x00400440 /* IO CRB Entry 1_C */
-#define IIO_ICRB1_D 0x00400448 /* IO CRB Entry 1_D */
-#define IIO_ICRB1_E 0x00400450 /* IO CRB Entry 1_E */
-
-#define IIO_ICRB2_A 0x00400460 /* IO CRB Entry 2_A */
-#define IIO_ICRB2_B 0x00400468 /* IO CRB Entry 2_B */
-#define IIO_ICRB2_C 0x00400470 /* IO CRB Entry 2_C */
-#define IIO_ICRB2_D 0x00400478 /* IO CRB Entry 2_D */
-#define IIO_ICRB2_E 0x00400480 /* IO CRB Entry 2_E */
-
-#define IIO_ICRB3_A 0x00400490 /* IO CRB Entry 3_A */
-#define IIO_ICRB3_B 0x00400498 /* IO CRB Entry 3_B */
-#define IIO_ICRB3_C 0x004004a0 /* IO CRB Entry 3_C */
-#define IIO_ICRB3_D 0x004004a8 /* IO CRB Entry 3_D */
-#define IIO_ICRB3_E 0x004004b0 /* IO CRB Entry 3_E */
-
-#define IIO_ICRB4_A 0x004004c0 /* IO CRB Entry 4_A */
-#define IIO_ICRB4_B 0x004004c8 /* IO CRB Entry 4_B */
-#define IIO_ICRB4_C 0x004004d0 /* IO CRB Entry 4_C */
-#define IIO_ICRB4_D 0x004004d8 /* IO CRB Entry 4_D */
-#define IIO_ICRB4_E 0x004004e0 /* IO CRB Entry 4_E */
-
-#define IIO_ICRB5_A 0x004004f0 /* IO CRB Entry 5_A */
-#define IIO_ICRB5_B 0x004004f8 /* IO CRB Entry 5_B */
-#define IIO_ICRB5_C 0x00400500 /* IO CRB Entry 5_C */
-#define IIO_ICRB5_D 0x00400508 /* IO CRB Entry 5_D */
-#define IIO_ICRB5_E 0x00400510 /* IO CRB Entry 5_E */
-
-#define IIO_ICRB6_A 0x00400520 /* IO CRB Entry 6_A */
-#define IIO_ICRB6_B 0x00400528 /* IO CRB Entry 6_B */
-#define IIO_ICRB6_C 0x00400530 /* IO CRB Entry 6_C */
-#define IIO_ICRB6_D 0x00400538 /* IO CRB Entry 6_D */
-#define IIO_ICRB6_E 0x00400540 /* IO CRB Entry 6_E */
-
-#define IIO_ICRB7_A 0x00400550 /* IO CRB Entry 7_A */
-#define IIO_ICRB7_B 0x00400558 /* IO CRB Entry 7_B */
-#define IIO_ICRB7_C 0x00400560 /* IO CRB Entry 7_C */
-#define IIO_ICRB7_D 0x00400568 /* IO CRB Entry 7_D */
-#define IIO_ICRB7_E 0x00400570 /* IO CRB Entry 7_E */
-
-#define IIO_ICRB8_A 0x00400580 /* IO CRB Entry 8_A */
-#define IIO_ICRB8_B 0x00400588 /* IO CRB Entry 8_B */
-#define IIO_ICRB8_C 0x00400590 /* IO CRB Entry 8_C */
-#define IIO_ICRB8_D 0x00400598 /* IO CRB Entry 8_D */
-#define IIO_ICRB8_E 0x004005a0 /* IO CRB Entry 8_E */
-
-#define IIO_ICRB9_A 0x004005b0 /* IO CRB Entry 9_A */
-#define IIO_ICRB9_B 0x004005b8 /* IO CRB Entry 9_B */
-#define IIO_ICRB9_C 0x004005c0 /* IO CRB Entry 9_C */
-#define IIO_ICRB9_D 0x004005c8 /* IO CRB Entry 9_D */
-#define IIO_ICRB9_E 0x004005d0 /* IO CRB Entry 9_E */
-
-#define IIO_ICRBA_A 0x004005e0 /* IO CRB Entry A_A */
-#define IIO_ICRBA_B 0x004005e8 /* IO CRB Entry A_B */
-#define IIO_ICRBA_C 0x004005f0 /* IO CRB Entry A_C */
-#define IIO_ICRBA_D 0x004005f8 /* IO CRB Entry A_D */
-#define IIO_ICRBA_E 0x00400600 /* IO CRB Entry A_E */
-
-#define IIO_ICRBB_A 0x00400610 /* IO CRB Entry B_A */
-#define IIO_ICRBB_B 0x00400618 /* IO CRB Entry B_B */
-#define IIO_ICRBB_C 0x00400620 /* IO CRB Entry B_C */
-#define IIO_ICRBB_D 0x00400628 /* IO CRB Entry B_D */
-#define IIO_ICRBB_E 0x00400630 /* IO CRB Entry B_E */
-
-#define IIO_ICRBC_A 0x00400640 /* IO CRB Entry C_A */
-#define IIO_ICRBC_B 0x00400648 /* IO CRB Entry C_B */
-#define IIO_ICRBC_C 0x00400650 /* IO CRB Entry C_C */
-#define IIO_ICRBC_D 0x00400658 /* IO CRB Entry C_D */
-#define IIO_ICRBC_E 0x00400660 /* IO CRB Entry C_E */
-
-#define IIO_ICRBD_A 0x00400670 /* IO CRB Entry D_A */
-#define IIO_ICRBD_B 0x00400678 /* IO CRB Entry D_B */
-#define IIO_ICRBD_C 0x00400680 /* IO CRB Entry D_C */
-#define IIO_ICRBD_D 0x00400688 /* IO CRB Entry D_D */
-#define IIO_ICRBD_E 0x00400690 /* IO CRB Entry D_E */
-
-#define IIO_ICRBE_A 0x004006a0 /* IO CRB Entry E_A */
-#define IIO_ICRBE_B 0x004006a8 /* IO CRB Entry E_B */
-#define IIO_ICRBE_C 0x004006b0 /* IO CRB Entry E_C */
-#define IIO_ICRBE_D 0x004006b8 /* IO CRB Entry E_D */
-#define IIO_ICRBE_E 0x004006c0 /* IO CRB Entry E_E */
-
-#define IIO_ICSML 0x00400700 /* IO CRB Spurious Message
Low */
-#define IIO_ICSMM 0x00400708 /* IO CRB Spurious Message
Middle */
-#define IIO_ICSMH 0x00400710 /* IO CRB Spurious Message
High */
-
-#define IIO_IDBSS 0x00400718 /* IO Debug Submenu Select
*/
-
-#define IIO_IBLS0 0x00410000 /* IO BTE Length Status 0 */
-#define IIO_IBSA0 0x00410008 /* IO BTE Source Address 0
*/
-#define IIO_IBDA0 0x00410010 /* IO BTE Destination
Address 0 */
-#define IIO_IBCT0 0x00410018 /* IO BTE Control Terminate
0 */
-#define IIO_IBNA0 0x00410020 /* IO BTE Notification
Address 0 */
-#define IIO_IBIA0 0x00410028 /* IO BTE Interrupt Address
0 */
-#define IIO_IBLS1 0x00420000 /* IO BTE Length Status 1 */
-#define IIO_IBSA1 0x00420008 /* IO BTE Source Address 1
*/
-#define IIO_IBDA1 0x00420010 /* IO BTE Destination
Address 1 */
-#define IIO_IBCT1 0x00420018 /* IO BTE Control Terminate
1 */
-#define IIO_IBNA1 0x00420020 /* IO BTE Notification
Address 1 */
-#define IIO_IBIA1 0x00420028 /* IO BTE Interrupt Address
1 */
-
-#define IIO_IPCR 0x00430000 /* IO Performance Control */
-#define IIO_IPPR 0x00430008 /* IO Performance Profiling
*/
-
-
-/************************************************************************
- * *
- * Description: This register echoes some information from the *
- * LB_REV_ID register. It is available through Crosstalk as described *
- * above. The REV_NUM and MFG_NUM fields receive their values from *
- * the REVISION and MANUFACTURER fields in the LB_REV_ID register. *
- * The PART_NUM field's value is the Crosstalk device ID number that *
- * Steve Miller assigned to the SHub chip. *
- * *
- ************************************************************************/
-
-typedef union ii_wid_u {
- uint64_t ii_wid_regval;
- struct {
- uint64_t w_rsvd_1 : 1;
- uint64_t w_mfg_num : 11;
- uint64_t w_part_num : 16;
- uint64_t w_rev_num : 4;
- uint64_t w_rsvd : 32;
- } ii_wid_fld_s;
-} ii_wid_u_t;
-
-
-/************************************************************************
- * *
- * The fields in this register are set upon detection of an error *
- * and cleared by various mechanisms, as explained in the *
- * description. *
- * *
- ************************************************************************/
-
-typedef union ii_wstat_u {
- uint64_t ii_wstat_regval;
- struct {
- uint64_t w_pending : 4;
- uint64_t w_xt_crd_to : 1;
- uint64_t w_xt_tail_to : 1;
- uint64_t w_rsvd_3 : 3;
- uint64_t w_tx_mx_rty : 1;
- uint64_t w_rsvd_2 : 6;
- uint64_t w_llp_tx_cnt : 8;
- uint64_t w_rsvd_1 : 8;
- uint64_t w_crazy : 1;
- uint64_t w_rsvd : 31;
- } ii_wstat_fld_s;
-} ii_wstat_u_t;
-
-
-/************************************************************************
- * *
- * Description: This is a read-write enabled register. It controls *
- * various aspects of the Crosstalk flow control. *
- * *
- ************************************************************************/
-
-typedef union ii_wcr_u {
- uint64_t ii_wcr_regval;
- struct {
- uint64_t w_wid : 4;
- uint64_t w_tag : 1;
- uint64_t w_rsvd_1 : 8;
- uint64_t w_dst_crd : 3;
- uint64_t w_f_bad_pkt : 1;
- uint64_t w_dir_con : 1;
- uint64_t w_e_thresh : 5;
- uint64_t w_rsvd : 41;
- } ii_wcr_fld_s;
-} ii_wcr_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register's value is a bit vector that guards *
- * access to local registers within the II as well as to external *
- * Crosstalk widgets. Each bit in the register corresponds to a *
- * particular region in the system; a region consists of one, two or *
- * four nodes (depending on the value of the REGION_SIZE field in the *
- * LB_REV_ID register, which is documented in Section 8.3.1.1). The *
- * protection provided by this register applies to PIO read *
- * operations as well as PIO write operations. The II will perform a *
- * PIO read or write request only if the bit for the requestor's *
- * region is set; otherwise, the II will not perform the requested *
- * operation and will return an error response. When a PIO read or *
- * write request targets an external Crosstalk widget, then not only *
- * must the bit for the requestor's region be set in the ILAPR, but *
- * also the target widget's bit in the IOWA register must be set in *
- * order for the II to perform the requested operation; otherwise, *
- * the II will return an error response. Hence, the protection *
- * provided by the IOWA register supplements the protection provided *
- * by the ILAPR for requests that target external Crosstalk widgets. *
- * This register itself can be accessed only by the nodes whose *
- * region ID bits are enabled in this same register. It can also be *
- * accessed through the IAlias space by the local processors. *
- * The reset value of this register allows access by all nodes. *
- * *
- ************************************************************************/
-
-typedef union ii_ilapr_u {
- uint64_t ii_ilapr_regval;
- struct {
- uint64_t i_region : 64;
- } ii_ilapr_fld_s;
-} ii_ilapr_u_t;
-
-
-
-
-/************************************************************************
- * *
- * Description: A write to this register of the 64-bit value *
- * "SGIrules" in ASCII, will cause the bit in the ILAPR register *
- * corresponding to the region of the requestor to be set (allow *
- * access). A write of any other value will be ignored. Access *
- * protection for this register is "SGIrules". *
- * This register can also be accessed through the IAlias space. *
- * However, this access will not change the access permissions in the *
- * ILAPR. *
- * *
- ************************************************************************/
-
-typedef union ii_ilapo_u {
- uint64_t ii_ilapo_regval;
- struct {
- uint64_t i_io_ovrride : 64;
- } ii_ilapo_fld_s;
-} ii_ilapo_u_t;
-
-
-
-/************************************************************************
- * *
- * This register qualifies all the PIO and Graphics writes launched *
- * from the SHUB towards a widget. *
- * *
- ************************************************************************/
-
-typedef union ii_iowa_u {
- uint64_t ii_iowa_regval;
- struct {
- uint64_t i_w0_oac : 1;
- uint64_t i_rsvd_1 : 7;
- uint64_t i_wx_oac : 8;
- uint64_t i_rsvd : 48;
- } ii_iowa_fld_s;
-} ii_iowa_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register qualifies all the requests launched *
- * from a widget towards the Shub. This register is intended to be *
- * used by software in case of misbehaving widgets. *
- * *
- * *
- ************************************************************************/
-
-typedef union ii_iiwa_u {
- uint64_t ii_iiwa_regval;
- struct {
- uint64_t i_w0_iac : 1;
- uint64_t i_rsvd_1 : 7;
- uint64_t i_wx_iac : 8;
- uint64_t i_rsvd : 48;
- } ii_iiwa_fld_s;
-} ii_iiwa_u_t;
-
-
-
-/************************************************************************
- * *
- * Description: This register qualifies all the operations launched *
- * from a widget towards the SHub. It allows individual access *
- * control for up to 8 devices per widget. A device refers to *
- * individual DMA master hosted by a widget. *
- * The bits in each field of this register are cleared by the Shub *
- * upon detection of an error which requires the device to be *
- * disabled. These fields assume that 0=TNUM=7 (i.e., Bridge-centric *
- * Crosstalk). Whether or not a device has access rights to this *
- * Shub is determined by an AND of the device enable bit in the *
- * appropriate field of this register and the corresponding bit in *
- * the Wx_IAC field (for the widget which this device belongs to). *
- * The bits in this field are set by writing a 1 to them. Incoming *
- * replies from Crosstalk are not subject to this access control *
- * mechanism. *
- * *
- ************************************************************************/
-
-typedef union ii_iidem_u {
- uint64_t ii_iidem_regval;
- struct {
- uint64_t i_w8_dxs : 8;
- uint64_t i_w9_dxs : 8;
- uint64_t i_wa_dxs : 8;
- uint64_t i_wb_dxs : 8;
- uint64_t i_wc_dxs : 8;
- uint64_t i_wd_dxs : 8;
- uint64_t i_we_dxs : 8;
- uint64_t i_wf_dxs : 8;
- } ii_iidem_fld_s;
-} ii_iidem_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the various programmable fields necessary *
- * for controlling and observing the LLP signals. *
- * *
- ************************************************************************/
-
-typedef union ii_ilcsr_u {
- uint64_t ii_ilcsr_regval;
- struct {
- uint64_t i_nullto : 6;
- uint64_t i_rsvd_4 : 2;
- uint64_t i_wrmrst : 1;
- uint64_t i_rsvd_3 : 1;
- uint64_t i_llp_en : 1;
- uint64_t i_bm8 : 1;
- uint64_t i_llp_stat : 2;
- uint64_t i_remote_power : 1;
- uint64_t i_rsvd_2 : 1;
- uint64_t i_maxrtry : 10;
- uint64_t i_d_avail_sel : 2;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_maxbrst : 10;
- uint64_t i_rsvd : 22;
-
- } ii_ilcsr_fld_s;
-} ii_ilcsr_u_t;
-
-
-/************************************************************************
- * *
- * This is simply a status registers that monitors the LLP error *
- * rate. *
- * *
- ************************************************************************/
-
-typedef union ii_illr_u {
- uint64_t ii_illr_regval;
- struct {
- uint64_t i_sn_cnt : 16;
- uint64_t i_cb_cnt : 16;
- uint64_t i_rsvd : 32;
- } ii_illr_fld_s;
-} ii_illr_u_t;
-
-
-/************************************************************************
- * *
- * Description: All II-detected non-BTE error interrupts are *
- * specified via this register. *
- * NOTE: The PI interrupt register address is hardcoded in the II. If *
- * PI_ID==0, then the II sends an interrupt request (Duplonet PWRI *
- * packet) to address offset 0x0180_0090 within the local register *
- * address space of PI0 on the node specified by the NODE field. If *
- * PI_ID==1, then the II sends the interrupt request to address *
- * offset 0x01A0_0090 within the local register address space of PI1 *
- * on the node specified by the NODE field. *
- * *
- ************************************************************************/
-
-typedef union ii_iidsr_u {
- uint64_t ii_iidsr_regval;
- struct {
- uint64_t i_level : 8;
- uint64_t i_pi_id : 1;
- uint64_t i_node : 11;
- uint64_t i_rsvd_3 : 4;
- uint64_t i_enable : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_int_sent : 2;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_pi0_forward_int : 1;
- uint64_t i_pi1_forward_int : 1;
- uint64_t i_rsvd : 30;
- } ii_iidsr_fld_s;
-} ii_iidsr_u_t;
-
-
-
-/************************************************************************
- * *
- * There are two instances of this register. This register is used *
- * for matching up the incoming responses from the graphics widget to *
- * the processor that initiated the graphics operation. The *
- * write-responses are converted to graphics credits and returned to *
- * the processor so that the processor interface can manage the flow *
- * control. *
- * *
- ************************************************************************/
-
-typedef union ii_igfx0_u {
- uint64_t ii_igfx0_regval;
- struct {
- uint64_t i_w_num : 4;
- uint64_t i_pi_id : 1;
- uint64_t i_n_num : 12;
- uint64_t i_p_num : 1;
- uint64_t i_rsvd : 46;
- } ii_igfx0_fld_s;
-} ii_igfx0_u_t;
-
-
-/************************************************************************
- * *
- * There are two instances of this register. This register is used *
- * for matching up the incoming responses from the graphics widget to *
- * the processor that initiated the graphics operation. The *
- * write-responses are converted to graphics credits and returned to *
- * the processor so that the processor interface can manage the flow *
- * control. *
- * *
- ************************************************************************/
-
-typedef union ii_igfx1_u {
- uint64_t ii_igfx1_regval;
- struct {
- uint64_t i_w_num : 4;
- uint64_t i_pi_id : 1;
- uint64_t i_n_num : 12;
- uint64_t i_p_num : 1;
- uint64_t i_rsvd : 46;
- } ii_igfx1_fld_s;
-} ii_igfx1_u_t;
-
-
-/************************************************************************
- * *
- * There are two instances of this registers. These registers are *
- * used as scratch registers for software use. *
- * *
- ************************************************************************/
-
-typedef union ii_iscr0_u {
- uint64_t ii_iscr0_regval;
- struct {
- uint64_t i_scratch : 64;
- } ii_iscr0_fld_s;
-} ii_iscr0_u_t;
-
-
-
-/************************************************************************
- * *
- * There are two instances of this registers. These registers are *
- * used as scratch registers for software use. *
- * *
- ************************************************************************/
-
-typedef union ii_iscr1_u {
- uint64_t ii_iscr1_regval;
- struct {
- uint64_t i_scratch : 64;
- } ii_iscr1_fld_s;
-} ii_iscr1_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the SHub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte1_u {
- uint64_t ii_itte1_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte1_fld_s;
-} ii_itte1_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte2_u {
- uint64_t ii_itte2_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte2_fld_s;
-} ii_itte2_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the SHub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte3_u {
- uint64_t ii_itte3_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte3_fld_s;
-} ii_itte3_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a SHub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the SHub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the SHub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte4_u {
- uint64_t ii_itte4_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte4_fld_s;
-} ii_itte4_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a SHub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte5_u {
- uint64_t ii_itte5_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte5_fld_s;
-} ii_itte5_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte6_u {
- uint64_t ii_itte6_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte6_fld_s;
-} ii_itte6_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the SHub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte7_u {
- uint64_t ii_itte7_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte7_fld_s;
-} ii_itte7_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprb0_u {
- uint64_t ii_iprb0_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprb0_fld_s;
-} ii_iprb0_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprb8_u {
- uint64_t ii_iprb8_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprb8_fld_s;
-} ii_iprb8_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprb9_u {
- uint64_t ii_iprb9_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprb9_fld_s;
-} ii_iprb9_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * *
- * *
- ************************************************************************/
-
-typedef union ii_iprba_u {
- uint64_t ii_iprba_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprba_fld_s;
-} ii_iprba_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbb_u {
- uint64_t ii_iprbb_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprbb_fld_s;
-} ii_iprbb_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbc_u {
- uint64_t ii_iprbc_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprbc_fld_s;
-} ii_iprbc_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbd_u {
- uint64_t ii_iprbd_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprbd_fld_s;
-} ii_iprbd_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbe_u {
- uint64_t ii_iprbe_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprbe_fld_s;
-} ii_iprbe_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of Shub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbf_u {
- uint64_t ii_iprbf_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprbe_fld_s;
-} ii_iprbf_u_t;
-
-
-/************************************************************************
- * *
- * This register specifies the timeout value to use for monitoring *
- * Crosstalk credits which are used outbound to Crosstalk. An *
- * internal counter called the Crosstalk Credit Timeout Counter *
- * increments every 128 II clocks. The counter starts counting *
- * anytime the credit count drops below a threshold, and resets to *
- * zero (stops counting) anytime the credit count is at or above the *
- * threshold. The threshold is 1 credit in direct connect mode and 2 *
- * in Crossbow connect mode. When the internal Crosstalk Credit *
- * Timeout Counter reaches the value programmed in this register, a *
- * Crosstalk Credit Timeout has occurred. The internal counter is not *
- * readable from software, and stops counting at its maximum value, *
- * so it cannot cause more than one interrupt. *
- * *
- ************************************************************************/
-
-typedef union ii_ixcc_u {
- uint64_t ii_ixcc_regval;
- struct {
- uint64_t i_time_out : 26;
- uint64_t i_rsvd : 38;
- } ii_ixcc_fld_s;
-} ii_ixcc_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register qualifies all the PIO and DMA *
- * operations launched from widget 0 towards the SHub. In *
- * addition, it also qualifies accesses by the BTE streams. *
- * The bits in each field of this register are cleared by the SHub *
- * upon detection of an error which requires widget 0 or the BTE *
- * streams to be terminated. Whether or not widget x has access *
- * rights to this SHub is determined by an AND of the device *
- * enable bit in the appropriate field of this register and bit 0 in *
- * the Wx_IAC field. The bits in this field are set by writing a 1 to *
- * them. Incoming replies from Crosstalk are not subject to this *
- * access control mechanism. *
- * *
- ************************************************************************/
-
-typedef union ii_imem_u {
- uint64_t ii_imem_regval;
- struct {
- uint64_t i_w0_esd : 1;
- uint64_t i_rsvd_3 : 3;
- uint64_t i_b0_esd : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_b1_esd : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_clr_precise : 1;
- uint64_t i_rsvd : 51;
- } ii_imem_fld_s;
-} ii_imem_u_t;
-
-
-
-/************************************************************************
- * *
- * Description: This register specifies the timeout value to use for *
- * monitoring Crosstalk tail flits coming into the Shub in the *
- * TAIL_TO field. An internal counter associated with this register *
- * is incremented every 128 II internal clocks (7 bits). The counter *
- * starts counting anytime a header micropacket is received and stops *
- * counting (and resets to zero) any time a micropacket with a Tail *
- * bit is received. Once the counter reaches the threshold value *
- * programmed in this register, it generates an interrupt to the *
- * processor that is programmed into the IIDSR. The counter saturates *
- * (does not roll over) at its maximum value, so it cannot cause *
- * another interrupt until after it is cleared. *
- * The register also contains the Read Response Timeout values. The *
- * Prescalar is 23 bits, and counts II clocks. An internal counter *
- * increments on every II clock and when it reaches the value in the *
- * Prescalar field, all IPRTE registers with their valid bits set *
- * have their Read Response timers bumped. Whenever any of them match *
- * the value in the RRSP_TO field, a Read Response Timeout has *
- * occurred, and error handling occurs as described in the Error *
- * Handling section of this document. *
- * *
- ************************************************************************/
-
-typedef union ii_ixtt_u {
- uint64_t ii_ixtt_regval;
- struct {
- uint64_t i_tail_to : 26;
- uint64_t i_rsvd_1 : 6;
- uint64_t i_rrsp_ps : 23;
- uint64_t i_rrsp_to : 5;
- uint64_t i_rsvd : 4;
- } ii_ixtt_fld_s;
-} ii_ixtt_u_t;
-
-
-/************************************************************************
- * *
- * Writing a 1 to the fields of this register clears the appropriate *
- * error bits in other areas of SHub. Note that when the *
- * E_PRB_x bits are used to clear error bits in PRB registers, *
- * SPUR_RD and SPUR_WR may persist, because they require additional *
- * action to clear them. See the IPRBx and IXSS Register *
- * specifications. *
- * *
- ************************************************************************/
-
-typedef union ii_ieclr_u {
- uint64_t ii_ieclr_regval;
- struct {
- uint64_t i_e_prb_0 : 1;
- uint64_t i_rsvd : 7;
- uint64_t i_e_prb_8 : 1;
- uint64_t i_e_prb_9 : 1;
- uint64_t i_e_prb_a : 1;
- uint64_t i_e_prb_b : 1;
- uint64_t i_e_prb_c : 1;
- uint64_t i_e_prb_d : 1;
- uint64_t i_e_prb_e : 1;
- uint64_t i_e_prb_f : 1;
- uint64_t i_e_crazy : 1;
- uint64_t i_e_bte_0 : 1;
- uint64_t i_e_bte_1 : 1;
- uint64_t i_reserved_1 : 10;
- uint64_t i_spur_rd_hdr : 1;
- uint64_t i_cam_intr_to : 1;
- uint64_t i_cam_overflow : 1;
- uint64_t i_cam_read_miss : 1;
- uint64_t i_ioq_rep_underflow : 1;
- uint64_t i_ioq_req_underflow : 1;
- uint64_t i_ioq_rep_overflow : 1;
- uint64_t i_ioq_req_overflow : 1;
- uint64_t i_iiq_rep_overflow : 1;
- uint64_t i_iiq_req_overflow : 1;
- uint64_t i_ii_xn_rep_cred_overflow : 1;
- uint64_t i_ii_xn_req_cred_overflow : 1;
- uint64_t i_ii_xn_invalid_cmd : 1;
- uint64_t i_xn_ii_invalid_cmd : 1;
- uint64_t i_reserved_2 : 21;
- } ii_ieclr_fld_s;
-} ii_ieclr_u_t;
-
-
-/************************************************************************
- * *
- * This register controls both BTEs. SOFT_RESET is intended for *
- * recovery after an error. COUNT controls the total number of CRBs *
- * that both BTEs (combined) can use, which affects total BTE *
- * bandwidth. *
- * *
- ************************************************************************/
-
-typedef union ii_ibcr_u {
- uint64_t ii_ibcr_regval;
- struct {
- uint64_t i_count : 4;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_soft_reset : 1;
- uint64_t i_rsvd : 55;
- } ii_ibcr_fld_s;
-} ii_ibcr_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the header of a spurious read response *
- * received from Crosstalk. A spurious read response is defined as a *
- * read response received by II from a widget for which (1) the SIDN *
- * has a value between 1 and 7, inclusive (II never sends requests to *
- * these widgets (2) there is no valid IPRTE register which *
- * corresponds to the TNUM, or (3) the widget indicated in SIDN is *
- * not the same as the widget recorded in the IPRTE register *
- * referenced by the TNUM. If this condition is true, and if the *
- * IXSS[VALID] bit is clear, then the header of the spurious read *
- * response is capture in IXSM and IXSS, and IXSS[VALID] is set. The *
- * errant header is thereby captured, and no further spurious read *
- * respones are captured until IXSS[VALID] is cleared by setting the *
- * appropriate bit in IECLR.Everytime a spurious read response is *
- * detected, the SPUR_RD bit of the PRB corresponding to the incoming *
- * message's SIDN field is set. This always happens, regarless of *
- * whether a header is captured. The programmer should check *
- * IXSM[SIDN] to determine which widget sent the spurious response, *
- * because there may be more than one SPUR_RD bit set in the PRB *
- * registers. The widget indicated by IXSM[SIDN] was the first *
- * spurious read response to be received since the last time *
- * IXSS[VALID] was clear. The SPUR_RD bit of the corresponding PRB *
- * will be set. Any SPUR_RD bits in any other PRB registers indicate *
- * spurious messages from other widets which were detected after the *
- * header was captured.. *
- * *
- ************************************************************************/
-
-typedef union ii_ixsm_u {
- uint64_t ii_ixsm_regval;
- struct {
- uint64_t i_byte_en : 32;
- uint64_t i_reserved : 1;
- uint64_t i_tag : 3;
- uint64_t i_alt_pactyp : 4;
- uint64_t i_bo : 1;
- uint64_t i_error : 1;
- uint64_t i_vbpm : 1;
- uint64_t i_gbr : 1;
- uint64_t i_ds : 2;
- uint64_t i_ct : 1;
- uint64_t i_tnum : 5;
- uint64_t i_pactyp : 4;
- uint64_t i_sidn : 4;
- uint64_t i_didn : 4;
- } ii_ixsm_fld_s;
-} ii_ixsm_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the sideband bits of a spurious read *
- * response received from Crosstalk. *
- * *
- ************************************************************************/
-
-typedef union ii_ixss_u {
- uint64_t ii_ixss_regval;
- struct {
- uint64_t i_sideband : 8;
- uint64_t i_rsvd : 55;
- uint64_t i_valid : 1;
- } ii_ixss_fld_s;
-} ii_ixss_u_t;
-
-
-/************************************************************************
- * *
- * This register enables software to access the II LLP's test port. *
- * Refer to the LLP 2.5 documentation for an explanation of the test *
- * port. Software can write to this register to program the values *
- * for the control fields (TestErrCapture, TestClear, TestFlit, *
- * TestMask and TestSeed). Similarly, software can read from this *
- * register to obtain the values of the test port's status outputs *
- * (TestCBerr, TestValid and TestData). *
- * *
- ************************************************************************/
-
-typedef union ii_ilct_u {
- uint64_t ii_ilct_regval;
- struct {
- uint64_t i_test_seed : 20;
- uint64_t i_test_mask : 8;
- uint64_t i_test_data : 20;
- uint64_t i_test_valid : 1;
- uint64_t i_test_cberr : 1;
- uint64_t i_test_flit : 3;
- uint64_t i_test_clear : 1;
- uint64_t i_test_err_capture : 1;
- uint64_t i_rsvd : 9;
- } ii_ilct_fld_s;
-} ii_ilct_u_t;
-
-
-/************************************************************************
- * *
- * If the II detects an illegal incoming Duplonet packet (request or *
- * reply) when VALID==0 in the IIEPH1 register, then it saves the *
- * contents of the packet's header flit in the IIEPH1 and IIEPH2 *
- * registers, sets the VALID bit in IIEPH1, clears the OVERRUN bit, *
- * and assigns a value to the ERR_TYPE field which indicates the *
- * specific nature of the error. The II recognizes four different *
- * types of errors: short request packets (ERR_TYPE==2), short reply *
- * packets (ERR_TYPE==3), long request packets (ERR_TYPE==4) and long *
- * reply packets (ERR_TYPE==5). The encodings for these types of *
- * errors were chosen to be consistent with the same types of errors *
- * indicated by the ERR_TYPE field in the LB_ERROR_HDR1 register (in *
- * the LB unit). If the II detects an illegal incoming Duplonet *
- * packet when VALID==1 in the IIEPH1 register, then it merely sets *
- * the OVERRUN bit to indicate that a subsequent error has happened, *
- * and does nothing further. *
- * *
- ************************************************************************/
-
-typedef union ii_iieph1_u {
- uint64_t ii_iieph1_regval;
- struct {
- uint64_t i_command : 7;
- uint64_t i_rsvd_5 : 1;
- uint64_t i_suppl : 14;
- uint64_t i_rsvd_4 : 1;
- uint64_t i_source : 14;
- uint64_t i_rsvd_3 : 1;
- uint64_t i_err_type : 4;
- uint64_t i_rsvd_2 : 4;
- uint64_t i_overrun : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_valid : 1;
- uint64_t i_rsvd : 13;
- } ii_iieph1_fld_s;
-} ii_iieph1_u_t;
-
-
-/************************************************************************
- * *
- * This register holds the Address field from the header flit of an *
- * incoming erroneous Duplonet packet, along with the tail bit which *
- * accompanied this header flit. This register is essentially an *
- * extension of IIEPH1. Two registers were necessary because the 64 *
- * bits available in only a single register were insufficient to *
- * capture the entire header flit of an erroneous packet. *
- * *
- ************************************************************************/
-
-typedef union ii_iieph2_u {
- uint64_t ii_iieph2_regval;
- struct {
- uint64_t i_rsvd_0 : 3;
- uint64_t i_address : 47;
- uint64_t i_rsvd_1 : 10;
- uint64_t i_tail : 1;
- uint64_t i_rsvd : 3;
- } ii_iieph2_fld_s;
-} ii_iieph2_u_t;
-
-
-/******************************/
-
-
-
-/************************************************************************
- * *
- * This register's value is a bit vector that guards access from SXBs *
- * to local registers within the II as well as to external Crosstalk *
- * widgets *
- * *
- ************************************************************************/
-
-typedef union ii_islapr_u {
- uint64_t ii_islapr_regval;
- struct {
- uint64_t i_region : 64;
- } ii_islapr_fld_s;
-} ii_islapr_u_t;
-
-
-/************************************************************************
- * *
- * A write to this register of the 56-bit value "Pup+Bun" will cause *
- * the bit in the ISLAPR register corresponding to the region of the *
- * requestor to be set (access allowed). (
- * *
- ************************************************************************/
-
-typedef union ii_islapo_u {
- uint64_t ii_islapo_regval;
- struct {
- uint64_t i_io_sbx_ovrride : 56;
- uint64_t i_rsvd : 8;
- } ii_islapo_fld_s;
-} ii_islapo_u_t;
-
-/************************************************************************
- * *
- * Determines how long the wrapper will wait aftr an interrupt is *
- * initially issued from the II before it times out the outstanding *
- * interrupt and drops it from the interrupt queue. *
- * *
- ************************************************************************/
-
-typedef union ii_iwi_u {
- uint64_t ii_iwi_regval;
- struct {
- uint64_t i_prescale : 24;
- uint64_t i_rsvd : 8;
- uint64_t i_timeout : 8;
- uint64_t i_rsvd1 : 8;
- uint64_t i_intrpt_retry_period : 8;
- uint64_t i_rsvd2 : 8;
- } ii_iwi_fld_s;
-} ii_iwi_u_t;
-
-/************************************************************************
- * *
- * Log errors which have occurred in the II wrapper. The errors are *
- * cleared by writing to the IECLR register. *
- * *
- ************************************************************************/
-
-typedef union ii_iwel_u {
- uint64_t ii_iwel_regval;
- struct {
- uint64_t i_intr_timed_out : 1;
- uint64_t i_rsvd : 7;
- uint64_t i_cam_overflow : 1;
- uint64_t i_cam_read_miss : 1;
- uint64_t i_rsvd1 : 2;
- uint64_t i_ioq_rep_underflow : 1;
- uint64_t i_ioq_req_underflow : 1;
- uint64_t i_ioq_rep_overflow : 1;
- uint64_t i_ioq_req_overflow : 1;
- uint64_t i_iiq_rep_overflow : 1;
- uint64_t i_iiq_req_overflow : 1;
- uint64_t i_rsvd2 : 6;
- uint64_t i_ii_xn_rep_cred_over_under: 1;
- uint64_t i_ii_xn_req_cred_over_under: 1;
- uint64_t i_rsvd3 : 6;
- uint64_t i_ii_xn_invalid_cmd : 1;
- uint64_t i_xn_ii_invalid_cmd : 1;
- uint64_t i_rsvd4 : 30;
- } ii_iwel_fld_s;
-} ii_iwel_u_t;
-
-/************************************************************************
- * *
- * Controls the II wrapper. *
- * *
- ************************************************************************/
-
-typedef union ii_iwc_u {
- uint64_t ii_iwc_regval;
- struct {
- uint64_t i_dma_byte_swap : 1;
- uint64_t i_rsvd : 3;
- uint64_t i_cam_read_lines_reset : 1;
- uint64_t i_rsvd1 : 3;
- uint64_t i_ii_xn_cred_over_under_log: 1;
- uint64_t i_rsvd2 : 19;
- uint64_t i_xn_rep_iq_depth : 5;
- uint64_t i_rsvd3 : 3;
- uint64_t i_xn_req_iq_depth : 5;
- uint64_t i_rsvd4 : 3;
- uint64_t i_iiq_depth : 6;
- uint64_t i_rsvd5 : 12;
- uint64_t i_force_rep_cred : 1;
- uint64_t i_force_req_cred : 1;
- } ii_iwc_fld_s;
-} ii_iwc_u_t;
-
-/************************************************************************
- * *
- * Status in the II wrapper. *
- * *
- ************************************************************************/
-
-typedef union ii_iws_u {
- uint64_t ii_iws_regval;
- struct {
- uint64_t i_xn_rep_iq_credits : 5;
- uint64_t i_rsvd : 3;
- uint64_t i_xn_req_iq_credits : 5;
- uint64_t i_rsvd1 : 51;
- } ii_iws_fld_s;
-} ii_iws_u_t;
-
-/************************************************************************
- * *
- * Masks errors in the IWEL register. *
- * *
- ************************************************************************/
-
-typedef union ii_iweim_u {
- uint64_t ii_iweim_regval;
- struct {
- uint64_t i_intr_timed_out : 1;
- uint64_t i_rsvd : 7;
- uint64_t i_cam_overflow : 1;
- uint64_t i_cam_read_miss : 1;
- uint64_t i_rsvd1 : 2;
- uint64_t i_ioq_rep_underflow : 1;
- uint64_t i_ioq_req_underflow : 1;
- uint64_t i_ioq_rep_overflow : 1;
- uint64_t i_ioq_req_overflow : 1;
- uint64_t i_iiq_rep_overflow : 1;
- uint64_t i_iiq_req_overflow : 1;
- uint64_t i_rsvd2 : 6;
- uint64_t i_ii_xn_rep_cred_overflow : 1;
- uint64_t i_ii_xn_req_cred_overflow : 1;
- uint64_t i_rsvd3 : 6;
- uint64_t i_ii_xn_invalid_cmd : 1;
- uint64_t i_xn_ii_invalid_cmd : 1;
- uint64_t i_rsvd4 : 30;
- } ii_iweim_fld_s;
-} ii_iweim_u_t;
-
-
-/************************************************************************
- * *
- * A write to this register causes a particular field in the *
- * corresponding widget's PRB entry to be adjusted up or down by 1. *
- * This counter should be used when recovering from error and reset *
- * conditions. Note that software would be capable of causing *
- * inadvertent overflow or underflow of these counters. *
- * *
- ************************************************************************/
-
-typedef union ii_ipca_u {
- uint64_t ii_ipca_regval;
- struct {
- uint64_t i_wid : 4;
- uint64_t i_adjust : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_field : 2;
- uint64_t i_rsvd : 54;
- } ii_ipca_fld_s;
-} ii_ipca_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-
-typedef union ii_iprte0a_u {
- uint64_t ii_iprte0a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte0a_fld_s;
-} ii_iprte0a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte1a_u {
- uint64_t ii_iprte1a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte1a_fld_s;
-} ii_iprte1a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte2a_u {
- uint64_t ii_iprte2a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte2a_fld_s;
-} ii_iprte2a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte3a_u {
- uint64_t ii_iprte3a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte3a_fld_s;
-} ii_iprte3a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte4a_u {
- uint64_t ii_iprte4a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte4a_fld_s;
-} ii_iprte4a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte5a_u {
- uint64_t ii_iprte5a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte5a_fld_s;
-} ii_iprte5a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte6a_u {
- uint64_t ii_iprte6a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte6a_fld_s;
-} ii_iprte6a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte7a_u {
- uint64_t ii_iprte7a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprtea7_fld_s;
-} ii_iprte7a_u_t;
-
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-
-typedef union ii_iprte0b_u {
- uint64_t ii_iprte0b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte0b_fld_s;
-} ii_iprte0b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte1b_u {
- uint64_t ii_iprte1b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte1b_fld_s;
-} ii_iprte1b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte2b_u {
- uint64_t ii_iprte2b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte2b_fld_s;
-} ii_iprte2b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte3b_u {
- uint64_t ii_iprte3b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte3b_fld_s;
-} ii_iprte3b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte4b_u {
- uint64_t ii_iprte4b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte4b_fld_s;
-} ii_iprte4b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte5b_u {
- uint64_t ii_iprte5b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte5b_fld_s;
-} ii_iprte5b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte6b_u {
- uint64_t ii_iprte6b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
-
- } ii_iprte6b_fld_s;
-} ii_iprte6b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte7b_u {
- uint64_t ii_iprte7b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte7b_fld_s;
-} ii_iprte7b_u_t;
-
-
-/************************************************************************
- * *
- * Description: SHub II contains a feature which did not exist in *
- * the Hub which automatically cleans up after a Read Response *
- * timeout, including deallocation of the IPRTE and recovery of IBuf *
- * space. The inclusion of this register in SHub is for backward *
- * compatibility *
- * A write to this register causes an entry from the table of *
- * outstanding PIO Read Requests to be freed and returned to the *
- * stack of free entries. This register is used in handling the *
- * timeout errors that result in a PIO Reply never returning from *
- * Crosstalk. *
- * Note that this register does not affect the contents of the IPRTE *
- * registers. The Valid bits in those registers have to be *
- * specifically turned off by software. *
- * *
- ************************************************************************/
-
-typedef union ii_ipdr_u {
- uint64_t ii_ipdr_regval;
- struct {
- uint64_t i_te : 3;
- uint64_t i_rsvd_1 : 1;
- uint64_t i_pnd : 1;
- uint64_t i_init_rpcnt : 1;
- uint64_t i_rsvd : 58;
- } ii_ipdr_fld_s;
-} ii_ipdr_u_t;
-
-
-/************************************************************************
- * *
- * A write to this register causes a CRB entry to be returned to the *
- * queue of free CRBs. The entry should have previously been cleared *
- * (mark bit) via backdoor access to the pertinent CRB entry. This *
- * register is used in the last step of handling the errors that are *
- * captured and marked in CRB entries. Briefly: 1) first error for *
- * DMA write from a particular device, and first error for a *
- * particular BTE stream, lead to a marked CRB entry, and processor *
- * interrupt, 2) software reads the error information captured in the *
- * CRB entry, and presumably takes some corrective action, 3) *
- * software clears the mark bit, and finally 4) software writes to *
- * the ICDR register to return the CRB entry to the list of free CRB *
- * entries. *
- * *
- ************************************************************************/
-
-typedef union ii_icdr_u {
- uint64_t ii_icdr_regval;
- struct {
- uint64_t i_crb_num : 4;
- uint64_t i_pnd : 1;
- uint64_t i_rsvd : 59;
- } ii_icdr_fld_s;
-} ii_icdr_u_t;
-
-
-/************************************************************************
- * *
- * This register provides debug access to two FIFOs inside of II. *
- * Both IOQ_MAX* fields of this register contain the instantaneous *
- * depth (in units of the number of available entries) of the *
- * associated IOQ FIFO. A read of this register will return the *
- * number of free entries on each FIFO at the time of the read. So *
- * when a FIFO is idle, the associated field contains the maximum *
- * depth of the FIFO. This register is writable for debug reasons *
- * and is intended to be written with the maximum desired FIFO depth *
- * while the FIFO is idle. Software must assure that II is idle when *
- * this register is written. If there are any active entries in any *
- * of these FIFOs when this register is written, the results are *
- * undefined. *
- * *
- ************************************************************************/
-
-typedef union ii_ifdr_u {
- uint64_t ii_ifdr_regval;
- struct {
- uint64_t i_ioq_max_rq : 7;
- uint64_t i_set_ioq_rq : 1;
- uint64_t i_ioq_max_rp : 7;
- uint64_t i_set_ioq_rp : 1;
- uint64_t i_rsvd : 48;
- } ii_ifdr_fld_s;
-} ii_ifdr_u_t;
-
-
-/************************************************************************
- * *
- * This register allows the II to become sluggish in removing *
- * messages from its inbound queue (IIQ). This will cause messages to *
- * back up in either virtual channel. Disabling the "molasses" mode *
- * subsequently allows the II to be tested under stress. In the *
- * sluggish ("Molasses") mode, the localized effects of congestion *
- * can be observed. *
- * *
- ************************************************************************/
-
-typedef union ii_iiap_u {
- uint64_t ii_iiap_regval;
- struct {
- uint64_t i_rq_mls : 6;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_rp_mls : 6;
- uint64_t i_rsvd : 50;
- } ii_iiap_fld_s;
-} ii_iiap_u_t;
-
-
-/************************************************************************
- * *
- * This register allows several parameters of CRB operation to be *
- * set. Note that writing to this register can have catastrophic side *
- * effects, if the CRB is not quiescent, i.e. if the CRB is *
- * processing protocol messages when the write occurs. *
- * *
- ************************************************************************/
-
-typedef union ii_icmr_u {
- uint64_t ii_icmr_regval;
- struct {
- uint64_t i_sp_msg : 1;
- uint64_t i_rd_hdr : 1;
- uint64_t i_rsvd_4 : 2;
- uint64_t i_c_cnt : 4;
- uint64_t i_rsvd_3 : 4;
- uint64_t i_clr_rqpd : 1;
- uint64_t i_clr_rppd : 1;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_fc_cnt : 4;
- uint64_t i_crb_vld : 15;
- uint64_t i_crb_mark : 15;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_precise : 1;
- uint64_t i_rsvd : 11;
- } ii_icmr_fld_s;
-} ii_icmr_u_t;
-
-
-/************************************************************************
- * *
- * This register allows control of the table portion of the CRB *
- * logic via software. Control operations from this register have *
- * priority over all incoming Crosstalk or BTE requests. *
- * *
- ************************************************************************/
-
-typedef union ii_iccr_u {
- uint64_t ii_iccr_regval;
- struct {
- uint64_t i_crb_num : 4;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_cmd : 8;
- uint64_t i_pending : 1;
- uint64_t i_rsvd : 47;
- } ii_iccr_fld_s;
-} ii_iccr_u_t;
-
-
-/************************************************************************
- * *
- * This register allows the maximum timeout value to be programmed. *
- * *
- ************************************************************************/
-
-typedef union ii_icto_u {
- uint64_t ii_icto_regval;
- struct {
- uint64_t i_timeout : 8;
- uint64_t i_rsvd : 56;
- } ii_icto_fld_s;
-} ii_icto_u_t;
-
-
-/************************************************************************
- * *
- * This register allows the timeout prescalar to be programmed. An *
- * internal counter is associated with this register. When the *
- * internal counter reaches the value of the PRESCALE field, the *
- * timer registers in all valid CRBs are incremented (CRBx_D[TIMEOUT] *
- * field). The internal counter resets to zero, and then continues *
- * counting. *
- * *
- ************************************************************************/
-
-typedef union ii_ictp_u {
- uint64_t ii_ictp_regval;
- struct {
- uint64_t i_prescale : 24;
- uint64_t i_rsvd : 40;
- } ii_ictp_fld_s;
-} ii_ictp_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * The CRB Entry registers can be conceptualized as rows and columns *
- * (illustrated in the table above). Each row contains the 4 *
- * registers required for a single CRB Entry. The first doubleword *
- * (column) for each entry is labeled A, and the second doubleword *
- * (higher address) is labeled B, the third doubleword is labeled C, *
- * the fourth doubleword is labeled D and the fifth doubleword is *
- * labeled E. All CRB entries have their addresses on a quarter *
- * cacheline aligned boundary. *
- * Upon reset, only the following fields are initialized: valid *
- * (VLD), priority count, timeout, timeout valid, and context valid. *
- * All other bits should be cleared by software before use (after *
- * recovering any potential error state from before the reset). *
- * The following four tables summarize the format for the four *
- * registers that are used for each ICRB# Entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_a_u {
- uint64_t ii_icrb0_a_regval;
- struct {
- uint64_t ia_iow : 1;
- uint64_t ia_vld : 1;
- uint64_t ia_addr : 47;
- uint64_t ia_tnum : 5;
- uint64_t ia_sidn : 4;
- uint64_t ia_rsvd : 6;
- } ii_icrb0_a_fld_s;
-} ii_icrb0_a_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_b_u {
- uint64_t ii_icrb0_b_regval;
- struct {
- uint64_t ib_xt_err : 1;
- uint64_t ib_mark : 1;
- uint64_t ib_ln_uce : 1;
- uint64_t ib_errcode : 3;
- uint64_t ib_error : 1;
- uint64_t ib_stall__bte_1 : 1;
- uint64_t ib_stall__bte_0 : 1;
- uint64_t ib_stall__intr : 1;
- uint64_t ib_stall_ib : 1;
- uint64_t ib_intvn : 1;
- uint64_t ib_wb : 1;
- uint64_t ib_hold : 1;
- uint64_t ib_ack : 1;
- uint64_t ib_resp : 1;
- uint64_t ib_ack_cnt : 11;
- uint64_t ib_rsvd : 7;
- uint64_t ib_exc : 5;
- uint64_t ib_init : 3;
- uint64_t ib_imsg : 8;
- uint64_t ib_imsgtype : 2;
- uint64_t ib_use_old : 1;
- uint64_t ib_rsvd_1 : 11;
- } ii_icrb0_b_fld_s;
-} ii_icrb0_b_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_c_u {
- uint64_t ii_icrb0_c_regval;
- struct {
- uint64_t ic_source : 15;
- uint64_t ic_size : 2;
- uint64_t ic_ct : 1;
- uint64_t ic_bte_num : 1;
- uint64_t ic_gbr : 1;
- uint64_t ic_resprqd : 1;
- uint64_t ic_bo : 1;
- uint64_t ic_suppl : 15;
- uint64_t ic_rsvd : 27;
- } ii_icrb0_c_fld_s;
-} ii_icrb0_c_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_d_u {
- uint64_t ii_icrb0_d_regval;
- struct {
- uint64_t id_pa_be : 43;
- uint64_t id_bte_op : 1;
- uint64_t id_pr_psc : 4;
- uint64_t id_pr_cnt : 4;
- uint64_t id_sleep : 1;
- uint64_t id_rsvd : 11;
- } ii_icrb0_d_fld_s;
-} ii_icrb0_d_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_e_u {
- uint64_t ii_icrb0_e_regval;
- struct {
- uint64_t ie_timeout : 8;
- uint64_t ie_context : 15;
- uint64_t ie_rsvd : 1;
- uint64_t ie_tvld : 1;
- uint64_t ie_cvld : 1;
- uint64_t ie_rsvd_0 : 38;
- } ii_icrb0_e_fld_s;
-} ii_icrb0_e_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the lower 64 bits of the header of the *
- * spurious message captured by II. Valid when the SP_MSG bit in ICMR *
- * register is set. *
- * *
- ************************************************************************/
-
-typedef union ii_icsml_u {
- uint64_t ii_icsml_regval;
- struct {
- uint64_t i_tt_addr : 47;
- uint64_t i_newsuppl_ex : 14;
- uint64_t i_reserved : 2;
- uint64_t i_overflow : 1;
- } ii_icsml_fld_s;
-} ii_icsml_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the middle 64 bits of the header of the *
- * spurious message captured by II. Valid when the SP_MSG bit in ICMR *
- * register is set. *
- * *
- ************************************************************************/
-
-typedef union ii_icsmm_u {
- uint64_t ii_icsmm_regval;
- struct {
- uint64_t i_tt_ack_cnt : 11;
- uint64_t i_reserved : 53;
- } ii_icsmm_fld_s;
-} ii_icsmm_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the microscopic state, all the inputs to *
- * the protocol table, captured with the spurious message. Valid when *
- * the SP_MSG bit in the ICMR register is set. *
- * *
- ************************************************************************/
-
-typedef union ii_icsmh_u {
- uint64_t ii_icsmh_regval;
- struct {
- uint64_t i_tt_vld : 1;
- uint64_t i_xerr : 1;
- uint64_t i_ft_cwact_o : 1;
- uint64_t i_ft_wact_o : 1;
- uint64_t i_ft_active_o : 1;
- uint64_t i_sync : 1;
- uint64_t i_mnusg : 1;
- uint64_t i_mnusz : 1;
- uint64_t i_plusz : 1;
- uint64_t i_plusg : 1;
- uint64_t i_tt_exc : 5;
- uint64_t i_tt_wb : 1;
- uint64_t i_tt_hold : 1;
- uint64_t i_tt_ack : 1;
- uint64_t i_tt_resp : 1;
- uint64_t i_tt_intvn : 1;
- uint64_t i_g_stall_bte1 : 1;
- uint64_t i_g_stall_bte0 : 1;
- uint64_t i_g_stall_il : 1;
- uint64_t i_g_stall_ib : 1;
- uint64_t i_tt_imsg : 8;
- uint64_t i_tt_imsgtype : 2;
- uint64_t i_tt_use_old : 1;
- uint64_t i_tt_respreqd : 1;
- uint64_t i_tt_bte_num : 1;
- uint64_t i_cbn : 1;
- uint64_t i_match : 1;
- uint64_t i_rpcnt_lt_34 : 1;
- uint64_t i_rpcnt_ge_34 : 1;
- uint64_t i_rpcnt_lt_18 : 1;
- uint64_t i_rpcnt_ge_18 : 1;
- uint64_t i_rpcnt_lt_2 : 1;
- uint64_t i_rpcnt_ge_2 : 1;
- uint64_t i_rqcnt_lt_18 : 1;
- uint64_t i_rqcnt_ge_18 : 1;
- uint64_t i_rqcnt_lt_2 : 1;
- uint64_t i_rqcnt_ge_2 : 1;
- uint64_t i_tt_device : 7;
- uint64_t i_tt_init : 3;
- uint64_t i_reserved : 5;
- } ii_icsmh_fld_s;
-} ii_icsmh_u_t;
-
-
-/************************************************************************
- * *
- * The Shub DEBUG unit provides a 3-bit selection signal to the *
- * II core and a 3-bit selection signal to the fsbclk domain in the II *
- * wrapper. *
- * *
- ************************************************************************/
-
-typedef union ii_idbss_u {
- uint64_t ii_idbss_regval;
- struct {
- uint64_t i_iioclk_core_submenu : 3;
- uint64_t i_rsvd : 5;
- uint64_t i_fsbclk_wrapper_submenu : 3;
- uint64_t i_rsvd_1 : 5;
- uint64_t i_iioclk_menu : 5;
- uint64_t i_rsvd_2 : 43;
- } ii_idbss_fld_s;
-} ii_idbss_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register is used to set up the length for a *
- * transfer and then to monitor the progress of that transfer. This *
- * register needs to be initialized before a transfer is started. A *
- * legitimate write to this register will set the Busy bit, clear the *
- * Error bit, and initialize the length to the value desired. *
- * While the transfer is in progress, hardware will decrement the *
- * length field with each successful block that is copied. Once the *
- * transfer completes, hardware will clear the Busy bit. The length *
- * field will also contain the number of cache lines left to be *
- * transferred. *
- * *
- ************************************************************************/
-
-typedef union ii_ibls0_u {
- uint64_t ii_ibls0_regval;
- struct {
- uint64_t i_length : 16;
- uint64_t i_error : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_busy : 1;
- uint64_t i_rsvd : 43;
- } ii_ibls0_fld_s;
-} ii_ibls0_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibsa0_u {
- uint64_t ii_ibsa0_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 42;
- uint64_t i_rsvd : 15;
- } ii_ibsa0_fld_s;
-} ii_ibsa0_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibda0_u {
- uint64_t ii_ibda0_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 42;
- uint64_t i_rsvd : 15;
- } ii_ibda0_fld_s;
-} ii_ibda0_u_t;
-
-
-/************************************************************************
- * *
- * Writing to this register sets up the attributes of the transfer *
- * and initiates the transfer operation. Reading this register has *
- * the side effect of terminating any transfer in progress. Note: *
- * stopping a transfer midstream could have an adverse impact on the *
- * other BTE. If a BTE stream has to be stopped (due to error *
- * handling for example), both BTE streams should be stopped and *
- * their transfers discarded. *
- * *
- ************************************************************************/
-
-typedef union ii_ibct0_u {
- uint64_t ii_ibct0_regval;
- struct {
- uint64_t i_zerofill : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_notify : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_poison : 1;
- uint64_t i_rsvd : 55;
- } ii_ibct0_fld_s;
-} ii_ibct0_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the address to which the WINV is sent. *
- * This address has to be cache line aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibna0_u {
- uint64_t ii_ibna0_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 42;
- uint64_t i_rsvd : 15;
- } ii_ibna0_fld_s;
-} ii_ibna0_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the programmable level as well as the node *
- * ID and PI unit of the processor to which the interrupt will be *
- * sent. *
- * *
- ************************************************************************/
-
-typedef union ii_ibia0_u {
- uint64_t ii_ibia0_regval;
- struct {
- uint64_t i_rsvd_2 : 1;
- uint64_t i_node_id : 11;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_level : 7;
- uint64_t i_rsvd : 41;
- } ii_ibia0_fld_s;
-} ii_ibia0_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register is used to set up the length for a *
- * transfer and then to monitor the progress of that transfer. This *
- * register needs to be initialized before a transfer is started. A *
- * legitimate write to this register will set the Busy bit, clear the *
- * Error bit, and initialize the length to the value desired. *
- * While the transfer is in progress, hardware will decrement the *
- * length field with each successful block that is copied. Once the *
- * transfer completes, hardware will clear the Busy bit. The length *
- * field will also contain the number of cache lines left to be *
- * transferred. *
- * *
- ************************************************************************/
-
-typedef union ii_ibls1_u {
- uint64_t ii_ibls1_regval;
- struct {
- uint64_t i_length : 16;
- uint64_t i_error : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_busy : 1;
- uint64_t i_rsvd : 43;
- } ii_ibls1_fld_s;
-} ii_ibls1_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibsa1_u {
- uint64_t ii_ibsa1_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 33;
- uint64_t i_rsvd : 24;
- } ii_ibsa1_fld_s;
-} ii_ibsa1_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibda1_u {
- uint64_t ii_ibda1_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 33;
- uint64_t i_rsvd : 24;
- } ii_ibda1_fld_s;
-} ii_ibda1_u_t;
-
-
-/************************************************************************
- * *
- * Writing to this register sets up the attributes of the transfer *
- * and initiates the transfer operation. Reading this register has *
- * the side effect of terminating any transfer in progress. Note: *
- * stopping a transfer midstream could have an adverse impact on the *
- * other BTE. If a BTE stream has to be stopped (due to error *
- * handling for example), both BTE streams should be stopped and *
- * their transfers discarded. *
- * *
- ************************************************************************/
-
-typedef union ii_ibct1_u {
- uint64_t ii_ibct1_regval;
- struct {
- uint64_t i_zerofill : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_notify : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_poison : 1;
- uint64_t i_rsvd : 55;
- } ii_ibct1_fld_s;
-} ii_ibct1_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the address to which the WINV is sent. *
- * This address has to be cache line aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibna1_u {
- uint64_t ii_ibna1_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 33;
- uint64_t i_rsvd : 24;
- } ii_ibna1_fld_s;
-} ii_ibna1_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the programmable level as well as the node *
- * ID and PI unit of the processor to which the interrupt will be *
- * sent. *
- * *
- ************************************************************************/
-
-typedef union ii_ibia1_u {
- uint64_t ii_ibia1_regval;
- struct {
- uint64_t i_pi_id : 1;
- uint64_t i_node_id : 8;
- uint64_t i_rsvd_1 : 7;
- uint64_t i_level : 7;
- uint64_t i_rsvd : 41;
- } ii_ibia1_fld_s;
-} ii_ibia1_u_t;
-
-
-/************************************************************************
- * *
- * This register defines the resources that feed information into *
- * the two performance counters located in the IO Performance *
- * Profiling Register. There are 17 different quantities that can be *
- * measured. Given these 17 different options, the two performance *
- * counters have 15 of them in common; menu selections 0 through 0xE *
- * are identical for each performance counter. As for the other two *
- * options, one is available from one performance counter and the *
- * other is available from the other performance counter. Hence, the *
- * II supports all 17*16=272 possible combinations of quantities to *
- * measure. *
- * *
- ************************************************************************/
-
-typedef union ii_ipcr_u {
- uint64_t ii_ipcr_regval;
- struct {
- uint64_t i_ippr0_c : 4;
- uint64_t i_ippr1_c : 4;
- uint64_t i_icct : 8;
- uint64_t i_rsvd : 48;
- } ii_ipcr_fld_s;
-} ii_ipcr_u_t;
-
-
-/************************************************************************
- * *
- * *
- * *
- ************************************************************************/
-
-typedef union ii_ippr_u {
- uint64_t ii_ippr_regval;
- struct {
- uint64_t i_ippr0 : 32;
- uint64_t i_ippr1 : 32;
- } ii_ippr_fld_s;
-} ii_ippr_u_t;
-
-
-
-/**************************************************************************
- * *
- * The following defines which were not formed into structures are *
- * probably indentical to another register, and the name of the *
- * register is provided against each of these registers. This *
- * information needs to be checked carefully *
- * *
- * IIO_ICRB1_A IIO_ICRB0_A *
- * IIO_ICRB1_B IIO_ICRB0_B *
- * IIO_ICRB1_C IIO_ICRB0_C *
- * IIO_ICRB1_D IIO_ICRB0_D *
- * IIO_ICRB1_E IIO_ICRB0_E *
- * IIO_ICRB2_A IIO_ICRB0_A *
- * IIO_ICRB2_B IIO_ICRB0_B *
- * IIO_ICRB2_C IIO_ICRB0_C *
- * IIO_ICRB2_D IIO_ICRB0_D *
- * IIO_ICRB2_E IIO_ICRB0_E *
- * IIO_ICRB3_A IIO_ICRB0_A *
- * IIO_ICRB3_B IIO_ICRB0_B *
- * IIO_ICRB3_C IIO_ICRB0_C *
- * IIO_ICRB3_D IIO_ICRB0_D *
- * IIO_ICRB3_E IIO_ICRB0_E *
- * IIO_ICRB4_A IIO_ICRB0_A *
- * IIO_ICRB4_B IIO_ICRB0_B *
- * IIO_ICRB4_C IIO_ICRB0_C *
- * IIO_ICRB4_D IIO_ICRB0_D *
- * IIO_ICRB4_E IIO_ICRB0_E *
- * IIO_ICRB5_A IIO_ICRB0_A *
- * IIO_ICRB5_B IIO_ICRB0_B *
- * IIO_ICRB5_C IIO_ICRB0_C *
- * IIO_ICRB5_D IIO_ICRB0_D *
- * IIO_ICRB5_E IIO_ICRB0_E *
- * IIO_ICRB6_A IIO_ICRB0_A *
- * IIO_ICRB6_B IIO_ICRB0_B *
- * IIO_ICRB6_C IIO_ICRB0_C *
- * IIO_ICRB6_D IIO_ICRB0_D *
- * IIO_ICRB6_E IIO_ICRB0_E *
- * IIO_ICRB7_A IIO_ICRB0_A *
- * IIO_ICRB7_B IIO_ICRB0_B *
- * IIO_ICRB7_C IIO_ICRB0_C *
- * IIO_ICRB7_D IIO_ICRB0_D *
- * IIO_ICRB7_E IIO_ICRB0_E *
- * IIO_ICRB8_A IIO_ICRB0_A *
- * IIO_ICRB8_B IIO_ICRB0_B *
- * IIO_ICRB8_C IIO_ICRB0_C *
- * IIO_ICRB8_D IIO_ICRB0_D *
- * IIO_ICRB8_E IIO_ICRB0_E *
- * IIO_ICRB9_A IIO_ICRB0_A *
- * IIO_ICRB9_B IIO_ICRB0_B *
- * IIO_ICRB9_C IIO_ICRB0_C *
- * IIO_ICRB9_D IIO_ICRB0_D *
- * IIO_ICRB9_E IIO_ICRB0_E *
- * IIO_ICRBA_A IIO_ICRB0_A *
- * IIO_ICRBA_B IIO_ICRB0_B *
- * IIO_ICRBA_C IIO_ICRB0_C *
- * IIO_ICRBA_D IIO_ICRB0_D *
- * IIO_ICRBA_E IIO_ICRB0_E *
- * IIO_ICRBB_A IIO_ICRB0_A *
- * IIO_ICRBB_B IIO_ICRB0_B *
- * IIO_ICRBB_C IIO_ICRB0_C *
- * IIO_ICRBB_D IIO_ICRB0_D *
- * IIO_ICRBB_E IIO_ICRB0_E *
- * IIO_ICRBC_A IIO_ICRB0_A *
- * IIO_ICRBC_B IIO_ICRB0_B *
- * IIO_ICRBC_C IIO_ICRB0_C *
- * IIO_ICRBC_D IIO_ICRB0_D *
- * IIO_ICRBC_E IIO_ICRB0_E *
- * IIO_ICRBD_A IIO_ICRB0_A *
- * IIO_ICRBD_B IIO_ICRB0_B *
- * IIO_ICRBD_C IIO_ICRB0_C *
- * IIO_ICRBD_D IIO_ICRB0_D *
- * IIO_ICRBD_E IIO_ICRB0_E *
- * IIO_ICRBE_A IIO_ICRB0_A *
- * IIO_ICRBE_B IIO_ICRB0_B *
- * IIO_ICRBE_C IIO_ICRB0_C *
- * IIO_ICRBE_D IIO_ICRB0_D *
- * IIO_ICRBE_E IIO_ICRB0_E *
- * *
- **************************************************************************/
-
-
-/*
- * Slightly friendlier names for some common registers.
- */
-#define IIO_WIDGET IIO_WID /* Widget identification */
-#define IIO_WIDGET_STAT IIO_WSTAT /* Widget status register */
-#define IIO_WIDGET_CTRL IIO_WCR /* Widget control register */
-#define IIO_PROTECT IIO_ILAPR /* IO interface protection */
-#define IIO_PROTECT_OVRRD IIO_ILAPO /* IO protect override */
-#define IIO_OUTWIDGET_ACCESS IIO_IOWA /* Outbound widget access */
-#define IIO_INWIDGET_ACCESS IIO_IIWA /* Inbound widget access */
-#define IIO_INDEV_ERR_MASK IIO_IIDEM /* Inbound device error mask */
-#define IIO_LLP_CSR IIO_ILCSR /* LLP control and status */
-#define IIO_LLP_LOG IIO_ILLR /* LLP log */
-#define IIO_XTALKCC_TOUT IIO_IXCC /* Xtalk credit count timeout*/
-#define IIO_XTALKTT_TOUT IIO_IXTT /* Xtalk tail timeout */
-#define IIO_IO_ERR_CLR IIO_IECLR /* IO error clear */
-#define IIO_IGFX_0 IIO_IGFX0
-#define IIO_IGFX_1 IIO_IGFX1
-#define IIO_IBCT_0 IIO_IBCT0
-#define IIO_IBCT_1 IIO_IBCT1
-#define IIO_IBLS_0 IIO_IBLS0
-#define IIO_IBLS_1 IIO_IBLS1
-#define IIO_IBSA_0 IIO_IBSA0
-#define IIO_IBSA_1 IIO_IBSA1
-#define IIO_IBDA_0 IIO_IBDA0
-#define IIO_IBDA_1 IIO_IBDA1
-#define IIO_IBNA_0 IIO_IBNA0
-#define IIO_IBNA_1 IIO_IBNA1
-#define IIO_IBIA_0 IIO_IBIA0
-#define IIO_IBIA_1 IIO_IBIA1
-#define IIO_IOPRB_0 IIO_IPRB0
-
-#define IIO_PRTE_A(_x) (IIO_IPRTE0_A + (8 * (_x)))
-#define IIO_PRTE_B(_x) (IIO_IPRTE0_B + (8 * (_x)))
-#define IIO_NUM_PRTES 8 /* Total number of PRB table entries */
-#define IIO_WIDPRTE_A(x) IIO_PRTE_A(((x) - 8)) /* widget ID to its PRTE
num */
-#define IIO_WIDPRTE_B(x) IIO_PRTE_B(((x) - 8)) /* widget ID to its PRTE
num */
-
-#define IIO_NUM_IPRBS (9)
-
-#define IIO_LLP_CSR_IS_UP 0x00002000
-#define IIO_LLP_CSR_LLP_STAT_MASK 0x00003000
-#define IIO_LLP_CSR_LLP_STAT_SHFT 12
-
-#define IIO_LLP_CB_MAX 0xffff /* in ILLR CB_CNT, Max Check Bit errors */
-#define IIO_LLP_SN_MAX 0xffff /* in ILLR SN_CNT, Max Sequence Number errors */
-
-/* key to IIO_PROTECT_OVRRD */
-#define IIO_PROTECT_OVRRD_KEY 0x53474972756c6573ull /* "SGIrules" */
-
-/* BTE register names */
-#define IIO_BTE_STAT_0 IIO_IBLS_0 /* Also BTE length/status 0 */
-#define IIO_BTE_SRC_0 IIO_IBSA_0 /* Also BTE source address 0 */
-#define IIO_BTE_DEST_0 IIO_IBDA_0 /* Also BTE dest. address 0 */
-#define IIO_BTE_CTRL_0 IIO_IBCT_0 /* Also BTE control/terminate 0 */
-#define IIO_BTE_NOTIFY_0 IIO_IBNA_0 /* Also BTE notification 0 */
-#define IIO_BTE_INT_0 IIO_IBIA_0 /* Also BTE interrupt 0 */
-#define IIO_BTE_OFF_0 0 /* Base offset from BTE 0 regs. */
-#define IIO_BTE_OFF_1 (IIO_IBLS_1 - IIO_IBLS_0) /* Offset from base
to BTE 1 */
-
-/* BTE register offsets from base */
-#define BTEOFF_STAT 0
-#define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0)
-#define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0)
-#define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0)
-#define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0)
-#define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0)
-
-
-/* names used in shub diags */
-#define IIO_BASE_BTE0 IIO_IBLS_0
-#define IIO_BASE_BTE1 IIO_IBLS_1
-
-/*
- * Macro which takes the widget number, and returns the
- * IO PRB address of that widget.
- * value _x is expected to be a widget number in the range
- * 0, 8 - 0xF
- */
-#define IIO_IOPRB(_x) (IIO_IOPRB_0 + ( ( (_x) < HUB_WIDGET_ID_MIN ? \
- (_x) : \
- (_x) - (HUB_WIDGET_ID_MIN-1)) << 3) )
-
-
-/* GFX Flow Control Node/Widget Register */
-#define IIO_IGFX_W_NUM_BITS 4 /* size of widget num field */
-#define IIO_IGFX_W_NUM_MASK ((1<<IIO_IGFX_W_NUM_BITS)-1)
-#define IIO_IGFX_W_NUM_SHIFT 0
-#define IIO_IGFX_PI_NUM_BITS 1 /* size of PI num field */
-#define IIO_IGFX_PI_NUM_MASK ((1<<IIO_IGFX_PI_NUM_BITS)-1)
-#define IIO_IGFX_PI_NUM_SHIFT 4
-#define IIO_IGFX_N_NUM_BITS 8 /* size of node num field */
-#define IIO_IGFX_N_NUM_MASK ((1<<IIO_IGFX_N_NUM_BITS)-1)
-#define IIO_IGFX_N_NUM_SHIFT 5
-#define IIO_IGFX_P_NUM_BITS 1 /* size of processor num field */
-#define IIO_IGFX_P_NUM_MASK ((1<<IIO_IGFX_P_NUM_BITS)-1)
-#define IIO_IGFX_P_NUM_SHIFT 16
-#define IIO_IGFX_INIT(widget, pi, node, cpu) (\
- (((widget) & IIO_IGFX_W_NUM_MASK) << IIO_IGFX_W_NUM_SHIFT) | \
- (((pi) & IIO_IGFX_PI_NUM_MASK)<< IIO_IGFX_PI_NUM_SHIFT)| \
- (((node) & IIO_IGFX_N_NUM_MASK) << IIO_IGFX_N_NUM_SHIFT) | \
- (((cpu) & IIO_IGFX_P_NUM_MASK) << IIO_IGFX_P_NUM_SHIFT))
-
-
-/* Scratch registers (all bits available) */
-#define IIO_SCRATCH_REG0 IIO_ISCR0
-#define IIO_SCRATCH_REG1 IIO_ISCR1
-#define IIO_SCRATCH_MASK 0xffffffffffffffffUL
-
-#define IIO_SCRATCH_BIT0_0 0x0000000000000001UL
-#define IIO_SCRATCH_BIT0_1 0x0000000000000002UL
-#define IIO_SCRATCH_BIT0_2 0x0000000000000004UL
-#define IIO_SCRATCH_BIT0_3 0x0000000000000008UL
-#define IIO_SCRATCH_BIT0_4 0x0000000000000010UL
-#define IIO_SCRATCH_BIT0_5 0x0000000000000020UL
-#define IIO_SCRATCH_BIT0_6 0x0000000000000040UL
-#define IIO_SCRATCH_BIT0_7 0x0000000000000080UL
-#define IIO_SCRATCH_BIT0_8 0x0000000000000100UL
-#define IIO_SCRATCH_BIT0_9 0x0000000000000200UL
-#define IIO_SCRATCH_BIT0_A 0x0000000000000400UL
-
-#define IIO_SCRATCH_BIT1_0 0x0000000000000001UL
-#define IIO_SCRATCH_BIT1_1 0x0000000000000002UL
-/* IO Translation Table Entries */
-#define IIO_NUM_ITTES 7 /* ITTEs numbered 0..6 */
- /* Hw manuals number them 1..7! */
-/*
- * IIO_IMEM Register fields.
- */
-#define IIO_IMEM_W0ESD 0x1UL /* Widget 0 shut down due to error */
-#define IIO_IMEM_B0ESD (1UL << 4) /* BTE 0 shut down due to error */
-#define IIO_IMEM_B1ESD (1UL << 8) /* BTE 1 Shut down due to error */
-
-/*
- * As a permanent workaround for a bug in the PI side of the shub, we've
- * redefined big window 7 as small window 0.
- XXX does this still apply for SN1??
- */
-#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1)
-
-/*
- * Use the top big window as a surrogate for the first small window
- */
-#define SWIN0_BIGWIN HUB_NUM_BIG_WINDOW
-
-#define ILCSR_WARM_RESET 0x100
-
-/*
- * CRB manipulation macros
- * The CRB macros are slightly complicated, since there are up to
- * four registers associated with each CRB entry.
- */
-#define IIO_NUM_CRBS 15 /* Number of CRBs */
-#define IIO_NUM_PC_CRBS 4 /* Number of partial cache CRBs */
-#define IIO_ICRB_OFFSET 8
-#define IIO_ICRB_0 IIO_ICRB0_A
-#define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */
-/* XXX - This is now tuneable:
- #define IIO_FIRST_PC_ENTRY 12
- */
-
-#define IIO_ICRB_A(_x) ((u64)(IIO_ICRB_0 + (6 * IIO_ICRB_OFFSET * (_x))))
-#define IIO_ICRB_B(_x) ((u64)((char *)IIO_ICRB_A(_x) + 1*IIO_ICRB_OFFSET))
-#define IIO_ICRB_C(_x) ((u64)((char *)IIO_ICRB_A(_x) + 2*IIO_ICRB_OFFSET))
-#define IIO_ICRB_D(_x) ((u64)((char *)IIO_ICRB_A(_x) + 3*IIO_ICRB_OFFSET))
-#define IIO_ICRB_E(_x) ((u64)((char *)IIO_ICRB_A(_x) + 4*IIO_ICRB_OFFSET))
-
-#define TNUM_TO_WIDGET_DEV(_tnum) (_tnum & 0x7)
-
-/*
- * values for "ecode" field
- */
-#define IIO_ICRB_ECODE_DERR 0 /* Directory error due to IIO access */
-#define IIO_ICRB_ECODE_PERR 1 /* Poison error on IO access */
-#define IIO_ICRB_ECODE_WERR 2 /* Write error by IIO access
- * e.g. WINV to a Read only line. */
-#define IIO_ICRB_ECODE_AERR 3 /* Access error caused by IIO access */
-#define IIO_ICRB_ECODE_PWERR 4 /* Error on partial write */
-#define IIO_ICRB_ECODE_PRERR 5 /* Error on partial read */
-#define IIO_ICRB_ECODE_TOUT 6 /* CRB timeout before deallocating */
-#define IIO_ICRB_ECODE_XTERR 7 /* Incoming xtalk pkt had error bit */
-
-/*
- * Values for field imsgtype
- */
-#define IIO_ICRB_IMSGT_XTALK 0 /* Incoming Meessage from Xtalk */
-#define IIO_ICRB_IMSGT_BTE 1 /* Incoming message from BTE */
-#define IIO_ICRB_IMSGT_SN1NET 2 /* Incoming message from SN1 net */
-#define IIO_ICRB_IMSGT_CRB 3 /* Incoming message from CRB ??? */
-
-/*
- * values for field initiator.
- */
-#define IIO_ICRB_INIT_XTALK 0 /* Message originated in xtalk */
-#define IIO_ICRB_INIT_BTE0 0x1 /* Message originated in BTE 0 */
-#define IIO_ICRB_INIT_SN1NET 0x2 /* Message originated in SN1net */
-#define IIO_ICRB_INIT_CRB 0x3 /* Message originated in CRB ? */
-#define IIO_ICRB_INIT_BTE1 0x5 /* MEssage originated in BTE 1 */
-
-/*
- * Number of credits Hub widget has while sending req/response to
- * xbow.
- * Value of 3 is required by Xbow 1.1
- * We may be able to increase this to 4 with Xbow 1.2.
- */
-#define HUBII_XBOW_CREDIT 3
-#define HUBII_XBOW_REV2_CREDIT 4
-
-/*
- * Number of credits that xtalk devices should use when communicating
- * with a SHub (depth of SHub's queue).
- */
-#define HUB_CREDIT 4
-
-/*
- * Some IIO_PRB fields
- */
-#define IIO_PRB_MULTI_ERR (1LL << 63)
-#define IIO_PRB_SPUR_RD (1LL << 51)
-#define IIO_PRB_SPUR_WR (1LL << 50)
-#define IIO_PRB_RD_TO (1LL << 49)
-#define IIO_PRB_ERROR (1LL << 48)
-
-/*************************************************************************
-
- Some of the IIO field masks and shifts are defined here.
- This is in order to maintain compatibility in SN0 and SN1 code
-
-**************************************************************************/
-
-/*
- * ICMR register fields
- * (Note: the IIO_ICMR_P_CNT and IIO_ICMR_PC_VLD from Hub are not
- * present in SHub)
- */
-
-#define IIO_ICMR_CRB_VLD_SHFT 20
-#define IIO_ICMR_CRB_VLD_MASK (0x7fffUL << IIO_ICMR_CRB_VLD_SHFT)
-
-#define IIO_ICMR_FC_CNT_SHFT 16
-#define IIO_ICMR_FC_CNT_MASK (0xf << IIO_ICMR_FC_CNT_SHFT)
-
-#define IIO_ICMR_C_CNT_SHFT 4
-#define IIO_ICMR_C_CNT_MASK (0xf << IIO_ICMR_C_CNT_SHFT)
-
-#define IIO_ICMR_PRECISE (1UL << 52)
-#define IIO_ICMR_CLR_RPPD (1UL << 13)
-#define IIO_ICMR_CLR_RQPD (1UL << 12)
-
-/*
- * IIO PIO Deallocation register field masks : (IIO_IPDR)
- XXX present but not needed in bedrock? See the manual.
- */
-#define IIO_IPDR_PND (1 << 4)
-
-/*
- * IIO CRB deallocation register field masks: (IIO_ICDR)
- */
-#define IIO_ICDR_PND (1 << 4)
-
-/*
- * IO BTE Length/Status (IIO_IBLS) register bit field definitions
- */
-#define IBLS_BUSY (0x1UL << 20)
-#define IBLS_ERROR_SHFT 16
-#define IBLS_ERROR (0x1UL << IBLS_ERROR_SHFT)
-#define IBLS_LENGTH_MASK 0xffff
-
-/*
- * IO BTE Control/Terminate register (IBCT) register bit field definitions
- */
-#define IBCT_POISON (0x1UL << 8)
-#define IBCT_NOTIFY (0x1UL << 4)
-#define IBCT_ZFIL_MODE (0x1UL << 0)
-
-/*
- * IIO Incoming Error Packet Header (IIO_IIEPH1/IIO_IIEPH2)
- */
-#define IIEPH1_VALID (1UL << 44)
-#define IIEPH1_OVERRUN (1UL << 40)
-#define IIEPH1_ERR_TYPE_SHFT 32
-#define IIEPH1_ERR_TYPE_MASK 0xf
-#define IIEPH1_SOURCE_SHFT 20
-#define IIEPH1_SOURCE_MASK 11
-#define IIEPH1_SUPPL_SHFT 8
-#define IIEPH1_SUPPL_MASK 11
-#define IIEPH1_CMD_SHFT 0
-#define IIEPH1_CMD_MASK 7
-
-#define IIEPH2_TAIL (1UL << 40)
-#define IIEPH2_ADDRESS_SHFT 0
-#define IIEPH2_ADDRESS_MASK 38
-
-#define IIEPH1_ERR_SHORT_REQ 2
-#define IIEPH1_ERR_SHORT_REPLY 3
-#define IIEPH1_ERR_LONG_REQ 4
-#define IIEPH1_ERR_LONG_REPLY 5
-
-/*
- * IO Error Clear register bit field definitions
- */
-#define IECLR_PI1_FWD_INT (1UL << 31) /* clear PI1_FORWARD_INT in iidsr
*/
-#define IECLR_PI0_FWD_INT (1UL << 30) /* clear PI0_FORWARD_INT in iidsr
*/
-#define IECLR_SPUR_RD_HDR (1UL << 29) /* clear valid bit in ixss reg */
-#define IECLR_BTE1 (1UL << 18) /* clear bte error 1 */
-#define IECLR_BTE0 (1UL << 17) /* clear bte error 0 */
-#define IECLR_CRAZY (1UL << 16) /* clear crazy bit in wstat reg */
-#define IECLR_PRB_F (1UL << 15) /* clear err bit in PRB_F reg */
-#define IECLR_PRB_E (1UL << 14) /* clear err bit in PRB_E reg */
-#define IECLR_PRB_D (1UL << 13) /* clear err bit in PRB_D reg */
-#define IECLR_PRB_C (1UL << 12) /* clear err bit in PRB_C reg */
-#define IECLR_PRB_B (1UL << 11) /* clear err bit in PRB_B reg */
-#define IECLR_PRB_A (1UL << 10) /* clear err bit in PRB_A reg */
-#define IECLR_PRB_9 (1UL << 9) /* clear err bit in PRB_9 reg */
-#define IECLR_PRB_8 (1UL << 8) /* clear err bit in PRB_8 reg */
-#define IECLR_PRB_0 (1UL << 0) /* clear err bit in PRB_0 reg */
-
-/*
- * IIO CRB control register Fields: IIO_ICCR
- */
-#define IIO_ICCR_PENDING (0x10000)
-#define IIO_ICCR_CMD_MASK (0xFF)
-#define IIO_ICCR_CMD_SHFT (7)
-#define IIO_ICCR_CMD_NOP (0x0) /* No Op */
-#define IIO_ICCR_CMD_WAKE (0x100) /* Reactivate CRB entry and
process */
-#define IIO_ICCR_CMD_TIMEOUT (0x200) /* Make CRB timeout & mark
invalid */
-#define IIO_ICCR_CMD_EJECT (0x400) /* Contents of entry written to
memory
- * via a WB
- */
-#define IIO_ICCR_CMD_FLUSH (0x800)
-
-/*
- *
- * CRB Register description.
- *
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- *
- * Many of the fields in CRB are status bits used by hardware
- * for implementation of the protocol. It's very dangerous to
- * mess around with the CRB registers.
- *
- * It's OK to read the CRB registers and try to make sense out of the
- * fields in CRB.
- *
- * Updating CRB requires all activities in Hub IIO to be quiesced.
- * otherwise, a write to CRB could corrupt other CRB entries.
- * CRBs are here only as a back door peek to shub IIO's status.
- * Quiescing implies no dmas no PIOs
- * either directly from the cpu or from sn0net.
- * this is not something that can be done easily. So, AVOID updating
- * CRBs.
- */
-
-/*
- * Easy access macros for CRBs, all 5 registers (A-E)
- */
-typedef ii_icrb0_a_u_t icrba_t;
-#define a_sidn ii_icrb0_a_fld_s.ia_sidn
-#define a_tnum ii_icrb0_a_fld_s.ia_tnum
-#define a_addr ii_icrb0_a_fld_s.ia_addr
-#define a_valid ii_icrb0_a_fld_s.ia_vld
-#define a_iow ii_icrb0_a_fld_s.ia_iow
-#define a_regvalue ii_icrb0_a_regval
-
-typedef ii_icrb0_b_u_t icrbb_t;
-#define b_use_old ii_icrb0_b_fld_s.ib_use_old
-#define b_imsgtype ii_icrb0_b_fld_s.ib_imsgtype
-#define b_imsg ii_icrb0_b_fld_s.ib_imsg
-#define b_initiator ii_icrb0_b_fld_s.ib_init
-#define b_exc ii_icrb0_b_fld_s.ib_exc
-#define b_ackcnt ii_icrb0_b_fld_s.ib_ack_cnt
-#define b_resp ii_icrb0_b_fld_s.ib_resp
-#define b_ack ii_icrb0_b_fld_s.ib_ack
-#define b_hold ii_icrb0_b_fld_s.ib_hold
-#define b_wb ii_icrb0_b_fld_s.ib_wb
-#define b_intvn ii_icrb0_b_fld_s.ib_intvn
-#define b_stall_ib ii_icrb0_b_fld_s.ib_stall_ib
-#define b_stall_int ii_icrb0_b_fld_s.ib_stall__intr
-#define b_stall_bte_0 ii_icrb0_b_fld_s.ib_stall__bte_0
-#define b_stall_bte_1 ii_icrb0_b_fld_s.ib_stall__bte_1
-#define b_error ii_icrb0_b_fld_s.ib_error
-#define b_ecode ii_icrb0_b_fld_s.ib_errcode
-#define b_lnetuce ii_icrb0_b_fld_s.ib_ln_uce
-#define b_mark ii_icrb0_b_fld_s.ib_mark
-#define b_xerr ii_icrb0_b_fld_s.ib_xt_err
-#define b_regvalue ii_icrb0_b_regval
-
-typedef ii_icrb0_c_u_t icrbc_t;
-#define c_suppl ii_icrb0_c_fld_s.ic_suppl
-#define c_barrop ii_icrb0_c_fld_s.ic_bo
-#define c_doresp ii_icrb0_c_fld_s.ic_resprqd
-#define c_gbr ii_icrb0_c_fld_s.ic_gbr
-#define c_btenum ii_icrb0_c_fld_s.ic_bte_num
-#define c_cohtrans ii_icrb0_c_fld_s.ic_ct
-#define c_xtsize ii_icrb0_c_fld_s.ic_size
-#define c_source ii_icrb0_c_fld_s.ic_source
-#define c_regvalue ii_icrb0_c_regval
-
-
-typedef ii_icrb0_d_u_t icrbd_t;
-#define d_sleep ii_icrb0_d_fld_s.id_sleep
-#define d_pricnt ii_icrb0_d_fld_s.id_pr_cnt
-#define d_pripsc ii_icrb0_d_fld_s.id_pr_psc
-#define d_bteop ii_icrb0_d_fld_s.id_bte_op
-#define d_bteaddr ii_icrb0_d_fld_s.id_pa_be /* ic_pa_be fld has 2 names*/
-#define d_benable ii_icrb0_d_fld_s.id_pa_be /* ic_pa_be fld has 2 names*/
-#define d_regvalue ii_icrb0_d_regval
-
-typedef ii_icrb0_e_u_t icrbe_t;
-#define icrbe_ctxtvld ii_icrb0_e_fld_s.ie_cvld
-#define icrbe_toutvld ii_icrb0_e_fld_s.ie_tvld
-#define icrbe_context ii_icrb0_e_fld_s.ie_context
-#define icrbe_timeout ii_icrb0_e_fld_s.ie_timeout
-#define e_regvalue ii_icrb0_e_regval
-
-
-/* Number of widgets supported by shub */
-#define HUB_NUM_WIDGET 9
-#define HUB_WIDGET_ID_MIN 0x8
-#define HUB_WIDGET_ID_MAX 0xf
-
-#define HUB_WIDGET_PART_NUM 0xc120
-#define MAX_HUBS_PER_XBOW 2
-
-/* A few more #defines for backwards compatibility */
-#define iprb_t ii_iprb0_u_t
-#define iprb_regval ii_iprb0_regval
-#define iprb_mult_err ii_iprb0_fld_s.i_mult_err
-#define iprb_spur_rd ii_iprb0_fld_s.i_spur_rd
-#define iprb_spur_wr ii_iprb0_fld_s.i_spur_wr
-#define iprb_rd_to ii_iprb0_fld_s.i_rd_to
-#define iprb_ovflow ii_iprb0_fld_s.i_of_cnt
-#define iprb_error ii_iprb0_fld_s.i_error
-#define iprb_ff ii_iprb0_fld_s.i_f
-#define iprb_mode ii_iprb0_fld_s.i_m
-#define iprb_bnakctr ii_iprb0_fld_s.i_nb
-#define iprb_anakctr ii_iprb0_fld_s.i_na
-#define iprb_xtalkctr ii_iprb0_fld_s.i_c
-
-#define LNK_STAT_WORKING 0x2 /* LLP is working */
-
-#define IIO_WSTAT_ECRAZY (1ULL << 32) /* Hub gone crazy */
-#define IIO_WSTAT_TXRETRY (1ULL << 9) /* Hub Tx Retry timeout */
-#define IIO_WSTAT_TXRETRY_MASK (0x7F) /* should be 0xFF?? */
-#define IIO_WSTAT_TXRETRY_SHFT (16)
-#define IIO_WSTAT_TXRETRY_CNT(w) (((w) >> IIO_WSTAT_TXRETRY_SHFT) & \
- IIO_WSTAT_TXRETRY_MASK)
-
-/* Number of II perf. counters we can multiplex at once */
-
-#define IO_PERF_SETS 32
-
-/* Bit for the widget in inbound access register */
-#define IIO_IIWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
-/* Bit for the widget in outbound access register */
-#define IIO_IOWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
-
-/* NOTE: The following define assumes that we are going to get
- * widget numbers from 8 thru F and the device numbers within
- * widget from 0 thru 7.
- */
-#define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((uint64_t)(1ULL << (8 * ((w) - 8) +
(d))))
-
-/* IO Interrupt Destination Register */
-#define IIO_IIDSR_SENT_SHIFT 28
-#define IIO_IIDSR_SENT_MASK 0x30000000
-#define IIO_IIDSR_ENB_SHIFT 24
-#define IIO_IIDSR_ENB_MASK 0x01000000
-#define IIO_IIDSR_NODE_SHIFT 9
-#define IIO_IIDSR_NODE_MASK 0x000ff700
-#define IIO_IIDSR_PI_ID_SHIFT 8
-#define IIO_IIDSR_PI_ID_MASK 0x00000100
-#define IIO_IIDSR_LVL_SHIFT 0
-#define IIO_IIDSR_LVL_MASK 0x000000ff
-
-/* Xtalk timeout threshhold register (IIO_IXTT) */
-#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */
-#define IXTT_RRSP_TO_MASK (0x1FULL << IXTT_RRSP_TO_SHFT)
-#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */
-#define IXTT_RRSP_PS_MASK (0x7FFFFFULL << IXTT_RRSP_PS_SHFT)
-#define IXTT_TAIL_TO_SHFT 0 /* tail timeout counter threshold */
-#define IXTT_TAIL_TO_MASK (0x3FFFFFFULL << IXTT_TAIL_TO_SHFT)
-
-/*
- * The IO LLP control status register and widget control register
- */
-
-typedef union hubii_wcr_u {
- uint64_t wcr_reg_value;
- struct {
- uint64_t wcr_widget_id: 4, /* LLP crossbar credit */
- wcr_tag_mode: 1, /* Tag mode */
- wcr_rsvd1: 8, /* Reserved */
- wcr_xbar_crd: 3, /* LLP crossbar credit */
- wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */
- wcr_dir_con: 1, /* widget direct connect */
- wcr_e_thresh: 5, /* elasticity threshold */
- wcr_rsvd: 41; /* unused */
- } wcr_fields_s;
-} hubii_wcr_t;
-
-#define iwcr_dir_con wcr_fields_s.wcr_dir_con
-
-/* The structures below are defined to extract and modify the ii
-performance registers */
-
-/* io_perf_sel allows the caller to specify what tests will be
- performed */
-
-typedef union io_perf_sel {
- uint64_t perf_sel_reg;
- struct {
- uint64_t perf_ippr0 : 4,
- perf_ippr1 : 4,
- perf_icct : 8,
- perf_rsvd : 48;
- } perf_sel_bits;
-} io_perf_sel_t;
-
-/* io_perf_cnt is to extract the count from the shub registers. Due to
- hardware problems there is only one counter, not two. */
-
-typedef union io_perf_cnt {
- uint64_t perf_cnt;
- struct {
- uint64_t perf_cnt : 20,
- perf_rsvd2 : 12,
- perf_rsvd1 : 32;
- } perf_cnt_bits;
-
-} io_perf_cnt_t;
-
-typedef union iprte_a {
- uint64_t entry;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_addr : 38;
- uint64_t i_init : 3;
- uint64_t i_source : 8;
- uint64_t i_rsvd : 2;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } iprte_fields;
-} iprte_a_t;
-
-#endif /* _ASM_IA64_SN_SHUBIO_H */
-
diff -urN linux/arch/ia64/sn/kernel/bte.c linux/arch/ia64/sn/kernel/bte.c
--- linux/arch/ia64/sn/kernel/bte.c 2004/10/25 20:44:15 1.10
+++ linux/arch/ia64/sn/kernel/bte.c 2005/02/13 20:16:17 1.11
@@ -13,7 +13,7 @@
#include <asm/sn/arch.h>
#include <asm/sn/sn_cpuid.h>
#include <asm/sn/pda.h>
-#include "shubio.h"
+#include <asm/sn/shubio.h>
#include <asm/nodedata.h>
#include <asm/delay.h>
diff -urN linux/arch/ia64/sn/kernel/bte_error.c
linux/arch/ia64/sn/kernel/bte_error.c
--- linux/arch/ia64/sn/kernel/bte_error.c 2005/02/07 02:54:33 1.3
+++ linux/arch/ia64/sn/kernel/bte_error.c 2005/02/13 20:16:17 1.4
@@ -10,7 +10,7 @@
#include <asm/sn/sn_sal.h>
#include "ioerror.h"
#include <asm/sn/addrs.h>
-#include "shubio.h"
+#include <asm/sn/shubio.h>
#include <asm/sn/geo.h>
#include "xtalk/xwidgetdev.h"
#include "xtalk/hubdev.h"
diff -urN linux/arch/ia64/sn/kernel/huberror.c
linux/arch/ia64/sn/kernel/huberror.c
--- linux/arch/ia64/sn/kernel/huberror.c 2004/10/25 20:44:15 1.1
+++ linux/arch/ia64/sn/kernel/huberror.c 2005/02/13 20:16:17 1.2
@@ -13,7 +13,7 @@
#include <asm/sn/sn_sal.h>
#include "ioerror.h"
#include <asm/sn/addrs.h>
-#include "shubio.h"
+#include <asm/sn/shubio.h>
#include <asm/sn/geo.h>
#include "xtalk/xwidgetdev.h"
#include "xtalk/hubdev.h"
diff -urN linux/arch/mips/defconfig linux/arch/mips/defconfig
--- linux/arch/mips/defconfig 2005/02/07 02:54:33 1.282
+++ linux/arch/mips/defconfig 2005/02/13 20:16:17 1.283
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:06 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:08 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/atlas_defconfig
linux/arch/mips/configs/atlas_defconfig
--- linux/arch/mips/configs/atlas_defconfig 2005/02/07 02:54:33 1.46
+++ linux/arch/mips/configs/atlas_defconfig 2005/02/13 20:16:17 1.47
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:06 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:08 2005
#
CONFIG_MIPS=y
@@ -151,6 +151,8 @@
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_BOARD_SCACHE=y
+CONFIG_RM7000_CPU_SCACHE=y
CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
@@ -1016,7 +1018,7 @@
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=m
+CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/capcella_defconfig
linux/arch/mips/configs/capcella_defconfig
--- linux/arch/mips/configs/capcella_defconfig 2005/02/07 02:54:33 1.46
+++ linux/arch/mips/configs/capcella_defconfig 2005/02/13 20:16:17 1.47
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:06 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:09 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/cobalt_defconfig
linux/arch/mips/configs/cobalt_defconfig
--- linux/arch/mips/configs/cobalt_defconfig 2005/02/07 02:54:33 1.43
+++ linux/arch/mips/configs/cobalt_defconfig 2005/02/13 20:16:17 1.44
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:07 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:09 2005
#
CONFIG_MIPS=y
@@ -654,7 +654,6 @@
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/db1000_defconfig
linux/arch/mips/configs/db1000_defconfig
--- linux/arch/mips/configs/db1000_defconfig 2005/02/07 02:54:33 1.48
+++ linux/arch/mips/configs/db1000_defconfig 2005/02/13 20:16:17 1.49
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:07 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:09 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/db1100_defconfig
linux/arch/mips/configs/db1100_defconfig
--- linux/arch/mips/configs/db1100_defconfig 2005/02/07 02:54:33 1.46
+++ linux/arch/mips/configs/db1100_defconfig 2005/02/13 20:16:17 1.47
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:08 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:10 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/db1500_defconfig
linux/arch/mips/configs/db1500_defconfig
--- linux/arch/mips/configs/db1500_defconfig 2005/02/07 02:54:33 1.50
+++ linux/arch/mips/configs/db1500_defconfig 2005/02/13 20:16:17 1.51
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:08 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:10 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/db1550_defconfig
linux/arch/mips/configs/db1550_defconfig
--- linux/arch/mips/configs/db1550_defconfig 2005/02/07 02:54:33 1.25
+++ linux/arch/mips/configs/db1550_defconfig 2005/02/13 20:16:17 1.26
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:08 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:10 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/ddb5476_defconfig
linux/arch/mips/configs/ddb5476_defconfig
--- linux/arch/mips/configs/ddb5476_defconfig 2005/02/07 02:54:33 1.43
+++ linux/arch/mips/configs/ddb5476_defconfig 2005/02/13 20:16:17 1.44
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:09 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:11 2005
#
CONFIG_MIPS=y
@@ -701,7 +701,6 @@
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/ddb5477_defconfig
linux/arch/mips/configs/ddb5477_defconfig
--- linux/arch/mips/configs/ddb5477_defconfig 2005/02/07 02:54:33 1.43
+++ linux/arch/mips/configs/ddb5477_defconfig 2005/02/13 20:16:17 1.44
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:09 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:11 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/decstation_defconfig
linux/arch/mips/configs/decstation_defconfig
--- linux/arch/mips/configs/decstation_defconfig 2005/02/07 02:54:33
1.44
+++ linux/arch/mips/configs/decstation_defconfig 2005/02/13 20:16:17
1.45
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:09 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:11 2005
#
CONFIG_MIPS=y
@@ -622,7 +622,6 @@
#
# CONFIG_NFS_FS is not set
# CONFIG_NFSD is not set
-# CONFIG_EXPORTFS is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
diff -urN linux/arch/mips/configs/e55_defconfig
linux/arch/mips/configs/e55_defconfig
--- linux/arch/mips/configs/e55_defconfig 2005/02/07 02:54:33 1.45
+++ linux/arch/mips/configs/e55_defconfig 2005/02/13 20:16:17 1.46
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:09 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:12 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/ev64120_defconfig
linux/arch/mips/configs/ev64120_defconfig
--- linux/arch/mips/configs/ev64120_defconfig 2005/02/07 02:54:33 1.42
+++ linux/arch/mips/configs/ev64120_defconfig 2005/02/13 20:16:17 1.43
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:10 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:12 2005
#
CONFIG_MIPS=y
@@ -646,7 +646,6 @@
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/ev96100_defconfig
linux/arch/mips/configs/ev96100_defconfig
--- linux/arch/mips/configs/ev96100_defconfig 2005/02/07 02:54:33 1.43
+++ linux/arch/mips/configs/ev96100_defconfig 2005/02/13 20:16:17 1.44
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:10 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:12 2005
#
CONFIG_MIPS=y
@@ -600,7 +600,6 @@
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/ip22_defconfig
linux/arch/mips/configs/ip22_defconfig
--- linux/arch/mips/configs/ip22_defconfig 2005/02/07 02:54:33 1.52
+++ linux/arch/mips/configs/ip22_defconfig 2005/02/13 20:16:17 1.53
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:10 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:12 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/ip27_defconfig
linux/arch/mips/configs/ip27_defconfig
--- linux/arch/mips/configs/ip27_defconfig 2005/02/07 02:54:33 1.56
+++ linux/arch/mips/configs/ip27_defconfig 2005/02/13 20:16:17 1.57
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:30:35 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:13 2005
#
CONFIG_MIPS=y
@@ -766,7 +766,6 @@
# CONFIG_ROOT_NFS is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
diff -urN linux/arch/mips/configs/ip32_defconfig
linux/arch/mips/configs/ip32_defconfig
--- linux/arch/mips/configs/ip32_defconfig 2005/02/07 02:54:33 1.46
+++ linux/arch/mips/configs/ip32_defconfig 2005/02/13 20:16:17 1.47
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:11 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:13 2005
#
CONFIG_MIPS=y
@@ -715,7 +715,6 @@
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/it8172_defconfig
linux/arch/mips/configs/it8172_defconfig
--- linux/arch/mips/configs/it8172_defconfig 2005/02/07 02:54:33 1.42
+++ linux/arch/mips/configs/it8172_defconfig 2005/02/13 20:16:17 1.43
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:11 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:13 2005
#
CONFIG_MIPS=y
@@ -714,7 +714,6 @@
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/ivr_defconfig
linux/arch/mips/configs/ivr_defconfig
--- linux/arch/mips/configs/ivr_defconfig 2005/02/07 02:54:33 1.42
+++ linux/arch/mips/configs/ivr_defconfig 2005/02/13 20:16:17 1.43
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:11 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:14 2005
#
CONFIG_MIPS=y
@@ -660,7 +660,6 @@
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/jaguar-atx_defconfig
linux/arch/mips/configs/jaguar-atx_defconfig
--- linux/arch/mips/configs/jaguar-atx_defconfig 2005/02/07 02:54:33
1.47
+++ linux/arch/mips/configs/jaguar-atx_defconfig 2005/02/13 20:16:17
1.48
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:12 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:14 2005
#
CONFIG_MIPS=y
@@ -608,7 +608,6 @@
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
diff -urN linux/arch/mips/configs/jmr3927_defconfig
linux/arch/mips/configs/jmr3927_defconfig
--- linux/arch/mips/configs/jmr3927_defconfig 2005/02/07 02:54:33 1.42
+++ linux/arch/mips/configs/jmr3927_defconfig 2005/02/13 20:16:17 1.43
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:12 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:14 2005
#
CONFIG_MIPS=y
@@ -669,7 +669,6 @@
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/lasat200_defconfig
linux/arch/mips/configs/lasat200_defconfig
--- linux/arch/mips/configs/lasat200_defconfig 2005/02/07 02:54:33 1.43
+++ linux/arch/mips/configs/lasat200_defconfig 2005/02/13 20:16:17 1.44
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:12 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:15 2005
#
CONFIG_MIPS=y
@@ -765,7 +765,6 @@
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/malta_defconfig
linux/arch/mips/configs/malta_defconfig
--- linux/arch/mips/configs/malta_defconfig 2005/02/07 02:54:33 1.45
+++ linux/arch/mips/configs/malta_defconfig 2005/02/13 20:16:17 1.46
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:13 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:15 2005
#
CONFIG_MIPS=y
@@ -154,6 +154,8 @@
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_BOARD_SCACHE=y
+CONFIG_RM7000_CPU_SCACHE=y
CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
@@ -1045,7 +1047,7 @@
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=m
+CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/mpc30x_defconfig
linux/arch/mips/configs/mpc30x_defconfig
--- linux/arch/mips/configs/mpc30x_defconfig 2005/02/07 02:54:33 1.47
+++ linux/arch/mips/configs/mpc30x_defconfig 2005/02/13 20:16:17 1.48
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:13 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:15 2005
#
CONFIG_MIPS=y
@@ -643,7 +643,6 @@
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/ocelot_3_defconfig
linux/arch/mips/configs/ocelot_3_defconfig
--- linux/arch/mips/configs/ocelot_3_defconfig 2005/02/07 02:54:33 1.15
+++ linux/arch/mips/configs/ocelot_3_defconfig 2005/02/13 20:16:17 1.16
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:13 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:16 2005
#
CONFIG_MIPS=y
@@ -821,7 +821,7 @@
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=m
+CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/ocelot_c_defconfig
linux/arch/mips/configs/ocelot_c_defconfig
--- linux/arch/mips/configs/ocelot_c_defconfig 2005/02/07 02:54:33 1.41
+++ linux/arch/mips/configs/ocelot_c_defconfig 2005/02/13 20:16:17 1.42
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:13 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:16 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/ocelot_defconfig
linux/arch/mips/configs/ocelot_defconfig
--- linux/arch/mips/configs/ocelot_defconfig 2005/02/07 02:54:33 1.43
+++ linux/arch/mips/configs/ocelot_defconfig 2005/02/13 20:16:17 1.44
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:14 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:16 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/ocelot_g_defconfig
linux/arch/mips/configs/ocelot_g_defconfig
--- linux/arch/mips/configs/ocelot_g_defconfig 2005/02/07 02:54:33 1.36
+++ linux/arch/mips/configs/ocelot_g_defconfig 2005/02/13 20:16:17 1.37
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:14 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:16 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/osprey_defconfig
linux/arch/mips/configs/osprey_defconfig
--- linux/arch/mips/configs/osprey_defconfig 2005/02/07 02:54:33 1.42
+++ linux/arch/mips/configs/osprey_defconfig 2005/02/13 20:16:17 1.43
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:14 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:17 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/pb1100_defconfig
linux/arch/mips/configs/pb1100_defconfig
--- linux/arch/mips/configs/pb1100_defconfig 2005/02/07 02:54:33 1.44
+++ linux/arch/mips/configs/pb1100_defconfig 2005/02/13 20:16:17 1.45
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:14 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:17 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/pb1500_defconfig
linux/arch/mips/configs/pb1500_defconfig
--- linux/arch/mips/configs/pb1500_defconfig 2005/02/07 02:54:33 1.50
+++ linux/arch/mips/configs/pb1500_defconfig 2005/02/13 20:16:17 1.51
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:15 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:17 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/pb1550_defconfig
linux/arch/mips/configs/pb1550_defconfig
--- linux/arch/mips/configs/pb1550_defconfig 2005/02/07 02:54:33 1.40
+++ linux/arch/mips/configs/pb1550_defconfig 2005/02/13 20:16:17 1.41
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:15 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:18 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/rm200_defconfig
linux/arch/mips/configs/rm200_defconfig
--- linux/arch/mips/configs/rm200_defconfig 2005/02/07 02:54:33 1.52
+++ linux/arch/mips/configs/rm200_defconfig 2005/02/13 20:16:17 1.53
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:15 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:18 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/sb1250-swarm_defconfig
linux/arch/mips/configs/sb1250-swarm_defconfig
--- linux/arch/mips/configs/sb1250-swarm_defconfig 2005/02/07 02:54:33
1.49
+++ linux/arch/mips/configs/sb1250-swarm_defconfig 2005/02/13 20:16:17
1.50
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:16 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:18 2005
#
CONFIG_MIPS=y
@@ -675,7 +675,6 @@
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
diff -urN linux/arch/mips/configs/sead_defconfig
linux/arch/mips/configs/sead_defconfig
--- linux/arch/mips/configs/sead_defconfig 2005/02/07 02:54:33 1.41
+++ linux/arch/mips/configs/sead_defconfig 2005/02/13 20:16:17 1.42
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:16 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:19 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/tb0226_defconfig
linux/arch/mips/configs/tb0226_defconfig
--- linux/arch/mips/configs/tb0226_defconfig 2005/02/07 02:54:33 1.45
+++ linux/arch/mips/configs/tb0226_defconfig 2005/02/13 20:16:17 1.46
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:16 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:19 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/tb0229_defconfig
linux/arch/mips/configs/tb0229_defconfig
--- linux/arch/mips/configs/tb0229_defconfig 2005/02/07 02:54:33 1.48
+++ linux/arch/mips/configs/tb0229_defconfig 2005/02/13 20:16:17 1.49
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:16 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:19 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/workpad_defconfig
linux/arch/mips/configs/workpad_defconfig
--- linux/arch/mips/configs/workpad_defconfig 2005/02/07 02:54:33 1.45
+++ linux/arch/mips/configs/workpad_defconfig 2005/02/13 20:16:17 1.46
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:17 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:19 2005
#
CONFIG_MIPS=y
diff -urN linux/arch/mips/configs/yosemite_defconfig
linux/arch/mips/configs/yosemite_defconfig
--- linux/arch/mips/configs/yosemite_defconfig 2005/02/07 02:54:33 1.47
+++ linux/arch/mips/configs/yosemite_defconfig 2005/02/13 20:16:17 1.48
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc3
-# Mon Feb 7 01:00:17 2005
+# Linux kernel version: 2.6.11-rc4
+# Sun Feb 13 19:46:20 2005
#
CONFIG_MIPS=y
@@ -591,7 +591,6 @@
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
diff -urN linux/arch/mips/kernel/linux32.c linux/arch/mips/kernel/linux32.c
--- linux/arch/mips/kernel/linux32.c 2005/02/07 02:54:34 1.23
+++ linux/arch/mips/kernel/linux32.c 2005/02/13 20:16:18 1.24
@@ -1115,7 +1115,7 @@
err = sys_shmdt ((char *)A(ptr));
break;
case SHMGET:
- err = sys_shmget (first, second, third);
+ err = sys_shmget (first, (unsigned)second, third);
break;
case SHMCTL:
err = do_sys32_shmctl (first, second, (void *)AA(ptr));
diff -urN linux/arch/ppc/boot/simple/Makefile
linux/arch/ppc/boot/simple/Makefile
--- linux/arch/ppc/boot/simple/Makefile 2005/01/13 14:05:31 1.27
+++ linux/arch/ppc/boot/simple/Makefile 2005/02/13 20:16:18 1.28
@@ -66,6 +66,12 @@
end-$(CONFIG_EBONY) := ebony
entrypoint-$(CONFIG_EBONY) := 0x01000000
+ zimage-$(CONFIG_LUAN) := zImage-TREE
+zimageinitrd-$(CONFIG_LUAN) := zImage.initrd-TREE
+ end-$(CONFIG_LUAN) := luan
+ entrypoint-$(CONFIG_LUAN) := 0x01000000
+ extra.o-$(CONFIG_LUAN) := pibs.o
+
zimage-$(CONFIG_OCOTEA) := zImage-TREE
zimageinitrd-$(CONFIG_OCOTEA) := zImage.initrd-TREE
end-$(CONFIG_OCOTEA) := ocotea
diff -urN linux/arch/ppc/boot/simple/pibs.c linux/arch/ppc/boot/simple/pibs.c
--- linux/arch/ppc/boot/simple/pibs.c 2004/10/12 14:36:33 1.1
+++ linux/arch/ppc/boot/simple/pibs.c 2005/02/13 20:16:18 1.2
@@ -1,5 +1,5 @@
/*
- * 2004 (c) MontaVista, Software, Inc. This file is licensed under
+ * 2004-2005 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
@@ -10,7 +10,7 @@
#include <linux/string.h>
#include <linux/ctype.h>
#include <asm/ppcboot.h>
-#include <platforms/4xx/ocotea.h>
+#include <asm/ibm4xx.h>
extern unsigned long decompress_kernel(unsigned long load_addr, int num_words,
unsigned long cksum);
@@ -89,13 +89,15 @@
decompress_kernel(load_addr, num_words, cksum);
- mac64 = simple_strtoull((char *)OCOTEA_PIBS_MAC_BASE, 0, 16);
+ mac64 = simple_strtoull((char *)PIBS_MAC_BASE, 0, 16);
memcpy(hold_residual->bi_enetaddr, (char *)&mac64+2, 6);
- mac64 = simple_strtoull((char
*)(OCOTEA_PIBS_MAC_BASE+OCOTEA_PIBS_MAC_OFFSET), 0, 16);
+#ifdef CONFIG_440GX
+ mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET), 0, 16);
memcpy(hold_residual->bi_enet1addr, (char *)&mac64+2, 6);
- mac64 = simple_strtoull((char
*)(OCOTEA_PIBS_MAC_BASE+OCOTEA_PIBS_MAC_OFFSET*2), 0, 16);
+ mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET*2), 0,
16);
memcpy(hold_residual->bi_enet2addr, (char *)&mac64+2, 6);
- mac64 = simple_strtoull((char
*)(OCOTEA_PIBS_MAC_BASE+OCOTEA_PIBS_MAC_OFFSET*3), 0, 16);
+ mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET*3), 0,
16);
memcpy(hold_residual->bi_enet3addr, (char *)&mac64+2, 6);
+#endif
return (void *)hold_residual;
}
diff -urN linux/arch/ppc/configs/luan_defconfig
linux/arch/ppc/configs/luan_defconfig
--- linux/arch/ppc/configs/luan_defconfig 1970/01/01 00:00:00
+++ linux/arch/ppc/configs/luan_defconfig Sun Feb 13 20:16:18 2005
1.1
@@ -0,0 +1,668 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.11-rc2
+# Mon Jan 31 16:26:31 2005
+#
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_GENERIC_NVRAM=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Processor
+#
+# CONFIG_6xx is not set
+# CONFIG_40x is not set
+CONFIG_44x=y
+# CONFIG_POWER3 is not set
+# CONFIG_POWER4 is not set
+# CONFIG_8xx is not set
+# CONFIG_E500 is not set
+CONFIG_BOOKE=y
+CONFIG_PTE_64BIT=y
+CONFIG_PHYS_64BIT=y
+# CONFIG_MATH_EMULATION is not set
+# CONFIG_CPU_FREQ is not set
+CONFIG_4xx=y
+
+#
+# IBM 4xx options
+#
+# CONFIG_EBONY is not set
+CONFIG_LUAN=y
+# CONFIG_OCOTEA is not set
+CONFIG_440SP=y
+CONFIG_440=y
+CONFIG_IBM_OCP=y
+CONFIG_IBM_EMAC4=y
+# CONFIG_PPC4xx_DMA is not set
+CONFIG_PPC_GEN550=y
+# CONFIG_PM is not set
+CONFIG_NOT_COHERENT_CACHE=y
+
+#
+# Platform options
+#
+# CONFIG_PC_KEYBOARD is not set
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="ip=on console=ttyS0,115200"
+
+#
+# Bus options
+#
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+# CONFIG_PCI_LEGACY_PROC is not set
+# CONFIG_PCI_NAMES is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# PC-card bridges
+#
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x01000000
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_RAM is not set
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_LBD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+# CONFIG_NETLINK_DEV is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_CONNTRACK_MARK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_IBM_EMAC=y
+# CONFIG_IBM_EMAC_ERRMSG is not set
+CONFIG_IBM_EMAC_RXB=128
+CONFIG_IBM_EMAC_TXB=128
+CONFIG_IBM_EMAC_FGAP=8
+CONFIG_IBM_EMAC_SKBRES=0
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_MULTIPORT is not set
+# CONFIG_SERIAL_8250_RSA is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed;
see USB_STORAGE Help for more information
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVPTS_FS_XATTR is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_FS is not set
+# CONFIG_KGDB is not set
+# CONFIG_XMON is not set
+CONFIG_BDI_SWITCH=y
+# CONFIG_SERIAL_TEXT_DEBUG is not set
+CONFIG_PPC_OCP=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Hardware crypto devices
+#
diff -urN linux/arch/ppc/kernel/head_44x.S linux/arch/ppc/kernel/head_44x.S
--- linux/arch/ppc/kernel/head_44x.S 2005/01/13 14:05:32 1.11
+++ linux/arch/ppc/kernel/head_44x.S 2005/02/13 20:16:18 1.12
@@ -21,7 +21,7 @@
* Author: MontaVista Software, Inc.
* frank_rowand@mvista.com or source@mvista.com
* debbie_chu@mvista.com
- * Copyright 2002-2004 MontaVista Software, Inc.
+ * Copyright 2002-2005 MontaVista Software, Inc.
* PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org>
*
* This program is free software; you can redistribute it and/or modify it
@@ -185,11 +185,11 @@
* are used for polled operation.
*/
/* pageid fields */
- lis r3,0xe000
+ lis r3,UART0_IO_BASE@h
ori r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_256M
/* xlat fields */
- lis r4,0x4000 /* RPN is 0x40000000 */
+ lis r4,UART0_PHYS_IO_BASE@h /* RPN depends on SoC */
ori r4,r4,0x0001 /* ERPN is 1 for second 4GB page */
/* attrib fields */
diff -urN linux/arch/ppc/lib/locks.c linux/arch/ppc/lib/locks.c
--- linux/arch/ppc/lib/locks.c 2004/06/09 14:12:05 1.17
+++ linux/arch/ppc/lib/locks.c 2005/02/13 20:16:18 1.18
@@ -91,44 +91,57 @@
}
EXPORT_SYMBOL(_raw_spin_unlock);
-
/*
- * Just like x86, implement read-write locks as a 32-bit counter
- * with the high bit (sign) being the "write" bit.
- * -- Cort
+ * For rwlocks, zero is unlocked, -1 is write-locked,
+ * positive is read-locked.
*/
+static __inline__ int __read_trylock(rwlock_t *rw)
+{
+ signed int tmp;
+
+ __asm__ __volatile__(
+"2: lwarx %0,0,%1 # __read_trylock\n\
+ addic. %0,%0,1\n\
+ ble- 1f\n"
+ PPC405_ERR77(0,%1)
+" stwcx. %0,0,%1\n\
+ bne- 2b\n\
+ isync\n\
+1:"
+ : "=&r"(tmp)
+ : "r"(&rw->lock)
+ : "cr0", "memory");
+
+ return tmp;
+}
+
+int _raw_read_trylock(rwlock_t *rw)
+{
+ return __read_trylock(rw) > 0;
+}
+EXPORT_SYMBOL(_raw_read_trylock);
+
void _raw_read_lock(rwlock_t *rw)
{
- unsigned long stuck = INIT_STUCK;
- int cpu = smp_processor_id();
+ unsigned int stuck;
-again:
- /* get our read lock in there */
- atomic_inc((atomic_t *) &(rw)->lock);
- if ( (signed long)((rw)->lock) < 0) /* someone has a write lock */
- {
- /* turn off our read lock */
- atomic_dec((atomic_t *) &(rw)->lock);
- /* wait for the write lock to go away */
- while ((signed long)((rw)->lock) < 0)
- {
- if(!--stuck)
- {
- printk("_read_lock(%p) CPU#%d\n", rw, cpu);
+ while (__read_trylock(rw) <= 0) {
+ stuck = INIT_STUCK;
+ while (!read_can_lock(rw)) {
+ if (--stuck == 0) {
+ printk("_read_lock(%p) CPU#%d lock %d\n",
+ rw, _smp_processor_id(), rw->lock);
stuck = INIT_STUCK;
}
}
- /* try to get the read lock again */
- goto again;
}
- wmb();
}
EXPORT_SYMBOL(_raw_read_lock);
void _raw_read_unlock(rwlock_t *rw)
{
if ( rw->lock == 0 )
- printk("_read_unlock(): %s/%d (nip %08lX) lock %lx\n",
+ printk("_read_unlock(): %s/%d (nip %08lX) lock %d\n",
current->comm,current->pid,current->thread.regs->nip,
rw->lock);
wmb();
@@ -138,40 +151,17 @@
void _raw_write_lock(rwlock_t *rw)
{
- unsigned long stuck = INIT_STUCK;
- int cpu = smp_processor_id();
+ unsigned int stuck;
-again:
- if ( test_and_set_bit(31,&(rw)->lock) ) /* someone has a write lock */
- {
- while ( (rw)->lock & (1<<31) ) /* wait for write lock */
- {
- if(!--stuck)
- {
- printk("write_lock(%p) CPU#%d lock %lx)\n",
- rw, cpu,rw->lock);
+ while (cmpxchg(&rw->lock, 0, -1) != 0) {
+ stuck = INIT_STUCK;
+ while (!write_can_lock(rw)) {
+ if (--stuck == 0) {
+ printk("write_lock(%p) CPU#%d lock %d)\n",
+ rw, _smp_processor_id(), rw->lock);
stuck = INIT_STUCK;
}
- barrier();
}
- goto again;
- }
-
- if ( (rw)->lock & ~(1<<31)) /* someone has a read lock */
- {
- /* clear our write lock and wait for reads to go away */
- clear_bit(31,&(rw)->lock);
- while ( (rw)->lock & ~(1<<31) )
- {
- if(!--stuck)
- {
- printk("write_lock(%p) 2 CPU#%d lock %lx)\n",
- rw, cpu,rw->lock);
- stuck = INIT_STUCK;
- }
- barrier();
- }
- goto again;
}
wmb();
}
@@ -179,14 +169,8 @@
int _raw_write_trylock(rwlock_t *rw)
{
- if (test_and_set_bit(31, &(rw)->lock)) /* someone has a write lock */
- return 0;
-
- if ((rw)->lock & ~(1<<31)) { /* someone has a read lock */
- /* clear our write lock and wait for reads to go away */
- clear_bit(31,&(rw)->lock);
+ if (cmpxchg(&rw->lock, 0, -1) != 0)
return 0;
- }
wmb();
return 1;
}
@@ -194,12 +178,12 @@
void _raw_write_unlock(rwlock_t *rw)
{
- if ( !(rw->lock & (1<<31)) )
- printk("_write_lock(): %s/%d (nip %08lX) lock %lx\n",
+ if (rw->lock >= 0)
+ printk("_write_lock(): %s/%d (nip %08lX) lock %d\n",
current->comm,current->pid,current->thread.regs->nip,
rw->lock);
wmb();
- clear_bit(31,&(rw)->lock);
+ rw->lock = 0;
}
EXPORT_SYMBOL(_raw_write_unlock);
diff -urN linux/arch/ppc/platforms/4xx/ibm440sp.c
linux/arch/ppc/platforms/4xx/ibm440sp.c
--- linux/arch/ppc/platforms/4xx/ibm440sp.c 1970/01/01 00:00:00
+++ linux/arch/ppc/platforms/4xx/ibm440sp.c Sun Feb 13 20:16:18 2005
1.1
@@ -0,0 +1,131 @@
+/*
+ * arch/ppc/platforms/4xx/ibm440sp.c
+ *
+ * PPC440SP I/O descriptions
+ *
+ * Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2002-2005 MontaVista Software Inc.
+ *
+ * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
+ * Copyright (c) 2003, 2004 Zultys Technologies
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <platforms/4xx/ibm440sp.h>
+#include <asm/ocp.h>
+
+static struct ocp_func_emac_data ibm440sp_emac0_def = {
+ .rgmii_idx = -1, /* No RGMII */
+ .rgmii_mux = -1, /* No RGMII */
+ .zmii_idx = -1, /* No ZMII */
+ .zmii_mux = -1, /* No ZMII */
+ .mal_idx = 0, /* MAL device index */
+ .mal_rx_chan = 0, /* MAL rx channel number */
+ .mal_tx_chan = 0, /* MAL tx channel number */
+ .wol_irq = 61, /* WOL interrupt number */
+ .mdio_idx = -1, /* No shared MDIO */
+ .tah_idx = -1, /* No TAH */
+ .jumbo = 1, /* Jumbo frames supported */
+};
+OCP_SYSFS_EMAC_DATA()
+
+static struct ocp_func_mal_data ibm440sp_mal0_def = {
+ .num_tx_chans = 4, /* Number of TX channels */
+ .num_rx_chans = 4, /* Number of RX channels */
+ .txeob_irq = 38, /* TX End Of Buffer IRQ */
+ .rxeob_irq = 39, /* RX End Of Buffer IRQ */
+ .txde_irq = 34, /* TX Descriptor Error IRQ */
+ .rxde_irq = 35, /* RX Descriptor Error IRQ */
+ .serr_irq = 33, /* MAL System Error IRQ */
+};
+OCP_SYSFS_MAL_DATA()
+
+static struct ocp_func_iic_data ibm440sp_iic0_def = {
+ .fast_mode = 0, /* Use standad mode (100Khz) */
+};
+
+static struct ocp_func_iic_data ibm440sp_iic1_def = {
+ .fast_mode = 0, /* Use standad mode (100Khz) */
+};
+OCP_SYSFS_IIC_DATA()
+
+struct ocp_def core_ocp[] = {
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_OPB,
+ .index = 0,
+ .paddr = 0x0000000140000000ULL,
+ .irq = OCP_IRQ_NA,
+ .pm = OCP_CPM_NA,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_16550,
+ .index = 0,
+ .paddr = PPC440SP_UART0_ADDR,
+ .irq = UART0_INT,
+ .pm = IBM_CPM_UART0,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_16550,
+ .index = 1,
+ .paddr = PPC440SP_UART1_ADDR,
+ .irq = UART1_INT,
+ .pm = IBM_CPM_UART1,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_16550,
+ .index = 2,
+ .paddr = PPC440SP_UART2_ADDR,
+ .irq = UART2_INT,
+ .pm = IBM_CPM_UART2,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_IIC,
+ .index = 0,
+ .paddr = 0x00000001f0000400ULL,
+ .irq = 2,
+ .pm = IBM_CPM_IIC0,
+ .additions = &ibm440sp_iic0_def,
+ .show = &ocp_show_iic_data
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_IIC,
+ .index = 1,
+ .paddr = 0x00000001f0000500ULL,
+ .irq = 3,
+ .pm = IBM_CPM_IIC1,
+ .additions = &ibm440sp_iic1_def,
+ .show = &ocp_show_iic_data
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_GPIO,
+ .index = 0,
+ .paddr = 0x00000001f0000700ULL,
+ .irq = OCP_IRQ_NA,
+ .pm = IBM_CPM_GPIO0,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_MAL,
+ .paddr = OCP_PADDR_NA,
+ .irq = OCP_IRQ_NA,
+ .pm = OCP_CPM_NA,
+ .additions = &ibm440sp_mal0_def,
+ .show = &ocp_show_mal_data,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_EMAC,
+ .index = 0,
+ .paddr = 0x00000001f0000800ULL,
+ .irq = 60,
+ .pm = OCP_CPM_NA,
+ .additions = &ibm440sp_emac0_def,
+ .show = &ocp_show_emac_data,
+ },
+ { .vendor = OCP_VENDOR_INVALID
+ }
+};
diff -urN linux/arch/ppc/platforms/4xx/ibm440sp.h
linux/arch/ppc/platforms/4xx/ibm440sp.h
--- linux/arch/ppc/platforms/4xx/ibm440sp.h 1970/01/01 00:00:00
+++ linux/arch/ppc/platforms/4xx/ibm440sp.h Sun Feb 13 20:16:18 2005
1.1
@@ -0,0 +1,64 @@
+/*
+ * arch/ppc/platforms/4xx/ibm440sp.h
+ *
+ * PPC440SP definitions
+ *
+ * Matt Porter <mporter@kernel.crashing.org>
+ *
+ * Copyright 2004-2005 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifdef __KERNEL__
+#ifndef __PPC_PLATFORMS_IBM440SP_H
+#define __PPC_PLATFORMS_IBM440SP_H
+
+#include <linux/config.h>
+
+#include <asm/ibm44x.h>
+
+/* UART */
+#define PPC440SP_UART0_ADDR 0x00000001f0000200ULL
+#define PPC440SP_UART1_ADDR 0x00000001f0000300ULL
+#define PPC440SP_UART2_ADDR 0x00000001f0000600ULL
+#define UART0_INT 0
+#define UART1_INT 1
+#define UART2_INT 2
+
+/* Clock and Power Management */
+#define IBM_CPM_IIC0 0x80000000 /* IIC interface */
+#define IBM_CPM_IIC1 0x40000000 /* IIC interface */
+#define IBM_CPM_PCI 0x20000000 /* PCI bridge */
+#define IBM_CPM_CPU 0x02000000 /* processor core */
+#define IBM_CPM_DMA 0x01000000 /* DMA controller */
+#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */
+#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */
+#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */
+#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */
+#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller
*/
+#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */
+#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */
+#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */
+#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt
Controller */
+#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */
+#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */
+#define IBM_CPM_UART0 0x00000200 /* serial port 0 */
+#define IBM_CPM_UART1 0x00000100 /* serial port 1 */
+#define IBM_CPM_UART2 0x00000100 /* serial port 1 */
+#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt
Controller */
+#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */
+#define IBM_CPM_EMAC0 0x00000020 /* EMAC 0 */
+
+#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \
+ | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \
+ | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \
+ | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \
+ | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \
+ | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \
+ | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 )
+#endif /* __PPC_PLATFORMS_IBM440SP_H */
+#endif /* __KERNEL__ */
diff -urN linux/arch/ppc/platforms/4xx/luan.c
linux/arch/ppc/platforms/4xx/luan.c
--- linux/arch/ppc/platforms/4xx/luan.c 1970/01/01 00:00:00
+++ linux/arch/ppc/platforms/4xx/luan.c Sun Feb 13 20:16:18 2005 1.1
@@ -0,0 +1,387 @@
+/*
+ * arch/ppc/platforms/4xx/luan.c
+ *
+ * Luan board specific routines
+ *
+ * Matt Porter <mporter@kernel.crashing.org>
+ *
+ * Copyright 2004-2005 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/types.h>
+#include <linux/major.h>
+#include <linux/blkdev.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/ide.h>
+#include <linux/initrd.h>
+#include <linux/irq.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/dma.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ocp.h>
+#include <asm/pci-bridge.h>
+#include <asm/time.h>
+#include <asm/todc.h>
+#include <asm/bootinfo.h>
+#include <asm/ppc4xx_pic.h>
+#include <asm/ppcboot.h>
+
+#include <syslib/ibm44x_common.h>
+#include <syslib/ibm440gx_common.h>
+#include <syslib/ibm440sp_common.h>
+
+/*
+ * This is a horrible kludge, we eventually need to abstract this
+ * generic PHY stuff, so the standard phy mode defines can be
+ * easily used from arch code.
+ */
+#include "../../../../drivers/net/ibm_emac/ibm_emac_phy.h"
+
+bd_t __res;
+
+static struct ibm44x_clocks clocks __initdata;
+
+static void __init
+luan_calibrate_decr(void)
+{
+ unsigned int freq;
+
+ if (mfspr(SPRN_CCR1) & CCR1_TCS)
+ freq = LUAN_TMR_CLK;
+ else
+ freq = clocks.cpu;
+
+ ibm44x_calibrate_decr(freq);
+}
+
+static int
+luan_show_cpuinfo(struct seq_file *m)
+{
+ seq_printf(m, "vendor\t\t: IBM\n");
+ seq_printf(m, "machine\t\t: PPC440SP EVB (Luan)\n");
+
+ return 0;
+}
+
+static inline int
+luan_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
+{
+ struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
+
+ /* PCIX0 in adapter mode, no host interrupt routing */
+
+ /* PCIX1 */
+ if (hose->index == 0) {
+ static char pci_irq_table[][4] =
+ /*
+ * PCI IDSEL/INTPIN->INTLINE
+ * A B C D
+ */
+ {
+ { 49, 49, 49, 49 }, /* IDSEL 1 - PCIX1 Slot 0 */
+ { 49, 49, 49, 49 }, /* IDSEL 2 - PCIX1 Slot 1 */
+ { 49, 49, 49, 49 }, /* IDSEL 3 - PCIX1 Slot 2 */
+ { 49, 49, 49, 49 }, /* IDSEL 4 - PCIX1 Slot 3 */
+ };
+ const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
+ return PCI_IRQ_TABLE_LOOKUP;
+ /* PCIX2 */
+ } else if (hose->index == 1) {
+ static char pci_irq_table[][4] =
+ /*
+ * PCI IDSEL/INTPIN->INTLINE
+ * A B C D
+ */
+ {
+ { 50, 50, 50, 50 }, /* IDSEL 1 - PCIX2 Slot 0 */
+ { 50, 50, 50, 50 }, /* IDSEL 2 - PCIX2 Slot 1 */
+ { 50, 50, 50, 50 }, /* IDSEL 3 - PCIX2 Slot 2 */
+ { 50, 50, 50, 50 }, /* IDSEL 4 - PCIX2 Slot 3 */
+ };
+ const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
+ return PCI_IRQ_TABLE_LOOKUP;
+ }
+ return -1;
+}
+
+static void __init luan_set_emacdata(void)
+{
+ struct ocp_def *def;
+ struct ocp_func_emac_data *emacdata;
+
+ /* Set phy_map, phy_mode, and mac_addr for the EMAC */
+ def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
+ emacdata = def->additions;
+ emacdata->phy_map = 0x00000001; /* Skip 0x00 */
+ emacdata->phy_mode = PHY_MODE_GMII;
+ memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
+}
+
+#define PCIX_READW(offset) \
+ (readw((void *)((u32)pcix_reg_base+offset)))
+
+#define PCIX_WRITEW(value, offset) \
+ (writew(value, (void *)((u32)pcix_reg_base+offset)))
+
+#define PCIX_WRITEL(value, offset) \
+ (writel(value, (void *)((u32)pcix_reg_base+offset)))
+
+static void __init
+luan_setup_pcix(void)
+{
+ int i;
+ void *pcix_reg_base;
+
+ for (i=0;i<3;i++) {
+ pcix_reg_base = ioremap64(PCIX0_REG_BASE + i*PCIX_REG_OFFSET,
PCIX_REG_SIZE);
+
+ /* Enable PCIX0 I/O, Mem, and Busmaster cycles */
+ PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO |
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND);
+
+ /* Disable all windows */
+ PCIX_WRITEL(0, PCIX0_POM0SA);
+ PCIX_WRITEL(0, PCIX0_POM1SA);
+ PCIX_WRITEL(0, PCIX0_POM2SA);
+ PCIX_WRITEL(0, PCIX0_PIM0SA);
+ PCIX_WRITEL(0, PCIX0_PIM0SAH);
+ PCIX_WRITEL(0, PCIX0_PIM1SA);
+ PCIX_WRITEL(0, PCIX0_PIM2SA);
+ PCIX_WRITEL(0, PCIX0_PIM2SAH);
+
+ /*
+ * Setup 512MB PLB->PCI outbound mem window
+ * (a_n000_0000->0_n000_0000)
+ * */
+ PCIX_WRITEL(0x0000000a, PCIX0_POM0LAH);
+ PCIX_WRITEL(0x80000000 | i*LUAN_PCIX_MEM_SIZE, PCIX0_POM0LAL);
+ PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH);
+ PCIX_WRITEL(0x80000000 | i*LUAN_PCIX_MEM_SIZE, PCIX0_POM0PCIAL);
+ PCIX_WRITEL(0xe0000001, PCIX0_POM0SA);
+
+ /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */
+ PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH);
+ PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL);
+ PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA);
+ PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH);
+
+ iounmap(pcix_reg_base);
+ }
+
+ eieio();
+}
+
+static void __init
+luan_setup_hose(struct pci_controller *hose,
+ int lower_mem,
+ int upper_mem,
+ int cfga,
+ int cfgd,
+ u64 pcix_io_base)
+{
+ char name[20];
+
+ sprintf(name, "PCIX%d host bridge", hose->index);
+
+ hose->pci_mem_offset = LUAN_PCIX_MEM_OFFSET;
+
+ pci_init_resource(&hose->io_resource,
+ LUAN_PCIX_LOWER_IO,
+ LUAN_PCIX_UPPER_IO,
+ IORESOURCE_IO,
+ name);
+
+ pci_init_resource(&hose->mem_resources[0],
+ lower_mem,
+ upper_mem,
+ IORESOURCE_MEM,
+ name);
+
+ hose->io_space.start = LUAN_PCIX_LOWER_IO;
+ hose->io_space.end = LUAN_PCIX_UPPER_IO;
+ hose->mem_space.start = lower_mem;
+ hose->mem_space.end = upper_mem;
+ isa_io_base =
+ (unsigned long)ioremap64(pcix_io_base, PCIX_IO_SIZE);
+ hose->io_base_virt = (void *)isa_io_base;
+
+ setup_indirect_pci(hose, cfga, cfgd);
+ hose->set_cfg_type = 1;
+}
+
+static void __init
+luan_setup_hoses(void)
+{
+ struct pci_controller *hose1, *hose2;
+
+ /* Configure windows on the PCI-X host bridge */
+ luan_setup_pcix();
+
+ /* Allocate hoses for PCIX1 and PCIX2 */
+ hose1 = pcibios_alloc_controller();
+ hose2 = pcibios_alloc_controller();
+ if (!hose1 || !hose2)
+ return;
+
+ /* Setup PCIX1 */
+ hose1->first_busno = 0;
+ hose1->last_busno = 0xff;
+
+ luan_setup_hose(hose1,
+ LUAN_PCIX1_LOWER_MEM,
+ LUAN_PCIX1_UPPER_MEM,
+ PCIX1_CFGA,
+ PCIX1_CFGD,
+ PCIX1_IO_BASE);
+
+ hose1->last_busno = pciauto_bus_scan(hose1, hose1->first_busno);
+
+ /* Setup PCIX2 */
+ hose2->first_busno = hose1->last_busno + 1;
+ hose2->last_busno = 0xff;
+
+ luan_setup_hose(hose2,
+ LUAN_PCIX2_LOWER_MEM,
+ LUAN_PCIX2_UPPER_MEM,
+ PCIX2_CFGA,
+ PCIX2_CFGD,
+ PCIX2_IO_BASE);
+
+ hose2->last_busno = pciauto_bus_scan(hose2, hose2->first_busno);
+
+ ppc_md.pci_swizzle = common_swizzle;
+ ppc_md.pci_map_irq = luan_map_irq;
+}
+
+TODC_ALLOC();
+
+static void __init
+luan_early_serial_map(void)
+{
+ struct uart_port port;
+
+ /* Setup ioremapped serial port access */
+ memset(&port, 0, sizeof(port));
+ port.membase = ioremap64(PPC440SP_UART0_ADDR, 8);
+ port.irq = UART0_INT;
+ port.uartclk = clocks.uart0;
+ port.regshift = 0;
+ port.iotype = SERIAL_IO_MEM;
+ port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
+ port.line = 0;
+
+ if (early_serial_setup(&port) != 0) {
+ printk("Early serial init of port 0 failed\n");
+ }
+
+ port.membase = ioremap64(PPC440SP_UART1_ADDR, 8);
+ port.irq = UART1_INT;
+ port.uartclk = clocks.uart1;
+ port.line = 1;
+
+ if (early_serial_setup(&port) != 0) {
+ printk("Early serial init of port 1 failed\n");
+ }
+
+ port.membase = ioremap64(PPC440SP_UART2_ADDR, 8);
+ port.irq = UART2_INT;
+ port.uartclk = BASE_BAUD;
+ port.line = 2;
+
+ if (early_serial_setup(&port) != 0) {
+ printk("Early serial init of port 2 failed\n");
+ }
+}
+
+static void __init
+luan_setup_arch(void)
+{
+ luan_set_emacdata();
+
+#if !defined(CONFIG_BDI_SWITCH)
+ /*
+ * The Abatron BDI JTAG debugger does not tolerate others
+ * mucking with the debug registers.
+ */
+ mtspr(SPRN_DBCR0, (DBCR0_TDE | DBCR0_IDM));
+#endif
+
+ /*
+ * Determine various clocks.
+ * To be completely correct we should get SysClk
+ * from FPGA, because it can be changed by on-board switches
+ * --ebs
+ */
+ /* 440GX and 440SP clocking is the same -mdp */
+ ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
+ ocp_sys_info.opb_bus_freq = clocks.opb;
+
+ /* init to some ~sane value until calibrate_delay() runs */
+ loops_per_jiffy = 50000000/HZ;
+
+ /* Setup PCIXn host bridges */
+ luan_setup_hoses();
+
+#ifdef CONFIG_BLK_DEV_INITRD
+ if (initrd_start)
+ ROOT_DEV = Root_RAM0;
+ else
+#endif
+#ifdef CONFIG_ROOT_NFS
+ ROOT_DEV = Root_NFS;
+#else
+ ROOT_DEV = Root_HDA1;
+#endif
+
+ luan_early_serial_map();
+
+ /* Identify the system */
+ printk("Luan port (MontaVista Software, Inc. <source@mvista.com>)\n");
+}
+
+void __init platform_init(unsigned long r3, unsigned long r4,
+ unsigned long r5, unsigned long r6, unsigned long r7)
+{
+ parse_bootinfo(find_bootinfo());
+
+ /*
+ * If we were passed in a board information, copy it into the
+ * residual data area.
+ */
+ if (r3)
+ __res = *(bd_t *)(r3 + KERNELBASE);
+
+ ibm44x_platform_init();
+
+ ppc_md.setup_arch = luan_setup_arch;
+ ppc_md.show_cpuinfo = luan_show_cpuinfo;
+ ppc_md.find_end_of_memory = ibm440sp_find_end_of_memory;
+ ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */
+
+ ppc_md.calibrate_decr = luan_calibrate_decr;
+#ifdef CONFIG_KGDB
+ ppc_md.early_serial_map = luan_early_serial_map;
+#endif
+}
diff -urN linux/arch/ppc/platforms/4xx/luan.h
linux/arch/ppc/platforms/4xx/luan.h
--- linux/arch/ppc/platforms/4xx/luan.h 1970/01/01 00:00:00
+++ linux/arch/ppc/platforms/4xx/luan.h Sun Feb 13 20:16:18 2005 1.1
@@ -0,0 +1,80 @@
+/*
+ * arch/ppc/platforms/4xx/luan.h
+ *
+ * Luan board definitions
+ *
+ * Matt Porter <mporter@kernel.crashing.org>
+ *
+ * Copyright 2004-2005 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifdef __KERNEL__
+#ifndef __ASM_LUAN_H__
+#define __ASM_LUAN_H__
+
+#include <linux/config.h>
+#include <platforms/4xx/ibm440sp.h>
+
+/* F/W TLB mapping used in bootloader glue to reset EMAC */
+#define PPC44x_EMAC0_MR0 0xa0000800
+
+/* Location of MAC addresses in PIBS image */
+#define PIBS_FLASH_BASE 0xffe00000
+#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0x1b0400)
+
+/* External timer clock frequency */
+#define LUAN_TMR_CLK 25000000
+
+/* Flash */
+#define LUAN_FPGA_REG_0 0x0000000148300000ULL
+#define LUAN_BOOT_LARGE_FLASH(x) (x & 0x40)
+#define LUAN_SMALL_FLASH_LOW 0x00000001ff900000ULL
+#define LUAN_SMALL_FLASH_HIGH 0x00000001ffe00000ULL
+#define LUAN_SMALL_FLASH_SIZE 0x100000
+#define LUAN_LARGE_FLASH_LOW 0x00000001ff800000ULL
+#define LUAN_LARGE_FLASH_HIGH 0x00000001ffc00000ULL
+#define LUAN_LARGE_FLASH_SIZE 0x400000
+
+/*
+ * Serial port defines
+ */
+#define RS_TABLE_SIZE 3
+
+/* PIBS defined UART mappings, used before early_serial_setup */
+#define UART0_IO_BASE (u8 *) 0xa0000200
+#define UART1_IO_BASE (u8 *) 0xa0000300
+#define UART2_IO_BASE (u8 *) 0xa0000600
+
+#define BASE_BAUD 11059200
+#define STD_UART_OP(num) \
+ { 0, BASE_BAUD, 0, UART##num##_INT, \
+ (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
+ iomem_base: UART##num##_IO_BASE, \
+ io_type: SERIAL_IO_MEM},
+
+#define SERIAL_PORT_DFNS \
+ STD_UART_OP(0) \
+ STD_UART_OP(1) \
+ STD_UART_OP(2)
+
+/* PCI support */
+#define LUAN_PCIX_LOWER_IO 0x00000000
+#define LUAN_PCIX_UPPER_IO 0x0000ffff
+#define LUAN_PCIX0_LOWER_MEM 0x80000000
+#define LUAN_PCIX0_UPPER_MEM 0x9fffffff
+#define LUAN_PCIX1_LOWER_MEM 0xa0000000
+#define LUAN_PCIX1_UPPER_MEM 0xbfffffff
+#define LUAN_PCIX2_LOWER_MEM 0xc0000000
+#define LUAN_PCIX2_UPPER_MEM 0xdfffffff
+
+#define LUAN_PCIX_MEM_SIZE 0x20000000
+#define LUAN_PCIX_MEM_OFFSET 0x00000000
+
+#endif /* __ASM_LUAN_H__ */
+#endif /* __KERNEL__ */
diff -urN linux/arch/ppc/platforms/4xx/Kconfig
linux/arch/ppc/platforms/4xx/Kconfig
--- linux/arch/ppc/platforms/4xx/Kconfig 2004/11/15 11:49:20 1.10
+++ linux/arch/ppc/platforms/4xx/Kconfig 2005/02/13 20:16:18 1.11
@@ -73,6 +73,11 @@
help
This option enables support for the IBM PPC440GP evaluation board.
+config LUAN
+ bool "Luan"
+ help
+ This option enables support for the IBM PPC440SP evaluation board.
+
config OCOTEA
bool "Ocotea"
help
@@ -103,9 +108,14 @@
depends on OCOTEA
default y
+config 440SP
+ bool
+ depends on LUAN
+ default y
+
config 440
bool
- depends on 440GP
+ depends on 440GP || 440SP
default y
config 440A
@@ -132,7 +142,7 @@
config IBM_OCP
bool
- depends on ASH || BUBINGA || CPCI405 || EBONY || EP405 || OCOTEA ||
REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
+ depends on ASH || BUBINGA || CPCI405 || EBONY || EP405 || LUAN ||
OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
default y
config XILINX_OCP
@@ -142,7 +152,7 @@
config IBM_EMAC4
bool
- depends on 440GX
+ depends on 440GX || 440SP
default y
config BIOS_FIXUP
diff -urN linux/arch/ppc/platforms/4xx/Makefile
linux/arch/ppc/platforms/4xx/Makefile
--- linux/arch/ppc/platforms/4xx/Makefile 2004/10/25 20:44:18 1.10
+++ linux/arch/ppc/platforms/4xx/Makefile 2005/02/13 20:16:18 1.11
@@ -6,6 +6,7 @@
obj-$(CONFIG_EBONY) += ebony.o
obj-$(CONFIG_EP405) += ep405.o
obj-$(CONFIG_BUBINGA) += bubinga.o
+obj-$(CONFIG_LUAN) += luan.o
obj-$(CONFIG_OAK) += oak.o
obj-$(CONFIG_OCOTEA) += ocotea.o
obj-$(CONFIG_REDWOOD_5) += redwood5.o
@@ -20,6 +21,7 @@
obj-$(CONFIG_REDWOOD_6) += ibmstbx25.o
obj-$(CONFIG_440GP) += ibm440gp.o
obj-$(CONFIG_440GX) += ibm440gx.o
+obj-$(CONFIG_440SP) += ibm440sp.o
obj-$(CONFIG_405EP) += ibm405ep.o
obj-$(CONFIG_405GPR) += ibm405gpr.o
obj-$(CONFIG_VIRTEX_II_PRO) += virtex-ii_pro.o
diff -urN linux/arch/ppc/platforms/4xx/ebony.c
linux/arch/ppc/platforms/4xx/ebony.c
--- linux/arch/ppc/platforms/4xx/ebony.c 2005/01/13 14:05:33 1.8
+++ linux/arch/ppc/platforms/4xx/ebony.c 2005/02/13 20:16:18 1.9
@@ -4,7 +4,7 @@
* Ebony board specific routines
*
* Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2002-2004 MontaVista Software Inc.
+ * Copyright 2002-2005 MontaVista Software Inc.
*
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
* Copyright (c) 2003, 2004 Zultys Technologies
@@ -140,7 +140,7 @@
{
void *pcix_reg_base;
- pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX0_REG_SIZE);
+ pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE);
/* Disable all windows */
PCIX_WRITEL(0, PCIX0_POM0SA);
diff -urN linux/arch/ppc/platforms/4xx/ocotea.c
linux/arch/ppc/platforms/4xx/ocotea.c
--- linux/arch/ppc/platforms/4xx/ocotea.c 2005/01/13 14:05:33 1.8
+++ linux/arch/ppc/platforms/4xx/ocotea.c 2005/02/13 20:16:18 1.9
@@ -5,7 +5,7 @@
*
* Matt Porter <mporter@kernel.crashing.org>
*
- * Copyright 2003-2004 MontaVista Software Inc.
+ * Copyright 2003-2005 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -163,7 +163,7 @@
{
void *pcix_reg_base;
- pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX0_REG_SIZE);
+ pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE);
/* Enable PCIX0 I/O, Mem, and Busmaster cycles */
PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO |
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND);
diff -urN linux/arch/ppc/platforms/4xx/ocotea.h
linux/arch/ppc/platforms/4xx/ocotea.h
--- linux/arch/ppc/platforms/4xx/ocotea.h 2004/10/12 14:36:33 1.3
+++ linux/arch/ppc/platforms/4xx/ocotea.h 2005/02/13 20:16:18 1.4
@@ -3,9 +3,9 @@
*
* Ocotea board definitions
*
- * Matt Porter <mporter@mvista.com>
+ * Matt Porter <mporter@kernel.crashing.org>
*
- * Copyright 2003 MontaVista Software Inc.
+ * Copyright 2003-2005 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -22,13 +22,13 @@
#include <platforms/4xx/ibm440gx.h>
/* F/W TLB mapping used in bootloader glue to reset EMAC */
-#define PPC44x_EMAC0_MR0 0xE0000800
+#define PPC44x_EMAC0_MR0 0xe0000800
/* Location of MAC addresses in PIBS image */
-#define OCOTEA_PIBS_FLASH 0xfff00000
-#define OCOTEA_PIBS_MAC_BASE (OCOTEA_PIBS_FLASH+0xb0500)
-#define OCOTEA_PIBS_MAC_SIZE 0x200
-#define OCOTEA_PIBS_MAC_OFFSET 0x100
+#define PIBS_FLASH_BASE 0xfff00000
+#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0xb0500)
+#define PIBS_MAC_SIZE 0x200
+#define PIBS_MAC_OFFSET 0x100
/* External timer clock frequency */
#define OCOTEA_TMR_CLK 25000000
diff -urN linux/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
linux/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
--- linux/arch/ppc/platforms/85xx/mpc85xx_cds_common.c 2005/02/07 02:54:36
1.6
+++ linux/arch/ppc/platforms/85xx/mpc85xx_cds_common.c 2005/02/13 20:16:18
1.7
@@ -281,16 +281,17 @@
#define ARCADIA_HOST_BRIDGE_IDSEL 17
#define ARCADIA_2ND_BRIDGE_IDSEL 3
+extern int mpc85xx_pci1_last_busno;
+
int
mpc85xx_exclude_device(u_char bus, u_char devfn)
{
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
#ifdef CONFIG_85xx_PCI2
- /* With the current code we know PCI2 will be bus 2, however this may
- * not be guarnteed */
- if (bus == 2 && PCI_SLOT(devfn) == 0)
- return PCIBIOS_DEVICE_NOT_FOUND;
+ if (mpc85xx_pci1_last_busno)
+ if (bus == (mpc85xx_pci1_last_busno + 1) && PCI_SLOT(devfn) ==
0)
+ return PCIBIOS_DEVICE_NOT_FOUND;
#endif
/* We explicitly do not go past the Tundra 320 Bridge */
if (bus == 1)
diff -urN linux/arch/ppc/syslib/ibm440sp_common.c
linux/arch/ppc/syslib/ibm440sp_common.c
--- linux/arch/ppc/syslib/ibm440sp_common.c 1970/01/01 00:00:00
+++ linux/arch/ppc/syslib/ibm440sp_common.c Sun Feb 13 20:16:18 2005
1.1
@@ -0,0 +1,71 @@
+/*
+ * arch/ppc/syslib/ibm440sp_common.c
+ *
+ * PPC440SP system library
+ *
+ * Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2002-2005 MontaVista Software Inc.
+ *
+ * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
+ * Copyright (c) 2003, 2004 Zultys Technologies
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/serial.h>
+
+#include <asm/param.h>
+#include <asm/ibm44x.h>
+#include <asm/mmu.h>
+#include <asm/machdep.h>
+#include <asm/time.h>
+#include <asm/ppc4xx_pic.h>
+
+/*
+ * Read the 440SP memory controller to get size of system memory.
+ */
+unsigned long __init ibm440sp_find_end_of_memory(void)
+{
+ u32 i;
+ u32 mem_size = 0;
+
+ /* Read two bank sizes and sum */
+ for (i=0; i<2; i++)
+ switch (mfdcr(DCRN_MQ0_BS0BAS + i) & MQ0_CONFIG_SIZE_MASK) {
+ case MQ0_CONFIG_SIZE_8M:
+ mem_size += PPC44x_MEM_SIZE_8M;
+ break;
+ case MQ0_CONFIG_SIZE_16M:
+ mem_size += PPC44x_MEM_SIZE_16M;
+ break;
+ case MQ0_CONFIG_SIZE_32M:
+ mem_size += PPC44x_MEM_SIZE_32M;
+ break;
+ case MQ0_CONFIG_SIZE_64M:
+ mem_size += PPC44x_MEM_SIZE_64M;
+ break;
+ case MQ0_CONFIG_SIZE_128M:
+ mem_size += PPC44x_MEM_SIZE_128M;
+ break;
+ case MQ0_CONFIG_SIZE_256M:
+ mem_size += PPC44x_MEM_SIZE_256M;
+ break;
+ case MQ0_CONFIG_SIZE_512M:
+ mem_size += PPC44x_MEM_SIZE_512M;
+ break;
+ case MQ0_CONFIG_SIZE_1G:
+ mem_size += PPC44x_MEM_SIZE_1G;
+ break;
+ case MQ0_CONFIG_SIZE_2G:
+ mem_size += PPC44x_MEM_SIZE_2G;
+ break;
+ default:
+ break;
+ }
+ return mem_size;
+}
diff -urN linux/arch/ppc/syslib/ibm440sp_common.h
linux/arch/ppc/syslib/ibm440sp_common.h
--- linux/arch/ppc/syslib/ibm440sp_common.h 1970/01/01 00:00:00
+++ linux/arch/ppc/syslib/ibm440sp_common.h Sun Feb 13 20:16:18 2005
1.1
@@ -0,0 +1,25 @@
+/*
+ * arch/ppc/syslib/ibm440sp_common.h
+ *
+ * PPC440SP system library
+ *
+ * Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2004-2005 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+#ifdef __KERNEL__
+#ifndef __PPC_SYSLIB_IBM440SP_COMMON_H
+#define __PPC_SYSLIB_IBM440SP_COMMON_H
+
+#ifndef __ASSEMBLY__
+
+extern unsigned long __init ibm440sp_find_end_of_memory(void);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __PPC_SYSLIB_IBM440SP_COMMON_H */
+#endif /* __KERNEL__ */
diff -urN linux/arch/ppc/syslib/Makefile linux/arch/ppc/syslib/Makefile
--- linux/arch/ppc/syslib/Makefile 2005/01/25 04:28:03 1.25
+++ linux/arch/ppc/syslib/Makefile 2005/02/13 20:16:18 1.26
@@ -13,6 +13,7 @@
obj-$(CONFIG_44x) += ibm44x_common.o
obj-$(CONFIG_440GP) += ibm440gp_common.o
obj-$(CONFIG_440GX) += ibm440gx_common.o
+obj-$(CONFIG_440SP) += ibm440gx_common.o ibm440sp_common.o
ifeq ($(CONFIG_4xx),y)
ifeq ($(CONFIG_VIRTEX_II_PRO),y)
obj-$(CONFIG_40x) += xilinx_pic.o
@@ -52,6 +53,7 @@
obj-$(CONFIG_K2) += i8259.o indirect_pci.o todc_time.o \
pci_auto.o
obj-$(CONFIG_LOPEC) += i8259.o pci_auto.o todc_time.o
+obj-$(CONFIG_LUAN) += indirect_pci.o pci_auto.o todc_time.o
obj-$(CONFIG_KATANA) += pci_auto.o
obj-$(CONFIG_MCPN765) += todc_time.o indirect_pci.o pci_auto.o \
open_pic.o i8259.o hawk_common.o
diff -urN linux/arch/ppc/syslib/ibm44x_common.c
linux/arch/ppc/syslib/ibm44x_common.c
--- linux/arch/ppc/syslib/ibm44x_common.c 2005/02/07 02:54:36 1.6
+++ linux/arch/ppc/syslib/ibm44x_common.c 2005/02/13 20:16:18 1.7
@@ -4,7 +4,7 @@
* PPC44x system library
*
* Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2002-2004 MontaVista Software Inc.
+ * Copyright 2002-2005 MontaVista Software Inc.
*
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
* Copyright (c) 2003, 2004 Zultys Technologies
@@ -39,11 +39,17 @@
* address in the 440's 36-bit address space. Fix
* them up with the appropriate ERPN
*/
- if ((addr >= PPC44x_IO_LO) && (addr < PPC44x_IO_HI))
+ if ((addr >= PPC44x_IO_LO) && (addr <= PPC44x_IO_HI))
page_4gb = PPC44x_IO_PAGE;
- else if ((addr >= PPC44x_PCICFG_LO) && (addr < PPC44x_PCICFG_HI))
+ else if ((addr >= PPC44x_PCI0CFG_LO) && (addr <= PPC44x_PCI0CFG_HI))
page_4gb = PPC44x_PCICFG_PAGE;
- else if ((addr >= PPC44x_PCIMEM_LO) && (addr < PPC44x_PCIMEM_HI))
+#ifdef CONFIG_440SP
+ else if ((addr >= PPC44x_PCI1CFG_LO) && (addr <= PPC44x_PCI1CFG_HI))
+ page_4gb = PPC44x_PCICFG_PAGE;
+ else if ((addr >= PPC44x_PCI2CFG_LO) && (addr <= PPC44x_PCI2CFG_HI))
+ page_4gb = PPC44x_PCICFG_PAGE;
+#endif
+ else if ((addr >= PPC44x_PCIMEM_LO) && (addr <= PPC44x_PCIMEM_HI))
page_4gb = PPC44x_PCIMEM_PAGE;
return (page_4gb | addr);
diff -urN linux/arch/ppc/syslib/mv64x60.c linux/arch/ppc/syslib/mv64x60.c
--- linux/arch/ppc/syslib/mv64x60.c 2005/02/07 02:54:36 1.2
+++ linux/arch/ppc/syslib/mv64x60.c 2005/02/13 20:16:18 1.3
@@ -32,7 +32,7 @@
u8 mv64x60_pci_exclude_bridge = 1;
-spinlock_t mv64x60_lock; /* Only really used by PIC code once init done */
+spinlock_t mv64x60_lock = SPIN_LOCK_UNLOCKED;
static phys_addr_t mv64x60_bridge_pbase = 0;
static void *mv64x60_bridge_vbase = 0;
diff -urN linux/arch/ppc/syslib/ppc4xx_dma.c linux/arch/ppc/syslib/ppc4xx_dma.c
--- linux/arch/ppc/syslib/ppc4xx_dma.c 2005/01/13 14:05:33 1.7
+++ linux/arch/ppc/syslib/ppc4xx_dma.c 2005/02/13 20:16:18 1.8
@@ -512,6 +512,8 @@
return DMA_STATUS_BAD_CHANNEL;
}
+ memcpy(p_dma_ch, &dma_channels[dmanr], sizeof (ppc_dma_ch_t));
+
#if DCRN_POL > 0
polarity = mfdcr(DCRN_POL);
#else
@@ -604,6 +606,84 @@
return (GET_DMA_PW(control));
}
+/*
+ * Clears the channel status bits
+ */
+int
+ppc4xx_clr_dma_status(unsigned int dmanr)
+{
+ if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
+ printk(KERN_ERR "ppc4xx_clr_dma_status: bad channel: %d\n",
dmanr);
+ return DMA_STATUS_BAD_CHANNEL;
+ }
+ mtdcr(DCRN_DMASR, ((u32)DMA_CH0_ERR | (u32)DMA_CS0 | (u32)DMA_TS0) >>
dmanr);
+ return DMA_STATUS_GOOD;
+}
+
+/*
+ * Enables the burst on the channel (BTEN bit in the control/count register)
+ * Note:
+ * For scatter/gather dma, this function MUST be called before the
+ * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the
+ * sgl list and used as each sgl element is added.
+ */
+int
+ppc4xx_enable_burst(unsigned int dmanr)
+{
+ unsigned int ctc;
+ if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
+ printk(KERN_ERR "ppc4xx_enable_burst: bad channel: %d\n",
dmanr);
+ return DMA_STATUS_BAD_CHANNEL;
+ }
+ ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) | DMA_CTC_BTEN;
+ mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc);
+ return DMA_STATUS_GOOD;
+}
+/*
+ * Disables the burst on the channel (BTEN bit in the control/count register)
+ * Note:
+ * For scatter/gather dma, this function MUST be called before the
+ * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the
+ * sgl list and used as each sgl element is added.
+ */
+int
+ppc4xx_disable_burst(unsigned int dmanr)
+{
+ unsigned int ctc;
+ if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
+ printk(KERN_ERR "ppc4xx_disable_burst: bad channel: %d\n",
dmanr);
+ return DMA_STATUS_BAD_CHANNEL;
+ }
+ ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) &~ DMA_CTC_BTEN;
+ mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc);
+ return DMA_STATUS_GOOD;
+}
+/*
+ * Sets the burst size (number of peripheral widths) for the channel
+ * (BSIZ bits in the control/count register))
+ * must be one of:
+ * DMA_CTC_BSIZ_2
+ * DMA_CTC_BSIZ_4
+ * DMA_CTC_BSIZ_8
+ * DMA_CTC_BSIZ_16
+ * Note:
+ * For scatter/gather dma, this function MUST be called before the
+ * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the
+ * sgl list and used as each sgl element is added.
+ */
+int
+ppc4xx_set_burst_size(unsigned int dmanr, unsigned int bsize)
+{
+ unsigned int ctc;
+ if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
+ printk(KERN_ERR "ppc4xx_set_burst_size: bad channel: %d\n",
dmanr);
+ return DMA_STATUS_BAD_CHANNEL;
+ }
+ ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) &~ DMA_CTC_BSIZ_MSK;
+ ctc |= (bsize & DMA_CTC_BSIZ_MSK);
+ mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc);
+ return DMA_STATUS_GOOD;
+}
EXPORT_SYMBOL(ppc4xx_init_dma_channel);
EXPORT_SYMBOL(ppc4xx_get_channel_config);
@@ -622,3 +702,7 @@
EXPORT_SYMBOL(ppc4xx_enable_dma_interrupt);
EXPORT_SYMBOL(ppc4xx_disable_dma_interrupt);
EXPORT_SYMBOL(ppc4xx_get_dma_status);
+EXPORT_SYMBOL(ppc4xx_clr_dma_status);
+EXPORT_SYMBOL(ppc4xx_enable_burst);
+EXPORT_SYMBOL(ppc4xx_disable_burst);
+EXPORT_SYMBOL(ppc4xx_set_burst_size);
diff -urN linux/arch/ppc/syslib/ppc4xx_sgdma.c
linux/arch/ppc/syslib/ppc4xx_sgdma.c
--- linux/arch/ppc/syslib/ppc4xx_sgdma.c 2004/08/13 07:18:52 1.1
+++ linux/arch/ppc/syslib/ppc4xx_sgdma.c 2005/02/13 20:16:18 1.2
@@ -120,6 +120,12 @@
psgl->ptail = psgl->phead;
psgl->ptail_dma = psgl->phead_dma;
} else {
+ if(p_dma_ch->int_on_final_sg) {
+ /* mask out all dma interrupts, except error, on tail
+ before adding new tail. */
+ psgl->ptail->control_count &=
+ ~(SG_TCI_ENABLE | SG_ETI_ENABLE);
+ }
psgl->ptail->next = psgl->ptail_dma + sizeof(ppc_sgl_t);
psgl->ptail++;
psgl->ptail_dma += sizeof(ppc_sgl_t);
@@ -217,7 +223,7 @@
}
sgl_addr = (ppc_sgl_t *) __va(mfdcr(DCRN_ASG0 + (psgl->dmanr * 0x8)));
- count_left = mfdcr(DCRN_DMACT0 + (psgl->dmanr * 0x8));
+ count_left = mfdcr(DCRN_DMACT0 + (psgl->dmanr * 0x8)) & SG_COUNT_MASK;
if (!sgl_addr) {
printk("ppc4xx_get_dma_sgl_residue: sgl addr register is
null\n");
@@ -351,10 +357,11 @@
int
ppc4xx_alloc_dma_handle(sgl_handle_t * phandle, unsigned int mode, unsigned
int dmanr)
{
- sgl_list_info_t *psgl;
+ sgl_list_info_t *psgl=NULL;
dma_addr_t dma_addr;
ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
uint32_t sg_command;
+ uint32_t ctc_settings;
void *ret;
if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
@@ -412,6 +419,11 @@
mtdcr(DCRN_ASGC, sg_command);
psgl->sgl_control = SG_ERI_ENABLE | SG_LINK;
+ /* keep control count register settings */
+ ctc_settings = mfdcr(DCRN_DMACT0 + (dmanr * 0x8))
+ & (DMA_CTC_BSIZ_MSK | DMA_CTC_BTEN); /*burst mode settings*/
+ psgl->sgl_control |= ctc_settings;
+
if (p_dma_ch->int_enable) {
if (p_dma_ch->tce_enable)
psgl->sgl_control |= SG_TCI_ENABLE;
diff -urN linux/arch/ppc/syslib/ppc85xx_setup.c
linux/arch/ppc/syslib/ppc85xx_setup.c
--- linux/arch/ppc/syslib/ppc85xx_setup.c 2005/02/07 02:54:36 1.6
+++ linux/arch/ppc/syslib/ppc85xx_setup.c 2005/02/13 20:16:18 1.7
@@ -243,6 +243,8 @@
}
#endif /* CONFIG_85xx_PCI2 */
+int mpc85xx_pci1_last_busno = 0;
+
void __init
mpc85xx_setup_hose(void)
{
@@ -341,6 +343,9 @@
IORESOURCE_IO, "PCI2 host bridge");
hose_b->last_busno = pciauto_bus_scan(hose_b, hose_b->first_busno);
+
+ /* let board code know what the last bus number was on PCI1 */
+ mpc85xx_pci1_last_busno = hose_a->last_busno;
#endif
return;
}
diff -urN linux/arch/ppc64/kernel/entry.S linux/arch/ppc64/kernel/entry.S
--- linux/arch/ppc64/kernel/entry.S 2005/02/07 02:54:36 1.35
+++ linux/arch/ppc64/kernel/entry.S 2005/02/13 20:16:18 1.36
@@ -231,6 +231,7 @@
syscall_exit_trace:
std r3,GPR3(r1)
bl .save_nvgprs
+ addi r3,r1,STACK_FRAME_OVERHEAD
bl .do_syscall_trace_leave
REST_NVGPRS(r1)
ld r3,GPR3(r1)
@@ -324,6 +325,7 @@
ld r4,TI_FLAGS(r4)
andi. r4,r4,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
beq+ 81f
+ addi r3,r1,STACK_FRAME_OVERHEAD
bl .do_syscall_trace_leave
81: b .ret_from_except
diff -urN linux/arch/ppc64/kernel/prom_init.c
linux/arch/ppc64/kernel/prom_init.c
--- linux/arch/ppc64/kernel/prom_init.c 2005/01/13 14:05:34 1.7
+++ linux/arch/ppc64/kernel/prom_init.c 2005/02/13 20:16:18 1.8
@@ -845,7 +845,7 @@
prom_debug("TCE table: %s\n", path);
prom_debug("\tnode = 0x%x\n", node);
- prom_debug("\tbase = 0x%x\n", vbase);
+ prom_debug("\tbase = 0x%x\n", base);
prom_debug("\tsize = 0x%x\n", minsize);
/* Initialize the table to have a one-to-one mapping
diff -urN linux/arch/ppc64/kernel/ptrace.c linux/arch/ppc64/kernel/ptrace.c
--- linux/arch/ppc64/kernel/ptrace.c 2004/12/27 02:15:51 1.14
+++ linux/arch/ppc64/kernel/ptrace.c 2005/02/13 20:16:18 1.15
@@ -313,10 +313,10 @@
do_syscall_trace();
}
-void do_syscall_trace_leave(void)
+void do_syscall_trace_leave(struct pt_regs *regs)
{
if (unlikely(current->audit_context))
- audit_syscall_exit(current, 0); /* FIXME: pass pt_regs */
+ audit_syscall_exit(current, regs->result);
if ((test_thread_flag(TIF_SYSCALL_TRACE)
|| test_thread_flag(TIF_SINGLESTEP))
diff -urN linux/arch/ppc64/kernel/syscalls.c linux/arch/ppc64/kernel/syscalls.c
--- linux/arch/ppc64/kernel/syscalls.c 2004/06/26 15:15:11 1.16
+++ linux/arch/ppc64/kernel/syscalls.c 2005/02/13 20:16:18 1.17
@@ -57,7 +57,8 @@
* This is really horribly ugly.
*/
asmlinkage int
-sys_ipc (uint call, int first, int second, long third, void __user *ptr, long
fifth)
+sys_ipc (uint call, int first, unsigned long second, long third,
+ void __user *ptr, long fifth)
{
int version, ret;
@@ -67,15 +68,16 @@
ret = -ENOSYS;
switch (call) {
case SEMOP:
- ret = sys_semtimedop (first, (struct sembuf __user *)ptr,
second,
- NULL);
+ ret = sys_semtimedop(first, (struct sembuf __user *)ptr,
+ (unsigned)second, NULL);
break;
case SEMTIMEDOP:
- ret = sys_semtimedop (first, (struct sembuf __user *)ptr,
second,
+ ret = sys_semtimedop(first, (struct sembuf __user *)ptr,
+ (unsigned)second,
(const struct timespec __user *) fifth);
break;
case SEMGET:
- ret = sys_semget (first, second, third);
+ ret = sys_semget (first, (int)second, third);
break;
case SEMCTL: {
union semun fourth;
@@ -85,11 +87,12 @@
break;
if ((ret = get_user(fourth.__pad, (void __user * __user *)ptr)))
break;
- ret = sys_semctl (first, second, third, fourth);
+ ret = sys_semctl(first, (int)second, third, fourth);
break;
}
case MSGSND:
- ret = sys_msgsnd (first, (struct msgbuf __user *) ptr, second,
third);
+ ret = sys_msgsnd(first, (struct msgbuf __user *)ptr,
+ (size_t)second, third);
break;
case MSGRCV:
switch (version) {
@@ -103,27 +106,29 @@
(struct ipc_kludge __user *)
ptr,
sizeof (tmp)) ? -EFAULT : 0))
break;
- ret = sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp,
- third);
+ ret = sys_msgrcv(first, tmp.msgp, (size_t) second,
+ tmp.msgtyp, third);
break;
}
default:
ret = sys_msgrcv (first, (struct msgbuf __user *) ptr,
- second, fifth, third);
+ (size_t)second, fifth, third);
break;
}
break;
case MSGGET:
- ret = sys_msgget ((key_t) first, second);
+ ret = sys_msgget ((key_t)first, (int)second);
break;
case MSGCTL:
- ret = sys_msgctl (first, second, (struct msqid_ds __user *)
ptr);
+ ret = sys_msgctl(first, (int)second,
+ (struct msqid_ds __user *)ptr);
break;
case SHMAT:
switch (version) {
default: {
ulong raddr;
- ret = do_shmat (first, (char __user *) ptr, second,
&raddr);
+ ret = do_shmat(first, (char __user *) ptr,
+ (int)second, &raddr);
if (ret)
break;
ret = put_user (raddr, (ulong __user *) third);
@@ -133,8 +138,8 @@
ret = -EINVAL;
if (!segment_eq(get_fs(), get_ds()))
break;
- ret = do_shmat (first, (char __user *) ptr, second,
- (ulong *) third);
+ ret = do_shmat(first, (char __user *)ptr,
+ (int)second, (ulong *)third);
break;
}
break;
@@ -142,10 +147,11 @@
ret = sys_shmdt ((char __user *)ptr);
break;
case SHMGET:
- ret = sys_shmget (first, second, third);
+ ret = sys_shmget (first, (size_t)second, third);
break;
case SHMCTL:
- ret = sys_shmctl (first, second, (struct shmid_ds __user *)
ptr);
+ ret = sys_shmctl(first, (int)second,
+ (struct shmid_ds __user *)ptr);
break;
}
diff -urN linux/arch/ppc64/kernel/sysfs.c linux/arch/ppc64/kernel/sysfs.c
--- linux/arch/ppc64/kernel/sysfs.c 2005/01/13 14:05:34 1.10
+++ linux/arch/ppc64/kernel/sysfs.c 2005/02/13 20:16:18 1.11
@@ -387,7 +387,7 @@
{
struct cpu *cpu = container_of(dev, struct cpu, sysdev);
- return sprintf(buf, "%u\n", get_hard_smp_processor_id(cpu->sysdev.id));
+ return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->sysdev.id));
}
static SYSDEV_ATTR(physical_id, 0444, show_physical_id, NULL);
diff -urN linux/arch/s390/defconfig linux/arch/s390/defconfig
--- linux/arch/s390/defconfig 2005/01/25 04:28:04 1.43
+++ linux/arch/s390/defconfig 2005/02/13 20:16:19 1.44
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc1
-# Fri Jan 14 14:56:51 2005
+# Linux kernel version: 2.6.11-rc2
+# Mon Jan 31 16:27:12 2005
#
CONFIG_MMU=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
@@ -156,6 +156,7 @@
#
# Block devices
#
+# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=m
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
CONFIG_BLK_DEV_NBD=m
@@ -579,5 +580,5 @@
# Library routines
#
# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC32 is not set
+CONFIG_CRC32=m
# CONFIG_LIBCRC32C is not set
diff -urN linux/arch/s390/kernel/compat_linux.c
linux/arch/s390/kernel/compat_linux.c
--- linux/arch/s390/kernel/compat_linux.c 2005/02/07 02:54:37 1.14
+++ linux/arch/s390/kernel/compat_linux.c 2005/02/13 20:16:19 1.15
@@ -331,7 +331,7 @@
case SHMDT:
return sys_shmdt(compat_ptr(ptr));
case SHMGET:
- return sys_shmget(first, second, third);
+ return sys_shmget(first, (unsigned)second, third);
case SHMCTL:
return compat_sys_shmctl(first, second, compat_ptr(ptr));
}
@@ -355,136 +355,6 @@
return sys_ftruncate(fd, (high << 32) | low);
}
-/* readdir & getdents */
-
-#define NAME_OFFSET(de) ((int) ((de)->d_name - (char *) (de)))
-#define ROUND_UP(x) (((x)+sizeof(u32)-1) & ~(sizeof(u32)-1))
-
-struct old_linux_dirent32 {
- u32 d_ino;
- u32 d_offset;
- unsigned short d_namlen;
- char d_name[1];
-};
-
-struct readdir_callback32 {
- struct old_linux_dirent32 * dirent;
- int count;
-};
-
-static int fillonedir(void * __buf, const char * name, int namlen,
- loff_t offset, ino_t ino, unsigned int d_type)
-{
- struct readdir_callback32 * buf = (struct readdir_callback32 *) __buf;
- struct old_linux_dirent32 * dirent;
-
- if (buf->count)
- return -EINVAL;
- buf->count++;
- dirent = buf->dirent;
- put_user(ino, &dirent->d_ino);
- put_user(offset, &dirent->d_offset);
- put_user(namlen, &dirent->d_namlen);
- copy_to_user(dirent->d_name, name, namlen);
- put_user(0, dirent->d_name + namlen);
- return 0;
-}
-
-asmlinkage long old32_readdir(unsigned int fd, struct old_linux_dirent32
*dirent, unsigned int count)
-{
- int error = -EBADF;
- struct file * file;
- struct readdir_callback32 buf;
-
- file = fget(fd);
- if (!file)
- goto out;
-
- buf.count = 0;
- buf.dirent = dirent;
-
- error = vfs_readdir(file, fillonedir, &buf);
- if (error < 0)
- goto out_putf;
- error = buf.count;
-
-out_putf:
- fput(file);
-out:
- return error;
-}
-
-struct linux_dirent32 {
- u32 d_ino;
- u32 d_off;
- unsigned short d_reclen;
- char d_name[1];
-};
-
-struct getdents_callback32 {
- struct linux_dirent32 * current_dir;
- struct linux_dirent32 * previous;
- int count;
- int error;
-};
-
-static int filldir(void * __buf, const char * name, int namlen, loff_t offset,
ino_t ino,
- unsigned int d_type)
-{
- struct linux_dirent32 * dirent;
- struct getdents_callback32 * buf = (struct getdents_callback32 *) __buf;
- int reclen = ROUND_UP(NAME_OFFSET(dirent) + namlen + 1);
-
- buf->error = -EINVAL; /* only used if we fail.. */
- if (reclen > buf->count)
- return -EINVAL;
- dirent = buf->previous;
- if (dirent)
- put_user(offset, &dirent->d_off);
- dirent = buf->current_dir;
- buf->previous = dirent;
- put_user(ino, &dirent->d_ino);
- put_user(reclen, &dirent->d_reclen);
- copy_to_user(dirent->d_name, name, namlen);
- put_user(0, dirent->d_name + namlen);
- buf->current_dir = ((void *)dirent) + reclen;
- buf->count -= reclen;
- return 0;
-}
-
-asmlinkage long sys32_getdents(unsigned int fd, struct linux_dirent32 *dirent,
unsigned int count)
-{
- struct file * file;
- struct linux_dirent32 * lastdirent;
- struct getdents_callback32 buf;
- int error = -EBADF;
-
- file = fget(fd);
- if (!file)
- goto out;
-
- buf.current_dir = dirent;
- buf.previous = NULL;
- buf.count = count;
- buf.error = 0;
-
- error = vfs_readdir(file, filldir, &buf);
- if (error < 0)
- goto out_putf;
- lastdirent = buf.previous;
- error = buf.error;
- if(lastdirent) {
- put_user(file->f_pos, &lastdirent->d_off);
- error = count - buf.count;
- }
-out_putf:
- fput(file);
-out:
- return error;
-}
-
-/* end of readdir & getdents */
-
int cp_compat_stat(struct kstat *stat, struct compat_stat *statbuf)
{
int err;
diff -urN linux/arch/s390/kernel/compat_linux.h
linux/arch/s390/kernel/compat_linux.h
--- linux/arch/s390/kernel/compat_linux.h 2005/01/13 14:05:36 1.6
+++ linux/arch/s390/kernel/compat_linux.h 2005/02/13 20:16:19 1.7
@@ -50,9 +50,10 @@
/* POSIX.1b timers */
struct {
- unsigned int _timer1;
- unsigned int _timer2;
-
+ timer_t _tid; /* timer id */
+ int _overrun; /* overrun count */
+ sigval_t _sigval; /* same as below */
+ int _sys_private; /* not to be passed to user */
} _timer;
/* POSIX.1b signals */
@@ -98,6 +99,8 @@
#define si_addr _sifields._sigfault._addr
#define si_band _sifields._sigpoll._band
#define si_fd _sifields._sigpoll._fd
+#define si_tid _sifields._timer._tid
+#define si_overrun _sifields._timer._overrun
/* asm/sigcontext.h */
typedef union
diff -urN linux/arch/s390/kernel/compat_signal.c
linux/arch/s390/kernel/compat_signal.c
--- linux/arch/s390/kernel/compat_signal.c 2005/01/13 14:05:36 1.11
+++ linux/arch/s390/kernel/compat_signal.c 2005/02/13 20:16:19 1.12
@@ -95,10 +95,14 @@
&to->si_addr);
break;
case __SI_POLL >> 16:
- case __SI_TIMER >> 16:
err |= __put_user(from->si_band, &to->si_band);
err |= __put_user(from->si_fd, &to->si_fd);
break;
+ case __SI_TIMER >> 16:
+ err |= __put_user(from->si_tid, &to->si_tid);
+ err |= __put_user(from->si_overrun, &to->si_overrun);
+ err |= __put_user(from->si_int, &to->si_int);
+ break;
default:
break;
}
@@ -142,10 +146,14 @@
to->si_addr = (void *)(u64) (tmp & PSW32_ADDR_INSN);
break;
case __SI_POLL >> 16:
- case __SI_TIMER >> 16:
err |= __get_user(to->si_band, &from->si_band);
err |= __get_user(to->si_fd, &from->si_fd);
break;
+ case __SI_TIMER >> 16:
+ err |= __get_user(to->si_tid, &from->si_tid);
+ err |= __get_user(to->si_overrun, &from->si_overrun);
+ err |= __get_user(to->si_int, &from->si_int);
+ break;
default:
break;
}
diff -urN linux/arch/s390/kernel/compat_wrapper.S
linux/arch/s390/kernel/compat_wrapper.S
--- linux/arch/s390/kernel/compat_wrapper.S 2005/01/25 04:28:04 1.14
+++ linux/arch/s390/kernel/compat_wrapper.S 2005/02/13 20:16:19 1.15
@@ -391,7 +391,7 @@
llgfr %r2,%r2 # unsigned int
llgtr %r3,%r3 # void *
llgfr %r4,%r4 # unsigned int
- jg old32_readdir # branch to system call
+ jg compat_sys_old_readdir # branch to system call
.globl old32_mmap_wrapper
old32_mmap_wrapper:
@@ -639,7 +639,7 @@
llgfr %r2,%r2 # unsigned int
llgtr %r3,%r3 # void *
llgfr %r4,%r4 # unsigned int
- jg sys32_getdents # branch to system call
+ jg compat_sys_getdents # branch to system call
.globl compat_sys_select_wrapper
compat_sys_select_wrapper:
diff -urN linux/arch/s390/kernel/cpcmd.c linux/arch/s390/kernel/cpcmd.c
--- linux/arch/s390/kernel/cpcmd.c 2005/01/25 04:28:04 1.7
+++ linux/arch/s390/kernel/cpcmd.c 2005/02/13 20:16:19 1.8
@@ -4,34 +4,41 @@
* S390 version
* Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
+ * Christian Borntraeger (cborntra@de.ibm.com),
*/
-#include <linux/stddef.h>
#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/stddef.h>
#include <linux/string.h>
#include <asm/ebcdic.h>
-#include <linux/spinlock.h>
#include <asm/cpcmd.h>
#include <asm/system.h>
static DEFINE_SPINLOCK(cpcmd_lock);
static char cpcmd_buf[240];
-void cpcmd(char *cmd, char *response, int rlen)
+/*
+ * the caller of __cpcmd has to ensure that the response buffer is below 2 GB
+ */
+void __cpcmd(char *cmd, char *response, int rlen)
{
- const int mask = 0x40000000L;
+ const int mask = 0x40000000L;
unsigned long flags;
- int cmdlen;
+ int cmdlen;
spin_lock_irqsave(&cpcmd_lock, flags);
cmdlen = strlen(cmd);
- BUG_ON(cmdlen>240);
+ BUG_ON(cmdlen > 240);
strcpy(cpcmd_buf, cmd);
ASCEBC(cpcmd_buf, cmdlen);
if (response != NULL && rlen > 0) {
+ memset(response, 0, rlen);
#ifndef CONFIG_ARCH_S390X
- asm volatile ("LRA 2,0(%0)\n\t"
+ asm volatile ("LRA 2,0(%0)\n\t"
"LR 4,%1\n\t"
"O 4,%4\n\t"
"LRA 3,0(%2)\n\t"
@@ -78,3 +85,27 @@
spin_unlock_irqrestore(&cpcmd_lock, flags);
}
+EXPORT_SYMBOL(__cpcmd);
+
+#ifdef CONFIG_ARCH_S390X
+void cpcmd(char *cmd, char *response, int rlen)
+{
+ char *lowbuf;
+ if ((rlen == 0) || (response == NULL)
+ || !((unsigned long)response >> 31))
+ __cpcmd(cmd, response, rlen);
+ else {
+ lowbuf = kmalloc(rlen, GFP_KERNEL | GFP_DMA);
+ if (!lowbuf) {
+ printk(KERN_WARNING
+ "cpcmd: could not allocate response buffer\n");
+ return;
+ }
+ __cpcmd(cmd, lowbuf, rlen);
+ memcpy(response, lowbuf, rlen);
+ kfree(lowbuf);
+ }
+}
+
+EXPORT_SYMBOL(cpcmd);
+#endif /* CONFIG_ARCH_S390X */
diff -urN linux/arch/s390/kernel/debug.c linux/arch/s390/kernel/debug.c
--- linux/arch/s390/kernel/debug.c 2004/11/15 11:49:21 1.16
+++ linux/arch/s390/kernel/debug.c 2005/02/13 20:16:19 1.17
@@ -931,7 +931,7 @@
int rc = 0;
int i;
unsigned long flags;
- mode_t mode = S_IFREG;
+ mode_t mode = S_IFREG | S_IRUSR | S_IWUSR;
struct proc_dir_entry *pde;
if (!id)
diff -urN linux/arch/s390/kernel/module.c linux/arch/s390/kernel/module.c
--- linux/arch/s390/kernel/module.c 2004/06/06 02:12:40 1.10
+++ linux/arch/s390/kernel/module.c 2005/02/13 20:16:19 1.11
@@ -396,8 +396,7 @@
const Elf_Shdr *sechdrs,
struct module *me)
{
- if (me->arch.syminfo)
- vfree(me->arch.syminfo);
+ vfree(me->arch.syminfo);
return 0;
}
diff -urN linux/arch/s390/kernel/s390_ksyms.c
linux/arch/s390/kernel/s390_ksyms.c
--- linux/arch/s390/kernel/s390_ksyms.c 2004/10/12 14:36:34 1.22
+++ linux/arch/s390/kernel/s390_ksyms.c 2005/02/13 20:16:19 1.23
@@ -63,4 +63,3 @@
EXPORT_SYMBOL(console_devno);
EXPORT_SYMBOL(console_irq);
EXPORT_SYMBOL(sys_wait4);
-EXPORT_SYMBOL(cpcmd);
diff -urN linux/arch/s390/kernel/setup.c linux/arch/s390/kernel/setup.c
--- linux/arch/s390/kernel/setup.c 2005/02/07 02:54:37 1.35
+++ linux/arch/s390/kernel/setup.c 2005/02/13 20:16:19 1.36
@@ -76,8 +76,15 @@
static char command_line[COMMAND_LINE_SIZE] = { 0, };
-static struct resource code_resource = { "Kernel code", 0x100000, 0 };
-static struct resource data_resource = { "Kernel data", 0, 0 };
+static struct resource code_resource = {
+ .name = "Kernel code",
+ .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
+};
+
+static struct resource data_resource = {
+ .name = "Kernel data",
+ .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
+};
/*
* cpu_init() initializes state that is per-CPU.
@@ -184,11 +191,11 @@
char *ptr;
if (MACHINE_IS_VM) {
- cpcmd("QUERY CONSOLE", query_buffer, 1024);
+ __cpcmd("QUERY CONSOLE", query_buffer, 1024);
console_devno = simple_strtoul(query_buffer + 5, NULL, 16);
ptr = strstr(query_buffer, "SUBCHANNEL =");
console_irq = simple_strtoul(ptr + 13, NULL, 16);
- cpcmd("QUERY TERM", query_buffer, 1024);
+ __cpcmd("QUERY TERM", query_buffer, 1024);
ptr = strstr(query_buffer, "CONMODE");
/*
* Set the conmode to 3215 so that the device recognition
@@ -197,7 +204,7 @@
* 3215 and the 3270 driver will try to access the console
* device (3215 as console and 3270 as normal tty).
*/
- cpcmd("TERM CONMODE 3215", NULL, 0);
+ __cpcmd("TERM CONMODE 3215", NULL, 0);
if (ptr == NULL) {
#if defined(CONFIG_SCLP_CONSOLE)
SET_CONSOLE_SCLP;
@@ -314,7 +321,6 @@
unsigned long bootmap_size;
unsigned long memory_start, memory_end;
char c = ' ', cn, *to = command_line, *from = COMMAND_LINE;
- struct resource *res;
unsigned long start_pfn, end_pfn;
static unsigned int smptrap=0;
unsigned long delay = 0;
@@ -472,6 +478,30 @@
}
#endif
+ for (i = 0; i < 16 && memory_chunk[i].size > 0; i++) {
+ struct resource *res;
+
+ res = alloc_bootmem_low(sizeof(struct resource));
+ res->flags = IORESOURCE_BUSY | IORESOURCE_MEM;
+
+ switch (memory_chunk[i].type) {
+ case CHUNK_READ_WRITE:
+ res->name = "System RAM";
+ break;
+ case CHUNK_READ_ONLY:
+ res->name = "System ROM";
+ res->flags |= IORESOURCE_READONLY;
+ break;
+ default:
+ res->name = "reserved";
+ }
+ res->start = memory_chunk[i].addr;
+ res->end = memory_chunk[i].addr + memory_chunk[i].size - 1;
+ request_resource(&iomem_resource, res);
+ request_resource(res, &code_resource);
+ request_resource(res, &data_resource);
+ }
+
/*
* Setup lowcore for boot cpu
*/
@@ -524,14 +554,6 @@
*/
paging_init();
- res = alloc_bootmem_low(sizeof(struct resource));
- res->start = 0;
- res->end = memory_end;
- res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
- request_resource(&iomem_resource, res);
- request_resource(res, &code_resource);
- request_resource(res, &data_resource);
-
/* Setup default console */
conmode_default();
}
diff -urN linux/arch/s390/kernel/sys_s390.c linux/arch/s390/kernel/sys_s390.c
--- linux/arch/s390/kernel/sys_s390.c 2004/06/16 12:09:35 1.14
+++ linux/arch/s390/kernel/sys_s390.c 2005/02/13 20:16:19 1.15
@@ -145,7 +145,7 @@
*
* This is really horribly ugly.
*/
-asmlinkage long sys_ipc(uint call, int first, int second,
+asmlinkage long sys_ipc(uint call, int first, unsigned long second,
unsigned long third, void __user *ptr)
{
struct ipc_kludge tmp;
@@ -153,24 +153,25 @@
switch (call) {
case SEMOP:
- return sys_semtimedop (first, (struct sembuf __user *) ptr,
second,
- NULL);
+ return sys_semtimedop(first, (struct sembuf __user *)ptr,
+ (unsigned)second, NULL);
case SEMTIMEDOP:
- return sys_semtimedop (first, (struct sembuf __user *) ptr,
second,
+ return sys_semtimedop(first, (struct sembuf __user *)ptr,
+ (unsigned)second,
(const struct timespec __user *) third);
case SEMGET:
- return sys_semget (first, second, third);
+ return sys_semget(first, (int)second, third);
case SEMCTL: {
union semun fourth;
if (!ptr)
return -EINVAL;
if (get_user(fourth.__pad, (void __user * __user *) ptr))
return -EFAULT;
- return sys_semctl (first, second, third, fourth);
+ return sys_semctl(first, (int)second, third, fourth);
}
case MSGSND:
return sys_msgsnd (first, (struct msgbuf __user *) ptr,
- second, third);
+ (size_t)second, third);
break;
case MSGRCV:
if (!ptr)
@@ -179,15 +180,17 @@
sizeof (struct ipc_kludge)))
return -EFAULT;
return sys_msgrcv (first, tmp.msgp,
- second, tmp.msgtyp, third);
+ (size_t)second, tmp.msgtyp, third);
case MSGGET:
- return sys_msgget ((key_t) first, second);
+ return sys_msgget((key_t)first, (int)second);
case MSGCTL:
- return sys_msgctl (first, second, (struct msqid_ds __user *)
ptr);
+ return sys_msgctl(first, (int)second,
+ (struct msqid_ds __user *)ptr);
case SHMAT: {
ulong raddr;
- ret = do_shmat (first, (char __user *) ptr, second, &raddr);
+ ret = do_shmat(first, (char __user *)ptr,
+ (int)second, &raddr);
if (ret)
return ret;
return put_user (raddr, (ulong __user *) third);
@@ -196,9 +199,9 @@
case SHMDT:
return sys_shmdt ((char __user *)ptr);
case SHMGET:
- return sys_shmget (first, second, third);
+ return sys_shmget(first, (size_t)second, third);
case SHMCTL:
- return sys_shmctl (first, second,
+ return sys_shmctl(first, (int)second,
(struct shmid_ds __user *) ptr);
default:
return -ENOSYS;
diff -urN linux/arch/s390/mm/cmm.c linux/arch/s390/mm/cmm.c
--- linux/arch/s390/mm/cmm.c 2005/01/25 04:28:04 1.4
+++ linux/arch/s390/mm/cmm.c 2005/02/13 20:16:19 1.5
@@ -19,7 +19,6 @@
#include <asm/pgalloc.h>
#include <asm/uaccess.h>
-#include <asm/smp.h>
#include "../../../drivers/s390/net/smsgiucv.h"
diff -urN linux/arch/s390/mm/extmem.c linux/arch/s390/mm/extmem.c
--- linux/arch/s390/mm/extmem.c 2005/02/07 02:54:37 1.7
+++ linux/arch/s390/mm/extmem.c 2005/02/13 20:16:19 1.8
@@ -576,8 +576,8 @@
segtype_string[seg->range[i].start & 0xff]);
}
sprintf(cmd2, "SAVESEG %s", name);
- cpcmd(cmd1, NULL, 80);
- cpcmd(cmd2, NULL, 80);
+ cpcmd(cmd1, NULL, 0);
+ cpcmd(cmd2, NULL, 0);
spin_unlock(&dcss_lock);
}
diff -urN linux/arch/s390/mm/mmap.c linux/arch/s390/mm/mmap.c
--- linux/arch/s390/mm/mmap.c 2004/10/25 20:44:19 1.2
+++ linux/arch/s390/mm/mmap.c 2005/02/13 20:16:19 1.3
@@ -26,6 +26,7 @@
#include <linux/personality.h>
#include <linux/mm.h>
+#include <linux/module.h>
/*
* Top of mmap area (just below the process stack).
@@ -81,3 +82,5 @@
mm->unmap_area = arch_unmap_area_topdown;
}
}
+EXPORT_SYMBOL_GPL(arch_pick_mmap_layout);
+
diff -urN linux/arch/sparc/kernel/pcic.c linux/arch/sparc/kernel/pcic.c
--- linux/arch/sparc/kernel/pcic.c 2005/01/13 14:05:38 1.36
+++ linux/arch/sparc/kernel/pcic.c 2005/02/13 20:16:19 1.37
@@ -975,60 +975,66 @@
* We do not use horroble macroses here because we want to
* advance pointer by sizeof(size).
*/
-void outsb(void * __iomem addr, const void *src, unsigned long count) {
+void outsb(unsigned long addr, const void *src, unsigned long count)
+{
while (count) {
count -= 1;
- writeb(*(const char *)src, addr);
+ outb(*(const char *)src, addr);
src += 1;
- addr += 1;
+ /* addr += 1; */
}
}
-void outsw(void * __iomem addr, const void *src, unsigned long count) {
+void outsw(unsigned long addr, const void *src, unsigned long count)
+{
while (count) {
count -= 2;
- writew(*(const short *)src, addr);
+ outw(*(const short *)src, addr);
src += 2;
- addr += 2;
+ /* addr += 2; */
}
}
-void outsl(void * __iomem addr, const void *src, unsigned long count) {
+void outsl(unsigned long addr, const void *src, unsigned long count)
+{
while (count) {
count -= 4;
- writel(*(const long *)src, addr);
+ outl(*(const long *)src, addr);
src += 4;
- addr += 4;
+ /* addr += 4; */
}
}
-void insb(void * __iomem addr, void *dst, unsigned long count) {
+void insb(unsigned long addr, void *dst, unsigned long count)
+{
while (count) {
count -= 1;
- *(unsigned char *)dst = readb(addr);
+ *(unsigned char *)dst = inb(addr);
dst += 1;
- addr += 1;
+ /* addr += 1; */
}
}
-void insw(void * __iomem addr, void *dst, unsigned long count) {
+void insw(unsigned long addr, void *dst, unsigned long count)
+{
while (count) {
count -= 2;
- *(unsigned short *)dst = readw(addr);
+ *(unsigned short *)dst = inw(addr);
dst += 2;
- addr += 2;
+ /* addr += 2; */
}
}
-void insl(void * __iomem addr, void *dst, unsigned long count) {
+void insl(unsigned long addr, void *dst, unsigned long count)
+{
while (count) {
count -= 4;
/*
* XXX I am sure we are in for an unaligned trap here.
*/
- *(unsigned long *)dst = readl(addr);
+ *(unsigned long *)dst = inl(addr);
dst += 4;
- addr += 4;
+ /* addr += 4; */
}
}
diff -urN linux/arch/sparc/kernel/ptrace.c linux/arch/sparc/kernel/ptrace.c
--- linux/arch/sparc/kernel/ptrace.c 2004/10/25 20:44:20 1.29
+++ linux/arch/sparc/kernel/ptrace.c 2005/02/13 20:16:19 1.30
@@ -48,9 +48,9 @@
}
static void
-pt_succ_return_linux(struct pt_regs *regs, unsigned long value, long *addr)
+pt_succ_return_linux(struct pt_regs *regs, unsigned long value, long __user
*addr)
{
- if (put_user(value, (long __user *) addr)) {
+ if (put_user(value, addr)) {
pt_error_return(regs, EFAULT);
return;
}
@@ -61,7 +61,7 @@
}
static void
-pt_os_succ_return (struct pt_regs *regs, unsigned long val, long *addr)
+pt_os_succ_return (struct pt_regs *regs, unsigned long val, long __user *addr)
{
if (current->personality == PER_SUNOS)
pt_succ_return (regs, val);
@@ -71,7 +71,7 @@
/* Fuck me gently with a chainsaw... */
static inline void read_sunos_user(struct pt_regs *regs, unsigned long offset,
- struct task_struct *tsk, long *addr)
+ struct task_struct *tsk, long __user *addr)
{
struct pt_regs *cregs = tsk->thread.kregs;
struct thread_info *t = tsk->thread_info;
@@ -345,14 +345,14 @@
if (access_process_vm(child, addr,
&tmp, sizeof(tmp), 0) == sizeof(tmp))
- pt_os_succ_return(regs, tmp, (long *)data);
+ pt_os_succ_return(regs, tmp, (long __user *)data);
else
pt_error_return(regs, EIO);
goto out_tsk;
}
case PTRACE_PEEKUSR:
- read_sunos_user(regs, addr, child, (long *) data);
+ read_sunos_user(regs, addr, child, (long __user *) data);
goto out_tsk;
case PTRACE_POKEUSR:
diff -urN linux/arch/sparc/kernel/signal.c linux/arch/sparc/kernel/signal.c
--- linux/arch/sparc/kernel/signal.c 2005/02/07 02:54:38 1.53
+++ linux/arch/sparc/kernel/signal.c 2005/02/13 20:16:19 1.54
@@ -535,7 +535,7 @@
sig_address = NULL;
}
}
- err |= __put_user((long)sig_address, &sframep->sig_address);
+ err |= __put_user((unsigned long)sig_address, &sframep->sig_address);
err |= __put_user(sig_code, &sframep->sig_code);
err |= __put_user(sc, &sframep->sig_scptr);
if (err)
@@ -832,7 +832,7 @@
* to flush the user windows.
*/
for (window = 0; window < tp->w_saved; window++) {
- err |= __put_user((int *) &(gw->win[window]),
&gw->winptr[window]);
+ err |= __put_user((int __user *) &(gw->win[window]),
&gw->winptr[window]);
err |= __copy_to_user(&gw->win[window],
&tp->reg_window[window],
sizeof(svr4_rwindow_t));
diff -urN linux/arch/sparc/kernel/sparc_ksyms.c
linux/arch/sparc/kernel/sparc_ksyms.c
--- linux/arch/sparc/kernel/sparc_ksyms.c 2005/02/07 02:54:38 1.55
+++ linux/arch/sparc/kernel/sparc_ksyms.c 2005/02/13 20:16:19 1.56
@@ -202,6 +202,10 @@
#endif
#ifdef CONFIG_PCI
EXPORT_SYMBOL(ebus_chain);
+EXPORT_SYMBOL(insb);
+EXPORT_SYMBOL(outsb);
+EXPORT_SYMBOL(insw);
+EXPORT_SYMBOL(outsw);
EXPORT_SYMBOL(insl);
EXPORT_SYMBOL(outsl);
EXPORT_SYMBOL(pci_alloc_consistent);
diff -urN linux/arch/sparc/kernel/sys_sparc.c
linux/arch/sparc/kernel/sys_sparc.c
--- linux/arch/sparc/kernel/sys_sparc.c 2004/07/20 20:21:17 1.33
+++ linux/arch/sparc/kernel/sys_sparc.c 2005/02/13 20:16:19 1.34
@@ -197,8 +197,7 @@
goto out;
}
case 1: /* iBCS2 emulator entry point */
- err = do_shmat (first, (char __user *) ptr,
- second, (ulong *) third);
+ err = -EINVAL;
goto out;
}
case SHMDT:
diff -urN linux/arch/sparc/lib/atomic32.c linux/arch/sparc/lib/atomic32.c
--- linux/arch/sparc/lib/atomic32.c 2004/03/11 16:46:45 1.1
+++ linux/arch/sparc/lib/atomic32.c 2005/02/13 20:16:19 1.2
@@ -20,8 +20,9 @@
#else /* SMP */
+static spinlock_t dummy = SPIN_LOCK_UNLOCKED;
#define ATOMIC_HASH_SIZE 1
-#define ATOMIC_HASH(a) 0
+#define ATOMIC_HASH(a) (&dummy)
#endif /* SMP */
diff -urN linux/arch/sparc/mm/srmmu.c linux/arch/sparc/mm/srmmu.c
--- linux/arch/sparc/mm/srmmu.c 2005/02/07 02:54:38 1.74
+++ linux/arch/sparc/mm/srmmu.c 2005/02/13 20:16:19 1.75
@@ -133,11 +133,12 @@
static unsigned long srmmu_pte_pfn(pte_t pte)
{
if (srmmu_device_memory(pte_val(pte))) {
- /* XXX Anton obviously had something in mind when he did this.
- * But what?
+ /* Just return something that will cause
+ * pfn_valid() to return false. This makes
+ * copy_one_pte() to just directly copy to
+ * PTE over.
*/
- /* return (struct page *)~0; */
- BUG();
+ return ~0UL;
}
return (pte_val(pte) & SRMMU_PTE_PMASK) >> (PAGE_SHIFT-4);
}
diff -urN linux/arch/sparc64/defconfig linux/arch/sparc64/defconfig
--- linux/arch/sparc64/defconfig 2005/02/07 02:54:38 1.131
+++ linux/arch/sparc64/defconfig 2005/02/13 20:16:19 1.132
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc1
-# Fri Jan 21 20:03:21 2005
+# Linux kernel version: 2.6.11-rc3
+# Mon Feb 7 15:29:00 2005
#
CONFIG_64BIT=y
CONFIG_MMU=y
@@ -845,6 +845,7 @@
CONFIG_BT_HCIUART_BCSP=y
CONFIG_BT_HCIUART_BCSP_TXCRC=y
CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBPA10X=m
CONFIG_BT_HCIBFUSB=m
CONFIG_BT_HCIVHCI=m
CONFIG_NETDEVICES=y
@@ -1245,7 +1246,12 @@
# CONFIG_JFS_DEBUG is not set
# CONFIG_JFS_STATISTICS is not set
CONFIG_FS_POSIX_ACL=y
+
+#
+# XFS support
+#
CONFIG_XFS_FS=m
+CONFIG_XFS_EXPORT=y
# CONFIG_XFS_RT is not set
CONFIG_XFS_QUOTA=y
CONFIG_XFS_SECURITY=y
@@ -1520,6 +1526,11 @@
CONFIG_DVB_VES1820=m
CONFIG_DVB_TDA10021=m
CONFIG_DVB_STV0297=m
+
+#
+# ATSC (North American/Korean Terresterial DTV) frontends
+#
+CONFIG_DVB_NXT2002=m
CONFIG_VIDEO_SAA7146=m
CONFIG_VIDEO_SAA7146_VV=m
CONFIG_VIDEO_VIDEOBUF=m
@@ -1527,6 +1538,7 @@
CONFIG_VIDEO_BUF=m
CONFIG_VIDEO_BTCX=m
CONFIG_VIDEO_IR=m
+CONFIG_VIDEO_TVEEPROM=m
#
# Sound
diff -urN linux/arch/sparc64/kernel/binfmt_aout32.c
linux/arch/sparc64/kernel/binfmt_aout32.c
--- linux/arch/sparc64/kernel/binfmt_aout32.c 2005/01/25 04:28:06 1.30
+++ linux/arch/sparc64/kernel/binfmt_aout32.c 2005/02/13 20:16:19 1.31
@@ -333,9 +333,8 @@
current->mm->start_stack =
(unsigned long) create_aout32_tables((char __user *)bprm->p,
bprm);
if (!(orig_thr_flags & _TIF_32BIT)) {
- unsigned long pgd_cache;
+ unsigned long pgd_cache = get_pgd_cache(current->mm->pgd);
- pgd_cache = ((unsigned long)current->mm->pgd[0])<<11UL;
__asm__ __volatile__("stxa\t%0, [%1] %2\n\t"
"membar #Sync"
: /* no outputs */
diff -urN linux/arch/sparc64/kernel/process.c
linux/arch/sparc64/kernel/process.c
--- linux/arch/sparc64/kernel/process.c 2005/02/07 02:54:38 1.73
+++ linux/arch/sparc64/kernel/process.c 2005/02/13 20:16:19 1.74
@@ -440,7 +440,7 @@
pmd_t *page = pmd_alloc_one(mm, 0);
pud_set(pud0, page);
}
- pgd_cache = ((unsigned long) pud_val(*pud0)) << 11UL;
+ pgd_cache = get_pgd_cache(pgd0);
}
__asm__ __volatile__("stxa %0, [%1] %2\n\t"
"membar #Sync"
diff -urN linux/arch/sparc64/kernel/ptrace.c linux/arch/sparc64/kernel/ptrace.c
--- linux/arch/sparc64/kernel/ptrace.c 2004/10/25 20:44:21 1.33
+++ linux/arch/sparc64/kernel/ptrace.c 2005/02/13 20:16:19 1.34
@@ -50,7 +50,7 @@
}
static inline void
-pt_succ_return_linux(struct pt_regs *regs, unsigned long value, long *addr)
+pt_succ_return_linux(struct pt_regs *regs, unsigned long value, void __user
*addr)
{
if (test_thread_flag(TIF_32BIT)) {
if (put_user(value, (unsigned int __user *) addr)) {
@@ -70,7 +70,7 @@
}
static void
-pt_os_succ_return (struct pt_regs *regs, unsigned long val, long *addr)
+pt_os_succ_return (struct pt_regs *regs, unsigned long val, void __user *addr)
{
if (current->personality == PER_SUNOS)
pt_succ_return (regs, val);
@@ -226,7 +226,7 @@
if (res < 0)
pt_error_return(regs, -res);
else
- pt_os_succ_return(regs, tmp64, (long *) data);
+ pt_os_succ_return(regs, tmp64, (void __user *) data);
goto flush_and_out;
}
diff -urN linux/arch/sparc64/kernel/smp.c linux/arch/sparc64/kernel/smp.c
--- linux/arch/sparc64/kernel/smp.c 2005/01/25 04:28:06 1.74
+++ linux/arch/sparc64/kernel/smp.c 2005/02/13 20:16:19 1.75
@@ -894,9 +894,8 @@
void smp_capture(void)
{
- int result = __atomic_add(1, &smp_capture_depth);
+ int result = atomic_add_ret(1, &smp_capture_depth);
- membar("#StoreStore | #LoadStore");
if (result == 1) {
int ncpus = num_online_cpus();
diff -urN linux/arch/sparc64/kernel/sparc64_ksyms.c
linux/arch/sparc64/kernel/sparc64_ksyms.c
--- linux/arch/sparc64/kernel/sparc64_ksyms.c 2005/02/07 02:54:38 1.84
+++ linux/arch/sparc64/kernel/sparc64_ksyms.c 2005/02/13 20:16:19 1.85
@@ -172,18 +172,25 @@
EXPORT_SYMBOL(up);
/* Atomic counter implementation. */
-EXPORT_SYMBOL(__atomic_add);
-EXPORT_SYMBOL(__atomic_sub);
-EXPORT_SYMBOL(__atomic64_add);
-EXPORT_SYMBOL(__atomic64_sub);
+EXPORT_SYMBOL(atomic_add);
+EXPORT_SYMBOL(atomic_add_ret);
+EXPORT_SYMBOL(atomic_sub);
+EXPORT_SYMBOL(atomic_sub_ret);
+EXPORT_SYMBOL(atomic64_add);
+EXPORT_SYMBOL(atomic64_add_ret);
+EXPORT_SYMBOL(atomic64_sub);
+EXPORT_SYMBOL(atomic64_sub_ret);
#ifdef CONFIG_SMP
EXPORT_SYMBOL(_atomic_dec_and_lock);
#endif
/* Atomic bit operations. */
-EXPORT_SYMBOL(___test_and_set_bit);
-EXPORT_SYMBOL(___test_and_clear_bit);
-EXPORT_SYMBOL(___test_and_change_bit);
+EXPORT_SYMBOL(test_and_set_bit);
+EXPORT_SYMBOL(test_and_clear_bit);
+EXPORT_SYMBOL(test_and_change_bit);
+EXPORT_SYMBOL(set_bit);
+EXPORT_SYMBOL(clear_bit);
+EXPORT_SYMBOL(change_bit);
/* Bit searching */
EXPORT_SYMBOL(find_next_bit);
diff -urN linux/arch/sparc64/kernel/sys_sparc.c
linux/arch/sparc64/kernel/sys_sparc.c
--- linux/arch/sparc64/kernel/sys_sparc.c 2004/07/20 20:21:17 1.48
+++ linux/arch/sparc64/kernel/sys_sparc.c 2005/02/13 20:16:19 1.49
@@ -199,7 +199,8 @@
* This is really horribly ugly.
*/
-asmlinkage long sys_ipc(unsigned int call, int first, int second, unsigned
long third, void __user *ptr, long fifth)
+asmlinkage long sys_ipc(unsigned int call, int first, unsigned long second,
+ unsigned long third, void __user *ptr, long fifth)
{
int err;
@@ -207,14 +208,15 @@
if (call <= SEMCTL) {
switch (call) {
case SEMOP:
- err = sys_semtimedop(first, ptr, second, NULL);
+ err = sys_semtimedop(first, ptr,
+ (unsigned)second, NULL);
goto out;
case SEMTIMEDOP:
- err = sys_semtimedop(first, ptr, second,
+ err = sys_semtimedop(first, ptr, (unsigned)second,
(const struct timespec __user *) fifth);
goto out;
case SEMGET:
- err = sys_semget(first, second, (int)third);
+ err = sys_semget(first, (int)second, (int)third);
goto out;
case SEMCTL: {
union semun fourth;
@@ -225,7 +227,7 @@
if (get_user(fourth.__pad,
(void __user * __user *) ptr))
goto out;
- err = sys_semctl(first, second | IPC_64,
+ err = sys_semctl(first, (int)second | IPC_64,
(int)third, fourth);
goto out;
}
@@ -237,17 +239,18 @@
if (call <= MSGCTL) {
switch (call) {
case MSGSND:
- err = sys_msgsnd(first, ptr, second, (int)third);
+ err = sys_msgsnd(first, ptr, (size_t)second,
+ (int)third);
goto out;
case MSGRCV:
- err = sys_msgrcv(first, ptr, second, fifth,
+ err = sys_msgrcv(first, ptr, (size_t)second, fifth,
(int)third);
goto out;
case MSGGET:
- err = sys_msgget((key_t) first, second);
+ err = sys_msgget((key_t)first, (int)second);
goto out;
case MSGCTL:
- err = sys_msgctl(first, second | IPC_64, ptr);
+ err = sys_msgctl(first, (int)second | IPC_64, ptr);
goto out;
default:
err = -ENOSYS;
@@ -258,7 +261,7 @@
switch (call) {
case SHMAT: {
ulong raddr;
- err = do_shmat(first, ptr, second, &raddr);
+ err = do_shmat(first, ptr, (int)second, &raddr);
if (!err) {
if (put_user(raddr,
(ulong __user *) third))
@@ -270,10 +273,10 @@
err = sys_shmdt(ptr);
goto out;
case SHMGET:
- err = sys_shmget(first, second, (int)third);
+ err = sys_shmget(first, (size_t)second, (int)third);
goto out;
case SHMCTL:
- err = sys_shmctl(first, second | IPC_64, ptr);
+ err = sys_shmctl(first, (int)second | IPC_64, ptr);
goto out;
default:
err = -ENOSYS;
diff -urN linux/arch/sparc64/kernel/sys_sparc32.c
linux/arch/sparc64/kernel/sys_sparc32.c
--- linux/arch/sparc64/kernel/sys_sparc32.c 2005/02/07 02:54:38 1.120
+++ linux/arch/sparc64/kernel/sys_sparc32.c 2005/02/13 20:16:19 1.121
@@ -835,7 +835,7 @@
err = sys_shmdt(ptr);
goto out;
case SHMGET:
- err = sys_shmget(first, second, third);
+ err = sys_shmget(first, (unsigned)second, third);
goto out;
case SHMCTL:
err = do_sys32_shmctl(first, second, ptr);
diff -urN linux/arch/sparc64/lib/atomic.S linux/arch/sparc64/lib/atomic.S
--- linux/arch/sparc64/lib/atomic.S 2005/02/07 02:54:39 1.8
+++ linux/arch/sparc64/lib/atomic.S 2005/02/13 20:16:20 1.9
@@ -4,73 +4,136 @@
* Copyright (C) 1999 David S. Miller (davem@redhat.com)
*/
+#include <linux/config.h>
#include <asm/asi.h>
+ /* On SMP we need to use memory barriers to ensure
+ * correct memory operation ordering, nop these out
+ * for uniprocessor.
+ */
+#ifdef CONFIG_SMP
+#define ATOMIC_PRE_BARRIER membar #StoreLoad | #LoadLoad
+#define ATOMIC_POST_BARRIER membar #StoreLoad | #StoreStore
+#else
+#define ATOMIC_PRE_BARRIER nop
+#define ATOMIC_POST_BARRIER nop
+#endif
+
.text
- /* We use these stubs for the uncommon case
- * of contention on the atomic value. This is
- * so that we can keep the main fast path 8
- * instructions long and thus fit into a single
- * L2 cache line.
+ /* Two versions of the atomic routines, one that
+ * does not return a value and does not perform
+ * memory barriers, and a second which returns
+ * a value and does the barriers.
*/
-__atomic_add_membar:
- ba,pt %xcc, __atomic_add
- membar #StoreLoad | #StoreStore
-
-__atomic_sub_membar:
- ba,pt %xcc, __atomic_sub
- membar #StoreLoad | #StoreStore
-
- .align 64
- .globl __atomic_add
- .type __atomic_add,#function
-__atomic_add: /* %o0 = increment, %o1 = atomic_ptr */
- lduw [%o1], %g5
+ .globl atomic_add
+ .type atomic_add,#function
+atomic_add: /* %o0 = increment, %o1 = atomic_ptr */
+1: lduw [%o1], %g5
+ add %g5, %o0, %g7
+ cas [%o1], %g5, %g7
+ cmp %g5, %g7
+ bne,pn %icc, 1b
+ nop
+ retl
+ nop
+ .size atomic_add, .-atomic_add
+
+ .globl atomic_sub
+ .type atomic_sub,#function
+atomic_sub: /* %o0 = decrement, %o1 = atomic_ptr */
+1: lduw [%o1], %g5
+ sub %g5, %o0, %g7
+ cas [%o1], %g5, %g7
+ cmp %g5, %g7
+ bne,pn %icc, 1b
+ nop
+ retl
+ nop
+ .size atomic_sub, .-atomic_sub
+
+ .globl atomic_add_ret
+ .type atomic_add_ret,#function
+atomic_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
+ ATOMIC_PRE_BARRIER
+1: lduw [%o1], %g5
add %g5, %o0, %g7
cas [%o1], %g5, %g7
cmp %g5, %g7
- bne,pn %icc, __atomic_add_membar
+ bne,pn %icc, 1b
add %g7, %o0, %g7
+ ATOMIC_POST_BARRIER
retl
sra %g7, 0, %o0
- .size __atomic_add, .-__atomic_add
+ .size atomic_add_ret, .-atomic_add_ret
- .globl __atomic_sub
- .type __atomic_sub,#function
-__atomic_sub: /* %o0 = increment, %o1 = atomic_ptr */
- lduw [%o1], %g5
+ .globl atomic_sub_ret
+ .type atomic_sub_ret,#function
+atomic_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */
+ ATOMIC_PRE_BARRIER
+1: lduw [%o1], %g5
sub %g5, %o0, %g7
cas [%o1], %g5, %g7
cmp %g5, %g7
- bne,pn %icc, __atomic_sub_membar
+ bne,pn %icc, 1b
sub %g7, %o0, %g7
+ ATOMIC_POST_BARRIER
retl
sra %g7, 0, %o0
- .size __atomic_sub, .-__atomic_sub
+ .size atomic_sub_ret, .-atomic_sub_ret
- .globl __atomic64_add
- .type __atomic64_add,#function
-__atomic64_add: /* %o0 = increment, %o1 = atomic_ptr */
- ldx [%o1], %g5
+ .globl atomic64_add
+ .type atomic64_add,#function
+atomic64_add: /* %o0 = increment, %o1 = atomic_ptr */
+1: ldx [%o1], %g5
add %g5, %o0, %g7
casx [%o1], %g5, %g7
cmp %g5, %g7
- bne,pn %xcc, __atomic64_add
- membar #StoreLoad | #StoreStore
+ bne,pn %xcc, 1b
+ nop
retl
- add %g7, %o0, %o0
- .size __atomic64_add, .-__atomic64_add
+ nop
+ .size atomic64_add, .-atomic64_add
- .globl __atomic64_sub
- .type __atomic64_sub,#function
-__atomic64_sub: /* %o0 = increment, %o1 = atomic_ptr */
- ldx [%o1], %g5
+ .globl atomic64_sub
+ .type atomic64_sub,#function
+atomic64_sub: /* %o0 = decrement, %o1 = atomic_ptr */
+1: ldx [%o1], %g5
sub %g5, %o0, %g7
casx [%o1], %g5, %g7
cmp %g5, %g7
- bne,pn %xcc, __atomic64_sub
- membar #StoreLoad | #StoreStore
+ bne,pn %xcc, 1b
+ nop
+ retl
+ nop
+ .size atomic64_sub, .-atomic64_sub
+
+ .globl atomic64_add_ret
+ .type atomic64_add_ret,#function
+atomic64_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
+ ATOMIC_PRE_BARRIER
+1: ldx [%o1], %g5
+ add %g5, %o0, %g7
+ casx [%o1], %g5, %g7
+ cmp %g5, %g7
+ bne,pn %xcc, 1b
+ add %g7, %o0, %g7
+ ATOMIC_POST_BARRIER
+ retl
+ mov %g7, %o0
+ .size atomic64_add_ret, .-atomic64_add_ret
+
+ .globl atomic64_sub_ret
+ .type atomic64_sub_ret,#function
+atomic64_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */
+ ATOMIC_PRE_BARRIER
+1: ldx [%o1], %g5
+ sub %g5, %o0, %g7
+ casx [%o1], %g5, %g7
+ cmp %g5, %g7
+ bne,pn %xcc, 1b
+ sub %g7, %o0, %g7
+ ATOMIC_POST_BARRIER
retl
- sub %g7, %o0, %o0
- .size __atomic64_sub, .-__atomic64_sub
+ mov %g7, %o0
+ .size atomic64_sub_ret, .-atomic64_sub_ret
diff -urN linux/arch/sparc64/lib/bitops.S linux/arch/sparc64/lib/bitops.S
--- linux/arch/sparc64/lib/bitops.S 2004/09/19 12:30:07 1.6
+++ linux/arch/sparc64/lib/bitops.S 2005/02/13 20:16:20 1.7
@@ -4,69 +4,142 @@
* Copyright (C) 2000 David S. Miller (davem@redhat.com)
*/
+#include <linux/config.h>
#include <asm/asi.h>
+ /* On SMP we need to use memory barriers to ensure
+ * correct memory operation ordering, nop these out
+ * for uniprocessor.
+ */
+#ifdef CONFIG_SMP
+#define BITOP_PRE_BARRIER membar #StoreLoad | #LoadLoad
+#define BITOP_POST_BARRIER membar #StoreLoad | #StoreStore
+#else
+#define BITOP_PRE_BARRIER nop
+#define BITOP_POST_BARRIER nop
+#endif
+
.text
- .align 64
- .globl ___test_and_set_bit
- .type ___test_and_set_bit,#function
-___test_and_set_bit: /* %o0=nr, %o1=addr */
+
+ .globl test_and_set_bit
+ .type test_and_set_bit,#function
+test_and_set_bit: /* %o0=nr, %o1=addr */
+ BITOP_PRE_BARRIER
+ srlx %o0, 6, %g1
+ mov 1, %g5
+ sllx %g1, 3, %g3
+ and %o0, 63, %g2
+ sllx %g5, %g2, %g5
+ add %o1, %g3, %o1
+1: ldx [%o1], %g7
+ or %g7, %g5, %g1
+ casx [%o1], %g7, %g1
+ cmp %g7, %g1
+ bne,pn %xcc, 1b
+ and %g7, %g5, %g2
+ BITOP_POST_BARRIER
+ clr %o0
+ retl
+ movrne %g2, 1, %o0
+ .size test_and_set_bit, .-test_and_set_bit
+
+ .globl test_and_clear_bit
+ .type test_and_clear_bit,#function
+test_and_clear_bit: /* %o0=nr, %o1=addr */
+ BITOP_PRE_BARRIER
+ srlx %o0, 6, %g1
+ mov 1, %g5
+ sllx %g1, 3, %g3
+ and %o0, 63, %g2
+ sllx %g5, %g2, %g5
+ add %o1, %g3, %o1
+1: ldx [%o1], %g7
+ andn %g7, %g5, %g1
+ casx [%o1], %g7, %g1
+ cmp %g7, %g1
+ bne,pn %xcc, 1b
+ and %g7, %g5, %g2
+ BITOP_POST_BARRIER
+ clr %o0
+ retl
+ movrne %g2, 1, %o0
+ .size test_and_clear_bit, .-test_and_clear_bit
+
+ .globl test_and_change_bit
+ .type test_and_change_bit,#function
+test_and_change_bit: /* %o0=nr, %o1=addr */
+ BITOP_PRE_BARRIER
+ srlx %o0, 6, %g1
+ mov 1, %g5
+ sllx %g1, 3, %g3
+ and %o0, 63, %g2
+ sllx %g5, %g2, %g5
+ add %o1, %g3, %o1
+1: ldx [%o1], %g7
+ xor %g7, %g5, %g1
+ casx [%o1], %g7, %g1
+ cmp %g7, %g1
+ bne,pn %xcc, 1b
+ and %g7, %g5, %g2
+ BITOP_POST_BARRIER
+ clr %o0
+ retl
+ movrne %g2, 1, %o0
+ .size test_and_change_bit, .-test_and_change_bit
+
+ .globl set_bit
+ .type set_bit,#function
+set_bit: /* %o0=nr, %o1=addr */
srlx %o0, 6, %g1
mov 1, %g5
sllx %g1, 3, %g3
and %o0, 63, %g2
sllx %g5, %g2, %g5
add %o1, %g3, %o1
- ldx [%o1], %g7
-1: andcc %g7, %g5, %o0
- bne,pn %xcc, 2f
- xor %g7, %g5, %g1
+1: ldx [%o1], %g7
+ or %g7, %g5, %g1
casx [%o1], %g7, %g1
cmp %g7, %g1
- bne,a,pn %xcc, 1b
- ldx [%o1], %g7
-2: retl
- membar #StoreLoad | #StoreStore
- .size ___test_and_set_bit, .-___test_and_set_bit
+ bne,pn %xcc, 1b
+ nop
+ retl
+ nop
+ .size set_bit, .-set_bit
- .globl ___test_and_clear_bit
- .type ___test_and_clear_bit,#function
-___test_and_clear_bit: /* %o0=nr, %o1=addr */
+ .globl clear_bit
+ .type clear_bit,#function
+clear_bit: /* %o0=nr, %o1=addr */
srlx %o0, 6, %g1
mov 1, %g5
sllx %g1, 3, %g3
and %o0, 63, %g2
sllx %g5, %g2, %g5
add %o1, %g3, %o1
- ldx [%o1], %g7
-1: andcc %g7, %g5, %o0
- be,pn %xcc, 2f
- xor %g7, %g5, %g1
+1: ldx [%o1], %g7
+ andn %g7, %g5, %g1
casx [%o1], %g7, %g1
cmp %g7, %g1
- bne,a,pn %xcc, 1b
- ldx [%o1], %g7
-2: retl
- membar #StoreLoad | #StoreStore
- .size ___test_and_clear_bit, .-___test_and_clear_bit
+ bne,pn %xcc, 1b
+ nop
+ retl
+ nop
+ .size clear_bit, .-clear_bit
- .globl ___test_and_change_bit
- .type ___test_and_change_bit,#function
-___test_and_change_bit: /* %o0=nr, %o1=addr */
+ .globl change_bit
+ .type change_bit,#function
+change_bit: /* %o0=nr, %o1=addr */
srlx %o0, 6, %g1
mov 1, %g5
sllx %g1, 3, %g3
and %o0, 63, %g2
sllx %g5, %g2, %g5
add %o1, %g3, %o1
- ldx [%o1], %g7
-1: and %g7, %g5, %o0
+1: ldx [%o1], %g7
xor %g7, %g5, %g1
casx [%o1], %g7, %g1
cmp %g7, %g1
- bne,a,pn %xcc, 1b
- ldx [%o1], %g7
-2: retl
- membar #StoreLoad | #StoreStore
- nop
- .size ___test_and_change_bit, .-___test_and_change_bit
+ bne,pn %xcc, 1b
+ nop
+ retl
+ nop
+ .size change_bit, .-change_bit
diff -urN linux/arch/sparc64/lib/debuglocks.c
linux/arch/sparc64/lib/debuglocks.c
--- linux/arch/sparc64/lib/debuglocks.c 2004/09/19 12:30:07 1.13
+++ linux/arch/sparc64/lib/debuglocks.c 2005/02/13 20:16:20 1.14
@@ -172,6 +172,7 @@
runlock_again:
/* Spin trying to decrement the counter using casx. */
__asm__ __volatile__(
+" membar #StoreLoad | #LoadLoad\n"
" ldx [%0], %%g5\n"
" sub %%g5, 1, %%g7\n"
" casx [%0], %%g5, %%g7\n"
@@ -290,6 +291,7 @@
current->thread.smp_lock_count--;
wlock_again:
__asm__ __volatile__(
+" membar #StoreLoad | #LoadLoad\n"
" mov 1, %%g3\n"
" sllx %%g3, 63, %%g3\n"
" ldx [%0], %%g5\n"
diff -urN linux/arch/sparc64/lib/user_fixup.c
linux/arch/sparc64/lib/user_fixup.c
--- linux/arch/sparc64/lib/user_fixup.c 2004/08/24 15:10:07 1.1
+++ linux/arch/sparc64/lib/user_fixup.c 2005/02/13 20:16:20 1.2
@@ -20,11 +20,12 @@
char *dst = to;
const char __user *src = from;
- while (size--) {
+ while (size) {
if (__get_user(*dst, src))
break;
dst++;
src++;
+ size--;
}
if (size)
@@ -38,11 +39,12 @@
char __user *dst = to;
const char *src = from;
- while (size--) {
+ while (size) {
if (__put_user(*src, dst))
break;
dst++;
src++;
+ size--;
}
return size;
@@ -53,7 +55,7 @@
char __user *dst = to;
char __user *src = from;
- while (size--) {
+ while (size) {
char tmp;
if (__get_user(tmp, src))
@@ -62,6 +64,7 @@
break;
dst++;
src++;
+ size--;
}
return size;
diff -urN linux/arch/sparc64/prom/memory.c linux/arch/sparc64/prom/memory.c
--- linux/arch/sparc64/prom/memory.c 2004/06/06 02:12:41 1.6
+++ linux/arch/sparc64/prom/memory.c 2005/02/13 20:16:20 1.7
@@ -45,9 +45,9 @@
unsigned long tmpaddr, tmpsize;
unsigned long lowest;
- for(i=0; thislist[i].theres_more != 0; i++) {
+ for(i=0; thislist[i].theres_more; i++) {
lowest = thislist[i].start_adr;
- for(mitr = i+1; thislist[mitr-1].theres_more != 0; mitr++)
+ for(mitr = i+1; thislist[mitr-1].theres_more; mitr++)
if(thislist[mitr].start_adr < lowest) {
lowest = thislist[mitr].start_adr;
swapi = mitr;
@@ -83,7 +83,7 @@
prom_phys_avail[iter].theres_more =
&prom_phys_avail[iter+1];
}
- prom_phys_avail[iter-1].theres_more = 0x0;
+ prom_phys_avail[iter-1].theres_more = NULL;
num_regs = prom_getproperty(node, "reg",
(char *) prom_reg_memlist,
@@ -97,7 +97,7 @@
prom_phys_total[iter].theres_more =
&prom_phys_total[iter+1];
}
- prom_phys_total[iter-1].theres_more = 0x0;
+ prom_phys_total[iter-1].theres_more = NULL;
node = prom_finddevice("/virtual-memory");
num_regs = prom_getproperty(node, "available",
@@ -116,7 +116,7 @@
prom_prom_taken[iter].theres_more =
&prom_prom_taken[iter+1];
}
- prom_prom_taken[iter-1].theres_more = 0x0;
+ prom_prom_taken[iter-1].theres_more = NULL;
prom_sortmemlist(prom_prom_taken);
diff -urN linux/arch/um/Kconfig linux/arch/um/Kconfig
--- linux/arch/um/Kconfig 2005/01/25 04:28:07 1.16
+++ linux/arch/um/Kconfig 2005/02/13 20:16:20 1.17
@@ -313,11 +313,9 @@
source "drivers/mtd/Kconfig"
endif
+#This is just to shut up some Kconfig warnings, so no prompt.
config INPUT
- bool "Dummy option"
- depends BROKEN
+ bool
default n
- help
- This is a dummy option to get rid of warnings.
source "arch/um/Kconfig.debug"
diff -urN linux/arch/um/Kconfig_i386 linux/arch/um/Kconfig_i386
--- linux/arch/um/Kconfig_i386 2005/01/13 14:05:39 1.1
+++ linux/arch/um/Kconfig_i386 2005/02/13 20:16:20 1.2
@@ -18,3 +18,7 @@
config ARCH_HAS_SC_SIGNALS
bool
default y
+
+config ARCH_REUSE_HOST_VSYSCALL_AREA
+ bool
+ default y
diff -urN linux/arch/um/Kconfig_x86_64 linux/arch/um/Kconfig_x86_64
--- linux/arch/um/Kconfig_x86_64 2005/01/13 14:05:39 1.1
+++ linux/arch/um/Kconfig_x86_64 2005/02/13 20:16:20 1.2
@@ -9,3 +9,7 @@
config ARCH_HAS_SC_SIGNALS
bool
default n
+
+config ARCH_REUSE_HOST_VSYSCALL_AREA
+ bool
+ default n
diff -urN linux/arch/um/Makefile linux/arch/um/Makefile
--- linux/arch/um/Makefile 2005/01/25 04:28:07 1.19
+++ linux/arch/um/Makefile 2005/02/13 20:16:20 1.20
@@ -20,8 +20,11 @@
arch-signal.h module.h vm-flags.h
SYMLINK_HEADERS := $(foreach
header,$(SYMLINK_HEADERS),include/asm-um/$(header))
-# The "os" symlink is only used by arch/um/include/os.h, which includes
+# XXX: The "os" symlink is only used by arch/um/include/os.h, which includes
# ../os/include/file.h
+#
+# These are cleaned up during mrproper. Please DO NOT fix it again, this is
+# the Correct Thing(tm) to do!
ARCH_SYMLINKS = include/asm-um/arch $(ARCH_DIR)/include/sysdep $(ARCH_DIR)/os \
$(SYMLINK_HEADERS) $(ARCH_DIR)/include/uml-config.h
@@ -36,8 +39,8 @@
MAKEFILES-INCL += $(foreach mode,$(um-modes-y),\
$(srctree)/$(ARCH_DIR)/Makefile-$(mode))
-ifneq ($(MAKEFILE-INCL),)
- include $(MAKEFILE-INCL)
+ifneq ($(MAKEFILES-INCL),)
+ include $(MAKEFILES-INCL)
endif
ARCH_INCLUDE := -I$(ARCH_DIR)/include
@@ -58,7 +61,7 @@
USER_CFLAGS := $(patsubst -I%,,$(CFLAGS))
USER_CFLAGS := $(patsubst -D__KERNEL__,,$(USER_CFLAGS)) $(ARCH_INCLUDE) \
- $(MODE_INCLUDE)
+ $(MODE_INCLUDE) $(ARCH_USER_CFLAGS)
CFLAGS += -Derrno=kernel_errno -Dsigprocmask=kernel_sigprocmask
CFLAGS += $(call cc-option,-fno-unit-at-a-time,)
@@ -134,7 +137,8 @@
$(GEN_HEADERS) $(ARCH_DIR)/include/skas_ptregs.h
MRPROPER_FILES += $(SYMLINK_HEADERS) $(ARCH_SYMLINKS) \
- $(addprefix $(ARCH_DIR)/kernel/,$(KERN_SYMLINKS)) $(ARCH_DIR)/os
+ $(addprefix $(ARCH_DIR)/kernel/,$(KERN_SYMLINKS)) $(ARCH_DIR)/os \
+ $(ARCH_DIR)/Kconfig_arch
archclean:
$(Q)$(MAKE) $(clean)=$(ARCH_DIR)/util
diff -urN linux/arch/um/Kconfig_arch linux/arch/um/Kconfig_arch
--- linux/arch/um/Attic/Kconfig_arch Sun Feb 13 20:16:20 2005 1.1
+++ linux/arch/um/Attic/Kconfig_arch 1970/01/01 00:00:002002
@@ -1,16 +0,0 @@
-config 64_BIT
- bool
- default n
-
-config TOP_ADDR
- hex
- default 0xc0000000 if !HOST_2G_2G
- default 0x80000000 if HOST_2G_2G
-
-config 3_LEVEL_PGTABLES
- bool "Three-level pagetables"
- default n
- help
- Three-level pagetables will let UML have more than 4G of physical
- memory. All the memory that can't be mapped directly will be treated
- as high memory.
diff -urN linux/arch/um/include/ptrace_user.h
linux/arch/um/include/ptrace_user.h
--- linux/arch/um/include/ptrace_user.h 2005/01/13 14:05:39 1.3
+++ linux/arch/um/include/ptrace_user.h 2005/02/13 20:16:20 1.4
@@ -26,6 +26,26 @@
#define PTRACE_SYSEMU_SINGLESTEP 32
#endif
+/* On architectures, that started to support PTRACE_O_TRACESYSGOOD
+ * in linux 2.4, there are two different definitions of
+ * PTRACE_SETOPTIONS: linux 2.4 uses 21 while linux 2.6 uses 0x4200.
+ * For binary compatibility, 2.6 also supports the old "21", named
+ * PTRACE_OLDSETOPTION. On these architectures, UML always must use
+ * "21", to ensure the kernel runs on 2.4 and 2.6 host without
+ * recompilation. So, we use PTRACE_OLDSETOPTIONS in UML.
+ * We also want to be able to build the kernel on 2.4, which doesn't
+ * have PTRACE_OLDSETOPTIONS. So, if it is missing, we declare
+ * PTRACE_OLDSETOPTIONS to to be the same as PTRACE_SETOPTIONS.
+ *
+ * On architectures, that start to support PTRACE_O_TRACESYSGOOD on
+ * linux 2.6, PTRACE_OLDSETOPTIONS never is defined, and also isn't
+ * supported by the host kernel. In that case, our trick lets us use
+ * the new 0x4200 with the name PTRACE_OLDSETOPTIONS.
+ */
+#ifndef PTRACE_OLDSETOPTIONS
+#define PTRACE_OLDSETOPTIONS PTRACE_SETOPTIONS
+#endif
+
void set_using_sysemu(int value);
int get_using_sysemu(void);
extern int sysemu_supported;
diff -urN linux/arch/um/include/sysdep-x86_64/ptrace_user.h
linux/arch/um/include/sysdep-x86_64/ptrace_user.h
--- linux/arch/um/include/sysdep-x86_64/ptrace_user.h 2005/01/13 14:05:40
1.1
+++ linux/arch/um/include/sysdep-x86_64/ptrace_user.h 2005/02/13 20:16:20
1.2
@@ -49,10 +49,11 @@
#define MAX_REG_NR ((MAX_REG_OFFSET) / sizeof(unsigned long))
/* x86_64 FC3 doesn't define this in /usr/include/linux/ptrace.h even though
- * it's defined in the kernel's include/linux/ptrace.h
+ * it's defined in the kernel's include/linux/ptrace.h. Additionally, use the
+ * 2.4 name and value for 2.4 host compatibility.
*/
-#ifndef PTRACE_SETOPTIONS
-#define PTRACE_SETOPTIONS 0x4200
+#ifndef PTRACE_OLDSETOPTIONS
+#define PTRACE_OLDSETOPTIONS 21
#endif
#endif
diff -urN linux/arch/um/kernel/mem.c linux/arch/um/kernel/mem.c
--- linux/arch/um/kernel/mem.c 2005/01/13 14:05:40 1.15
+++ linux/arch/um/kernel/mem.c 2005/02/13 20:16:20 1.16
@@ -79,7 +79,7 @@
uml_reserved = brk_end;
/* Fill in any hole at the start of the binary */
- start = (unsigned long) &__binary_start;
+ start = (unsigned long) &__binary_start & PAGE_MASK;
if(uml_physmem != start){
map_memory(uml_physmem, __pa(uml_physmem), start - uml_physmem,
1, 1, 0);
@@ -152,6 +152,7 @@
static void init_highmem(void)
{
pgd_t *pgd;
+ pud_t *pud;
pmd_t *pmd;
pte_t *pte;
unsigned long vaddr;
@@ -163,7 +164,8 @@
fixrange_init(vaddr, vaddr + PAGE_SIZE*LAST_PKMAP, swapper_pg_dir);
pgd = swapper_pg_dir + pgd_index(vaddr);
- pmd = pmd_offset(pgd, vaddr);
+ pud = pud_offset(pgd, vaddr);
+ pmd = pmd_offset(pud, vaddr);
pte = pte_offset_kernel(pmd, vaddr);
pkmap_page_table = pte;
@@ -173,9 +175,10 @@
static void __init fixaddr_user_init( void)
{
-#if FIXADDR_USER_START != 0
+#if CONFIG_ARCH_REUSE_HOST_VSYSCALL_AREA
long size = FIXADDR_USER_END - FIXADDR_USER_START;
pgd_t *pgd;
+ pud_t *pud;
pmd_t *pmd;
pte_t *pte;
unsigned long paddr, vaddr = FIXADDR_USER_START;
@@ -187,9 +190,10 @@
paddr = (unsigned long)alloc_bootmem_low_pages( size);
memcpy( (void *)paddr, (void *)FIXADDR_USER_START, size);
paddr = __pa(paddr);
- for ( ; size > 0; size-=PAGE_SIZE, vaddr+=PAGE_SIZE, paddr+=PAGE_SIZE) {
+ for ( ; size > 0; size-=PAGE_SIZE, vaddr+=PAGE_SIZE, paddr+=PAGE_SIZE){
pgd = swapper_pg_dir + pgd_index(vaddr);
- pmd = pmd_offset(pgd, vaddr);
+ pud = pud_offset(pgd, vaddr);
+ pmd = pmd_offset(pud, vaddr);
pte = pte_offset_kernel(pmd, vaddr);
pte_set_val( (*pte), paddr, PAGE_READONLY);
}
diff -urN linux/arch/um/kernel/process.c linux/arch/um/kernel/process.c
--- linux/arch/um/kernel/process.c 2005/01/25 04:28:07 1.10
+++ linux/arch/um/kernel/process.c 2005/02/13 20:16:20 1.11
@@ -13,6 +13,10 @@
#include <setjmp.h>
#include <sys/time.h>
#include <sys/ptrace.h>
+
+/*Userspace header, must be after sys/ptrace.h, and both must be included. */
+#include <linux/ptrace.h>
+
#include <sys/wait.h>
#include <sys/mman.h>
#include <asm/unistd.h>
@@ -318,7 +322,7 @@
printk("Checking that ptrace can change system call numbers...");
pid = start_ptraced_child(&stack);
- if(ptrace(PTRACE_SETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD) < 0)
+ if (ptrace(PTRACE_OLDSETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD)
< 0)
panic("check_ptrace: PTRACE_SETOPTIONS failed, errno = %d",
errno);
while(1){
@@ -422,14 +426,3 @@
return(0);
}
#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff -urN linux/arch/um/kernel/sys_call_table.c
linux/arch/um/kernel/sys_call_table.c
--- linux/arch/um/kernel/sys_call_table.c 2005/01/13 14:05:40 1.12
+++ linux/arch/um/kernel/sys_call_table.c 2005/02/13 20:16:20 1.13
@@ -20,7 +20,7 @@
#define NFSSERVCTL sys_ni_syscall
#endif
-#define LAST_GENERIC_SYSCALL __NR_vperfctr_read
+#define LAST_GENERIC_SYSCALL __NR_keyctl
#if LAST_GENERIC_SYSCALL > LAST_ARCH_SYSCALL
#define LAST_SYSCALL LAST_GENERIC_SYSCALL
@@ -52,13 +52,7 @@
extern syscall_handler_t sys_mbind;
extern syscall_handler_t sys_get_mempolicy;
extern syscall_handler_t sys_set_mempolicy;
-extern syscall_handler_t sys_sys_kexec_load;
extern syscall_handler_t sys_sys_setaltroot;
-extern syscall_handler_t sys_vperfctr_open;
-extern syscall_handler_t sys_vperfctr_control;
-extern syscall_handler_t sys_vperfctr_unlink;
-extern syscall_handler_t sys_vperfctr_iresume;
-extern syscall_handler_t sys_vperfctr_read;
syscall_handler_t *sys_call_table[] = {
[ __NR_restart_syscall ] = (syscall_handler_t *) sys_restart_syscall,
@@ -273,32 +267,14 @@
[ __NR_mq_timedreceive ] = (syscall_handler_t *) sys_mq_timedreceive,
[ __NR_mq_notify ] = (syscall_handler_t *) sys_mq_notify,
[ __NR_mq_getsetattr ] = (syscall_handler_t *) sys_mq_getsetattr,
- [ __NR_sys_kexec_load ] = (syscall_handler_t *) sys_kexec_load,
+ [ __NR_sys_kexec_load ] = (syscall_handler_t *) sys_ni_syscall,
[ __NR_waitid ] = (syscall_handler_t *) sys_waitid,
-#if 0
- [ __NR_sys_setaltroot ] = (syscall_handler_t *) sys_sys_setaltroot,
-#endif
+ [ 285 ] = (syscall_handler_t *) sys_ni_syscall,
[ __NR_add_key ] = (syscall_handler_t *) sys_add_key,
[ __NR_request_key ] = (syscall_handler_t *) sys_request_key,
[ __NR_keyctl ] = (syscall_handler_t *) sys_keyctl,
- [ __NR_vperfctr_open ] = (syscall_handler_t *) sys_vperfctr_open,
- [ __NR_vperfctr_control ] = (syscall_handler_t *) sys_vperfctr_control,
- [ __NR_vperfctr_unlink ] = (syscall_handler_t *) sys_vperfctr_unlink,
- [ __NR_vperfctr_iresume ] = (syscall_handler_t *) sys_vperfctr_iresume,
- [ __NR_vperfctr_read ] = (syscall_handler_t *) sys_vperfctr_read,
ARCH_SYSCALLS
[ LAST_SYSCALL + 1 ... NR_syscalls ] =
(syscall_handler_t *) sys_ni_syscall
};
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff -urN linux/arch/um/kernel/time_kern.c linux/arch/um/kernel/time_kern.c
--- linux/arch/um/kernel/time_kern.c 2005/01/25 04:28:07 1.12
+++ linux/arch/um/kernel/time_kern.c 2005/02/13 20:16:20 1.13
@@ -22,7 +22,7 @@
#include "mode.h"
#include "os.h"
-u64 jiffies_64;
+u64 jiffies_64 = INITIAL_JIFFIES;
EXPORT_SYMBOL(jiffies_64);
diff -urN linux/arch/um/kernel/trap_kern.c linux/arch/um/kernel/trap_kern.c
--- linux/arch/um/kernel/trap_kern.c 2005/01/25 04:28:07 1.8
+++ linux/arch/um/kernel/trap_kern.c 2005/02/13 20:16:20 1.9
@@ -48,6 +48,8 @@
goto good_area;
else if(!(vma->vm_flags & VM_GROWSDOWN))
goto out;
+ else if(!ARCH_IS_STACKGROW(address))
+ goto out;
else if(expand_stack(vma, address))
goto out;
diff -urN linux/arch/um/kernel/skas/Makefile linux/arch/um/kernel/skas/Makefile
--- linux/arch/um/kernel/skas/Makefile 2005/01/13 14:05:41 1.5
+++ linux/arch/um/kernel/skas/Makefile 2005/02/13 20:16:20 1.6
@@ -11,3 +11,5 @@
$(USER_OBJS) : %.o: %.c
$(CC) $(CFLAGS_$(notdir $@)) $(USER_CFLAGS) -c -o $@ $<
+
+subdir- := util
diff -urN linux/arch/um/kernel/skas/process.c
linux/arch/um/kernel/skas/process.c
--- linux/arch/um/kernel/skas/process.c 2005/01/25 04:28:08 1.8
+++ linux/arch/um/kernel/skas/process.c 2005/02/13 20:16:20 1.9
@@ -124,7 +124,7 @@
panic("start_userspace : expected SIGSTOP, got status = %d",
status);
- if (ptrace(PTRACE_SETOPTIONS, pid, NULL, (void *)PTRACE_O_TRACESYSGOOD)
< 0)
+ if (ptrace(PTRACE_OLDSETOPTIONS, pid, NULL, (void
*)PTRACE_O_TRACESYSGOOD) < 0)
panic("start_userspace : PTRACE_SETOPTIONS failed, errno=%d\n",
errno);
diff -urN linux/arch/um/kernel/skas/trap_user.c
linux/arch/um/kernel/skas/trap_user.c
--- linux/arch/um/kernel/skas/trap_user.c 2005/01/13 14:05:41 1.5
+++ linux/arch/um/kernel/skas/trap_user.c 2005/02/13 20:16:20 1.6
@@ -20,6 +20,14 @@
int save_errno = errno;
int save_user;
+ /* This is done because to allow SIGSEGV to be delivered inside a SEGV
+ * handler. This can happen in copy_user, and if SEGV is disabled,
+ * the process will die.
+ * XXX Figure out why this is better than SA_NODEFER
+ */
+ if(sig == SIGSEGV)
+ change_sig(SIGSEGV, 1);
+
r = &TASK_REGS(get_current())->skas;
save_user = r->is_user;
r->is_user = 0;
diff -urN linux/arch/um/kernel/tt/exec_user.c
linux/arch/um/kernel/tt/exec_user.c
--- linux/arch/um/kernel/tt/exec_user.c 2005/01/13 14:05:41 1.3
+++ linux/arch/um/kernel/tt/exec_user.c 2005/02/13 20:16:20 1.4
@@ -39,7 +39,7 @@
os_kill_ptraced_process(old_pid, 0);
- if (ptrace(PTRACE_SETOPTIONS, new_pid, 0, (void
*)PTRACE_O_TRACESYSGOOD) < 0)
+ if (ptrace(PTRACE_OLDSETOPTIONS, new_pid, 0, (void
*)PTRACE_O_TRACESYSGOOD) < 0)
tracer_panic("do_exec: PTRACE_SETOPTIONS failed, errno = %d",
errno);
if(ptrace_setregs(new_pid, regs) < 0)
diff -urN linux/arch/um/kernel/tt/tracer.c linux/arch/um/kernel/tt/tracer.c
--- linux/arch/um/kernel/tt/tracer.c 2005/01/25 04:28:08 1.7
+++ linux/arch/um/kernel/tt/tracer.c 2005/02/13 20:16:20 1.8
@@ -72,7 +72,7 @@
(ptrace(PTRACE_CONT, pid, 0, 0) < 0))
tracer_panic("OP_FORK failed to attach pid");
wait_for_stop(pid, SIGSTOP, PTRACE_CONT, NULL);
- if (ptrace(PTRACE_SETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD) <
0)
+ if (ptrace(PTRACE_OLDSETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD)
< 0)
tracer_panic("OP_FORK: PTRACE_SETOPTIONS failed, errno = %d",
errno);
if(ptrace(PTRACE_CONT, pid, 0, 0) < 0)
tracer_panic("OP_FORK failed to continue process");
@@ -200,7 +200,7 @@
printf("waitpid on idle thread failed, errno = %d\n", errno);
exit(1);
}
- if (ptrace(PTRACE_SETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD) <
0) {
+ if (ptrace(PTRACE_OLDSETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD)
< 0) {
printf("Failed to PTRACE_SETOPTIONS for idle thread, errno =
%d\n", errno);
exit(1);
}
diff -urN linux/arch/x86_64/ia32/ia32_binfmt.c
linux/arch/x86_64/ia32/ia32_binfmt.c
--- linux/arch/x86_64/ia32/ia32_binfmt.c 2005/02/07 02:54:39 1.27
+++ linux/arch/x86_64/ia32/ia32_binfmt.c 2005/02/13 20:16:20 1.28
@@ -249,6 +249,8 @@
#define elf_check_arch(x) \
((x)->e_machine == EM_386)
+extern int force_personality32;
+
#define ELF_EXEC_PAGESIZE PAGE_SIZE
#define ELF_HWCAP (boot_cpu_data.x86_capability[0])
#define ELF_PLATFORM ("i686")
@@ -262,6 +264,8 @@
set_thread_flag(TIF_ABI_PENDING); \
else \
clear_thread_flag(TIF_ABI_PENDING); \
+ /* XXX This overwrites the user set personality */ \
+ current->personality |= force_personality32; \
} while (0)
/* Override some function names */
diff -urN linux/arch/x86_64/ia32/ipc32.c linux/arch/x86_64/ia32/ipc32.c
--- linux/arch/x86_64/ia32/ipc32.c 2004/04/12 20:23:27 1.12
+++ linux/arch/x86_64/ia32/ipc32.c 2005/02/13 20:16:20 1.13
@@ -49,7 +49,7 @@
case SHMDT:
return sys_shmdt(compat_ptr(ptr));
case SHMGET:
- return sys_shmget(first, second, third);
+ return sys_shmget(first, (unsigned)second, third);
case SHMCTL:
return compat_sys_shmctl(first, second, compat_ptr(ptr));
}
diff -urN linux/arch/x86_64/kernel/process.c linux/arch/x86_64/kernel/process.c
--- linux/arch/x86_64/kernel/process.c 2005/02/07 02:54:39 1.36
+++ linux/arch/x86_64/kernel/process.c 2005/02/13 20:16:21 1.37
@@ -577,6 +577,12 @@
/* Make sure to be in 64bit mode */
clear_thread_flag(TIF_IA32);
+
+ /* TBD: overwrites user setup. Should have two bits.
+ But 64bit processes have always behaved this way,
+ so it's not too bad. The main problem is just that
+ 32bit childs are affected again. */
+ current->personality &= ~READ_IMPLIES_EXEC;
}
asmlinkage long sys_fork(struct pt_regs *regs)
diff -urN linux/arch/x86_64/kernel/setup64.c linux/arch/x86_64/kernel/setup64.c
--- linux/arch/x86_64/kernel/setup64.c 2005/01/25 04:28:08 1.28
+++ linux/arch/x86_64/kernel/setup64.c 2005/02/13 20:16:21 1.29
@@ -50,16 +50,37 @@
on Enable(default)
off Disable
*/
-void __init nonx_setup(const char *str)
+int __init nonx_setup(char *str)
{
- if (!strcmp(str, "on")) {
+ if (!strncmp(str, "on", 2)) {
__supported_pte_mask |= _PAGE_NX;
do_not_nx = 0;
- } else if (!strcmp(str, "off")) {
+ } else if (!strncmp(str, "off", 3)) {
do_not_nx = 1;
__supported_pte_mask &= ~_PAGE_NX;
- }
+ }
+ return 0;
}
+__setup("noexec=", nonx_setup); /* parsed early actually */
+
+int force_personality32 = READ_IMPLIES_EXEC;
+
+/* noexec32=on|off
+Control non executable heap for 32bit processes.
+To control the stack too use noexec=off
+
+on PROT_READ does not imply PROT_EXEC for 32bit processes
+off PROT_READ implies PROT_EXEC (default)
+*/
+static int __init nonx32_setup(char *str)
+{
+ if (!strcmp(str, "on"))
+ force_personality32 &= ~READ_IMPLIES_EXEC;
+ else if (!strcmp(str, "off"))
+ force_personality32 |= READ_IMPLIES_EXEC;
+ return 0;
+}
+__setup("noexec32=", nonx32_setup);
/*
* Great future plan:
diff -urN linux/drivers/atm/horizon.c linux/drivers/atm/horizon.c
--- linux/drivers/atm/horizon.c 2005/01/25 04:28:09 1.24
+++ linux/drivers/atm/horizon.c 2005/02/13 20:16:21 1.25
@@ -39,6 +39,7 @@
#include <linux/uio.h>
#include <linux/init.h>
#include <linux/ioport.h>
+#include <linux/wait.h>
#include <asm/system.h>
#include <asm/io.h>
@@ -1089,13 +1090,11 @@
/********** (queue to) become the next TX thread **********/
static inline int tx_hold (hrz_dev * dev) {
- while (test_and_set_bit (tx_busy, &dev->flags)) {
- PRINTD (DBG_TX, "sleeping at tx lock %p %lu", dev, dev->flags);
- interruptible_sleep_on (&dev->tx_queue);
- PRINTD (DBG_TX, "woken at tx lock %p %lu", dev, dev->flags);
- if (signal_pending (current))
- return -1;
- }
+ PRINTD (DBG_TX, "sleeping at tx lock %p %lu", dev, dev->flags);
+ wait_event_interruptible(dev->tx_queue, (!test_and_set_bit(tx_busy,
&dev->flags)));
+ PRINTD (DBG_TX, "woken at tx lock %p %lu", dev, dev->flags);
+ if (signal_pending (current))
+ return -1;
PRINTD (DBG_TX, "set tx_busy for dev %p", dev);
return 0;
}
diff -urN linux/drivers/atm/iphase.c linux/drivers/atm/iphase.c
--- linux/drivers/atm/iphase.c 2005/01/13 14:05:50 1.34
+++ linux/drivers/atm/iphase.c 2005/02/13 20:16:21 1.35
@@ -53,6 +53,7 @@
#include <linux/delay.h>
#include <linux/uio.h>
#include <linux/init.h>
+#include <linux/wait.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/atomic.h>
@@ -2586,14 +2587,14 @@
}
static void ia_close(struct atm_vcc *vcc)
-{
+{
+ DEFINE_WAIT(wait);
u16 *vc_table;
IADEV *iadev;
struct ia_vcc *ia_vcc;
struct sk_buff *skb = NULL;
struct sk_buff_head tmp_tx_backlog, tmp_vcc_backlog;
unsigned long closetime, flags;
- int ctimeout;
iadev = INPH_IA_DEV(vcc->dev);
ia_vcc = INPH_IA_VCC(vcc);
@@ -2606,7 +2607,9 @@
skb_queue_head_init (&tmp_vcc_backlog);
if (vcc->qos.txtp.traffic_class != ATM_NONE) {
iadev->close_pending++;
- sleep_on_timeout(&iadev->timeout_wait, 50);
+ prepare_to_wait(&iadev->timeout_wait, &wait, TASK_UNINTERRUPTIBLE);
+ schedule_timeout(50);
+ finish_wait(&iadev->timeout_wait, &wait);
spin_lock_irqsave(&iadev->tx_lock, flags);
while((skb = skb_dequeue(&iadev->tx_backlog))) {
if (ATM_SKB(skb)->vcc == vcc){
@@ -2619,17 +2622,12 @@
while((skb = skb_dequeue(&tmp_tx_backlog)))
skb_queue_tail(&iadev->tx_backlog, skb);
IF_EVENT(printk("IA TX Done decs_cnt = %d\n",
ia_vcc->vc_desc_cnt);)
- closetime = jiffies;
- ctimeout = 300000 / ia_vcc->pcr;
- if (ctimeout == 0)
- ctimeout = 1;
- while (ia_vcc->vc_desc_cnt > 0){
- if ((jiffies - closetime) >= ctimeout)
- break;
- spin_unlock_irqrestore(&iadev->tx_lock, flags);
- sleep_on(&iadev->close_wait);
- spin_lock_irqsave(&iadev->tx_lock, flags);
- }
+ closetime = 300000 / ia_vcc->pcr;
+ if (closetime == 0)
+ closetime = 1;
+ spin_unlock_irqrestore(&iadev->tx_lock, flags);
+ wait_event_timeout(iadev->close_wait, (ia_vcc->vc_desc_cnt <= 0),
closetime);
+ spin_lock_irqsave(&iadev->tx_lock, flags);
iadev->close_pending--;
iadev->testTable[vcc->vci]->lastTime = 0;
iadev->testTable[vcc->vci]->fract = 0;
diff -urN linux/drivers/atm/zatm.c linux/drivers/atm/zatm.c
--- linux/drivers/atm/zatm.c 2005/01/13 14:05:50 1.26
+++ linux/drivers/atm/zatm.c 2005/02/13 20:16:21 1.27
@@ -22,6 +22,7 @@
#include <linux/atm_zatm.h>
#include <linux/capability.h>
#include <linux/bitops.h>
+#include <linux/wait.h>
#include <asm/byteorder.h>
#include <asm/system.h>
#include <asm/string.h>
@@ -867,31 +868,21 @@
struct zatm_vcc *zatm_vcc;
unsigned long flags;
int chan;
-struct sk_buff *skb;
-int once = 1;
zatm_vcc = ZATM_VCC(vcc);
zatm_dev = ZATM_DEV(vcc->dev);
chan = zatm_vcc->tx_chan;
if (!chan) return;
DPRINTK("close_tx\n");
- while (skb_peek(&zatm_vcc->backlog)) {
-if (once) {
-printk("waiting for backlog to drain ...\n");
-event_dump();
-once = 0;
-}
- sleep_on(&zatm_vcc->tx_wait);
- }
-once = 1;
- while ((skb = skb_peek(&zatm_vcc->tx_queue))) {
-if (once) {
-printk("waiting for TX queue to drain ... %p\n",skb);
-event_dump();
-once = 0;
-}
- DPRINTK("waiting for TX queue to drain ... %p\n",skb);
- sleep_on(&zatm_vcc->tx_wait);
+ if (skb_peek(&zatm_vcc->backlog)) {
+ printk("waiting for backlog to drain ...\n");
+ event_dump();
+ wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->backlog));
+ }
+ if (skb_peek(&zatm_vcc->tx_queue)) {
+ printk("waiting for TX queue to drain ...\n");
+ event_dump();
+ wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->tx_queue));
}
spin_lock_irqsave(&zatm_dev->lock, flags);
#if 0
diff -urN linux/drivers/block/cciss_scsi.c linux/drivers/block/cciss_scsi.c
--- linux/drivers/block/cciss_scsi.c 2005/01/13 14:05:51 1.22
+++ linux/drivers/block/cciss_scsi.c 2005/02/13 20:16:21 1.23
@@ -691,14 +691,13 @@
cciss_scsi_detect(int ctlr)
{
struct Scsi_Host *sh;
+ int error;
sh = scsi_host_alloc(&cciss_driver_template, sizeof(struct ctlr_info
*));
if (sh == NULL)
- return 0;
-
+ goto fail;
sh->io_port = 0; // good enough? FIXME,
sh->n_io_port = 0; // I don't think we use these two...
-
sh->this_id = SELF_SCSI_ID;
((struct cciss_scsi_adapter_data_t *)
@@ -706,10 +705,16 @@
sh->hostdata[0] = (unsigned long) hba[ctlr];
sh->irq = hba[ctlr]->intr;
sh->unique_id = sh->irq;
- scsi_add_host(sh, &hba[ctlr]->pdev->dev); /* XXX handle failure */
+ error = scsi_add_host(sh, &hba[ctlr]->pdev->dev);
+ if (error)
+ goto fail_host_put;
scsi_scan_host(sh);
-
return 1;
+
+ fail_host_put:
+ scsi_host_put(sh);
+ fail:
+ return 0;
}
static void __exit cleanup_cciss_module(void);
diff -urN linux/drivers/block/sx8.c linux/drivers/block/sx8.c
--- linux/drivers/block/sx8.c 2005/01/13 14:05:51 1.4
+++ linux/drivers/block/sx8.c 2005/02/13 20:16:21 1.5
@@ -1503,7 +1503,8 @@
}
port->disk = disk;
- sprintf(disk->disk_name, DRV_NAME "/%u", (host->id *
CARM_MAX_PORTS) + i);
+ sprintf(disk->disk_name, DRV_NAME "/%u",
+ (unsigned int) (host->id * CARM_MAX_PORTS) + i);
sprintf(disk->devfs_name, DRV_NAME "/%u_%u", host->id, i);
disk->major = host->major;
disk->first_minor = i * CARM_MINORS_PER_MAJOR;
diff -urN linux/drivers/bluetooth/bpa10x.c linux/drivers/bluetooth/bpa10x.c
--- linux/drivers/bluetooth/bpa10x.c 1970/01/01 00:00:00
+++ linux/drivers/bluetooth/bpa10x.c Sun Feb 13 20:16:21 2005 1.1
@@ -0,0 +1,657 @@
+/*
+ *
+ * Digianswer Bluetooth USB driver
+ *
+ * Copyright (C) 2004-2005 Marcel Holtmann <marcel@holtmann.org>
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+
+#include <linux/usb.h>
+
+#include <net/bluetooth/bluetooth.h>
+#include <net/bluetooth/hci_core.h>
+
+#ifndef CONFIG_BT_HCIBPA10X_DEBUG
+#undef BT_DBG
+#define BT_DBG(D...)
+#endif
+
+#define VERSION "0.8"
+
+static int ignore = 0;
+
+static struct usb_device_id bpa10x_table[] = {
+ /* Tektronix BPA 100/105 (Digianswer) */
+ { USB_DEVICE(0x08fd, 0x0002) },
+
+ { } /* Terminating entry */
+};
+
+MODULE_DEVICE_TABLE(usb, bpa10x_table);
+
+#define BPA10X_CMD_EP 0x00
+#define BPA10X_EVT_EP 0x81
+#define BPA10X_TX_EP 0x02
+#define BPA10X_RX_EP 0x82
+
+#define BPA10X_CMD_BUF_SIZE 252
+#define BPA10X_EVT_BUF_SIZE 16
+#define BPA10X_TX_BUF_SIZE 384
+#define BPA10X_RX_BUF_SIZE 384
+
+struct bpa10x_data {
+ struct hci_dev *hdev;
+ struct usb_device *udev;
+
+ rwlock_t lock;
+
+ struct sk_buff_head cmd_queue;
+ struct urb *cmd_urb;
+ struct urb *evt_urb;
+ struct sk_buff *evt_skb;
+ unsigned int evt_len;
+
+ struct sk_buff_head tx_queue;
+ struct urb *tx_urb;
+ struct urb *rx_urb;
+};
+
+#define HCI_VENDOR_HDR_SIZE 5
+
+struct hci_vendor_hdr {
+ __u8 type;
+ __u16 snum;
+ __u16 dlen;
+} __attribute__ ((packed));
+
+static void bpa10x_recv_bulk(struct bpa10x_data *data, unsigned char *buf, int
count)
+{
+ struct hci_acl_hdr *ah;
+ struct hci_sco_hdr *sh;
+ struct hci_vendor_hdr *vh;
+ struct sk_buff *skb;
+ int len;
+
+ while (count) {
+ switch (*buf++) {
+ case HCI_ACLDATA_PKT:
+ ah = (struct hci_acl_hdr *) buf;
+ len = HCI_ACL_HDR_SIZE + __le16_to_cpu(ah->dlen);
+ skb = bt_skb_alloc(len, GFP_ATOMIC);
+ if (skb) {
+ memcpy(skb_put(skb, len), buf, len);
+ skb->dev = (void *) data->hdev;
+ skb->pkt_type = HCI_ACLDATA_PKT;
+ hci_recv_frame(skb);
+ }
+ break;
+
+ case HCI_SCODATA_PKT:
+ sh = (struct hci_sco_hdr *) buf;
+ len = HCI_SCO_HDR_SIZE + sh->dlen;
+ skb = bt_skb_alloc(len, GFP_ATOMIC);
+ if (skb) {
+ memcpy(skb_put(skb, len), buf, len);
+ skb->dev = (void *) data->hdev;
+ skb->pkt_type = HCI_SCODATA_PKT;
+ hci_recv_frame(skb);
+ }
+ break;
+
+ case HCI_VENDOR_PKT:
+ vh = (struct hci_vendor_hdr *) buf;
+ len = HCI_VENDOR_HDR_SIZE + __le16_to_cpu(vh->dlen);
+ skb = bt_skb_alloc(len, GFP_ATOMIC);
+ if (skb) {
+ memcpy(skb_put(skb, len), buf, len);
+ skb->dev = (void *) data->hdev;
+ skb->pkt_type = HCI_VENDOR_PKT;
+ hci_recv_frame(skb);
+ }
+ break;
+
+ default:
+ len = count - 1;
+ break;
+ }
+
+ buf += len;
+ count -= (len + 1);
+ }
+}
+
+static int bpa10x_recv_event(struct bpa10x_data *data, unsigned char *buf, int
size)
+{
+ BT_DBG("data %p buf %p size %d", data, buf, size);
+
+ if (data->evt_skb) {
+ struct sk_buff *skb = data->evt_skb;
+
+ memcpy(skb_put(skb, size), buf, size);
+
+ if (skb->len == data->evt_len) {
+ data->evt_skb = NULL;
+ data->evt_len = 0;
+ hci_recv_frame(skb);
+ }
+ } else {
+ struct sk_buff *skb;
+ struct hci_event_hdr *hdr;
+ unsigned char pkt_type;
+ int pkt_len = 0;
+
+ if (size < HCI_EVENT_HDR_SIZE + 1) {
+ BT_ERR("%s event packet block with size %d is too
short",
+ data->hdev->name, size);
+ return -EILSEQ;
+ }
+
+ pkt_type = *buf++;
+ size--;
+
+ if (pkt_type != HCI_EVENT_PKT) {
+ BT_ERR("%s unexpected event packet start byte 0x%02x",
+ data->hdev->name,
pkt_type);
+ return -EPROTO;
+ }
+
+ hdr = (struct hci_event_hdr *) buf;
+ pkt_len = HCI_EVENT_HDR_SIZE + hdr->plen;
+
+ skb = bt_skb_alloc(pkt_len, GFP_ATOMIC);
+ if (!skb) {
+ BT_ERR("%s no memory for new event packet",
+ data->hdev->name);
+ return -ENOMEM;
+ }
+
+ skb->dev = (void *) data->hdev;
+ skb->pkt_type = pkt_type;
+
+ memcpy(skb_put(skb, size), buf, size);
+
+ if (pkt_len == size) {
+ hci_recv_frame(skb);
+ } else {
+ data->evt_skb = skb;
+ data->evt_len = pkt_len;
+ }
+ }
+
+ return 0;
+}
+
+static void bpa10x_wakeup(struct bpa10x_data *data)
+{
+ struct urb *urb;
+ struct sk_buff *skb;
+ int err;
+
+ BT_DBG("data %p", data);
+
+ urb = data->cmd_urb;
+ if (urb->status == -EINPROGRESS)
+ skb = NULL;
+ else
+ skb = skb_dequeue(&data->cmd_queue);
+
+ if (skb) {
+ struct usb_ctrlrequest *cr;
+
+ if (skb->len > BPA10X_CMD_BUF_SIZE) {
+ BT_ERR("%s command packet with size %d is too big",
+ data->hdev->name,
skb->len);
+ kfree_skb(skb);
+ return;
+ }
+
+ cr = (struct usb_ctrlrequest *) urb->setup_packet;
+ cr->wLength = __cpu_to_le16(skb->len);
+
+ memcpy(urb->transfer_buffer, skb->data, skb->len);
+ urb->transfer_buffer_length = skb->len;
+
+ err = usb_submit_urb(urb, GFP_ATOMIC);
+ if (err < 0 && err != -ENODEV) {
+ BT_ERR("%s submit failed for command urb %p with error
%d",
+ data->hdev->name, urb,
err);
+ skb_queue_head(&data->cmd_queue, skb);
+ } else
+ kfree_skb(skb);
+ }
+
+ urb = data->tx_urb;
+ if (urb->status == -EINPROGRESS)
+ skb = NULL;
+ else
+ skb = skb_dequeue(&data->tx_queue);
+
+ if (skb) {
+ memcpy(urb->transfer_buffer, skb->data, skb->len);
+ urb->transfer_buffer_length = skb->len;
+
+ err = usb_submit_urb(urb, GFP_ATOMIC);
+ if (err < 0 && err != -ENODEV) {
+ BT_ERR("%s submit failed for command urb %p with error
%d",
+ data->hdev->name, urb,
err);
+ skb_queue_head(&data->tx_queue, skb);
+ } else
+ kfree_skb(skb);
+ }
+}
+
+static void bpa10x_complete(struct urb *urb, struct pt_regs *regs)
+{
+ struct bpa10x_data *data = urb->context;
+ unsigned char *buf = urb->transfer_buffer;
+ int err, count = urb->actual_length;
+
+ BT_DBG("data %p urb %p buf %p count %d", data, urb, buf, count);
+
+ read_lock(&data->lock);
+
+ if (!test_bit(HCI_RUNNING, &data->hdev->flags))
+ goto unlock;
+
+ if (urb->status < 0 || !count)
+ goto resubmit;
+
+ if (usb_pipein(urb->pipe)) {
+ data->hdev->stat.byte_rx += count;
+
+ if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
+ bpa10x_recv_event(data, buf, count);
+
+ if (usb_pipetype(urb->pipe) == PIPE_BULK)
+ bpa10x_recv_bulk(data, buf, count);
+ } else {
+ data->hdev->stat.byte_tx += count;
+
+ bpa10x_wakeup(data);
+ }
+
+resubmit:
+ if (usb_pipein(urb->pipe)) {
+ err = usb_submit_urb(urb, GFP_ATOMIC);
+ if (err < 0 && err != -ENODEV) {
+ BT_ERR("%s urb %p type %d resubmit status %d",
+ data->hdev->name, urb, usb_pipetype(urb->pipe),
err);
+ }
+ }
+
+unlock:
+ read_unlock(&data->lock);
+}
+
+static inline struct urb *bpa10x_alloc_urb(struct usb_device *udev, unsigned
int pipe, size_t size, int flags, void *data)
+{
+ struct urb *urb;
+ struct usb_ctrlrequest *cr;
+ unsigned char *buf;
+
+ BT_DBG("udev %p data %p", udev, data);
+
+ urb = usb_alloc_urb(0, flags);
+ if (!urb)
+ return NULL;
+
+ buf = kmalloc(size, flags);
+ if (!buf) {
+ usb_free_urb(urb);
+ return NULL;
+ }
+
+ switch (usb_pipetype(pipe)) {
+ case PIPE_CONTROL:
+ cr = kmalloc(sizeof(*cr), flags);
+ if (!cr) {
+ kfree(buf);
+ usb_free_urb(urb);
+ return NULL;
+ }
+
+ cr->bRequestType = USB_TYPE_VENDOR;
+ cr->bRequest = 0;
+ cr->wIndex = 0;
+ cr->wValue = 0;
+ cr->wLength = __cpu_to_le16(0);
+
+ usb_fill_control_urb(urb, udev, pipe, (void *) cr, buf, 0,
bpa10x_complete, data);
+ break;
+
+ case PIPE_INTERRUPT:
+ usb_fill_int_urb(urb, udev, pipe, buf, size, bpa10x_complete,
data, 1);
+ break;
+
+ case PIPE_BULK:
+ usb_fill_bulk_urb(urb, udev, pipe, buf, size, bpa10x_complete,
data);
+ break;
+
+ default:
+ kfree(buf);
+ usb_free_urb(urb);
+ return NULL;
+ }
+
+ return urb;
+}
+
+static inline void bpa10x_free_urb(struct urb *urb)
+{
+ BT_DBG("urb %p", urb);
+
+ if (!urb)
+ return;
+
+ if (urb->setup_packet)
+ kfree(urb->setup_packet);
+
+ if (urb->transfer_buffer)
+ kfree(urb->transfer_buffer);
+
+ usb_free_urb(urb);
+}
+
+static int bpa10x_open(struct hci_dev *hdev)
+{
+ struct bpa10x_data *data = hdev->driver_data;
+ struct usb_device *udev = data->udev;
+ unsigned long flags;
+ int err;
+
+ BT_DBG("hdev %p data %p", hdev, data);
+
+ if (test_and_set_bit(HCI_RUNNING, &hdev->flags))
+ return 0;
+
+ data->cmd_urb = bpa10x_alloc_urb(udev, usb_sndctrlpipe(udev,
BPA10X_CMD_EP),
+ BPA10X_CMD_BUF_SIZE, GFP_KERNEL, data);
+ if (!data->cmd_urb) {
+ err = -ENOMEM;
+ goto done;
+ }
+
+ data->evt_urb = bpa10x_alloc_urb(udev, usb_rcvintpipe(udev,
BPA10X_EVT_EP),
+ BPA10X_EVT_BUF_SIZE, GFP_KERNEL, data);
+ if (!data->evt_urb) {
+ bpa10x_free_urb(data->cmd_urb);
+ err = -ENOMEM;
+ goto done;
+ }
+
+ data->rx_urb = bpa10x_alloc_urb(udev, usb_rcvbulkpipe(udev,
BPA10X_RX_EP),
+ BPA10X_RX_BUF_SIZE, GFP_KERNEL, data);
+ if (!data->rx_urb) {
+ bpa10x_free_urb(data->evt_urb);
+ bpa10x_free_urb(data->cmd_urb);
+ err = -ENOMEM;
+ goto done;
+ }
+
+ data->tx_urb = bpa10x_alloc_urb(udev, usb_sndbulkpipe(udev,
BPA10X_TX_EP),
+ BPA10X_TX_BUF_SIZE, GFP_KERNEL, data);
+ if (!data->rx_urb) {
+ bpa10x_free_urb(data->rx_urb);
+ bpa10x_free_urb(data->evt_urb);
+ bpa10x_free_urb(data->cmd_urb);
+ err = -ENOMEM;
+ goto done;
+ }
+
+ write_lock_irqsave(&data->lock, flags);
+
+ err = usb_submit_urb(data->evt_urb, GFP_ATOMIC);
+ if (err < 0) {
+ BT_ERR("%s submit failed for event urb %p with error %d",
+ data->hdev->name, data->evt_urb, err);
+ } else {
+ err = usb_submit_urb(data->rx_urb, GFP_ATOMIC);
+ if (err < 0) {
+ BT_ERR("%s submit failed for rx urb %p with error %d",
+ data->hdev->name, data->evt_urb, err);
+ usb_kill_urb(data->evt_urb);
+ }
+ }
+
+ write_unlock_irqrestore(&data->lock, flags);
+
+done:
+ if (err < 0)
+ clear_bit(HCI_RUNNING, &hdev->flags);
+
+ return err;
+}
+
+static int bpa10x_close(struct hci_dev *hdev)
+{
+ struct bpa10x_data *data = hdev->driver_data;
+ unsigned long flags;
+
+ BT_DBG("hdev %p data %p", hdev, data);
+
+ if (!test_and_clear_bit(HCI_RUNNING, &hdev->flags))
+ return 0;
+
+ write_lock_irqsave(&data->lock, flags);
+
+ skb_queue_purge(&data->cmd_queue);
+ usb_kill_urb(data->cmd_urb);
+ usb_kill_urb(data->evt_urb);
+ usb_kill_urb(data->rx_urb);
+ usb_kill_urb(data->tx_urb);
+
+ write_unlock_irqrestore(&data->lock, flags);
+
+ bpa10x_free_urb(data->cmd_urb);
+ bpa10x_free_urb(data->evt_urb);
+ bpa10x_free_urb(data->rx_urb);
+ bpa10x_free_urb(data->tx_urb);
+
+ return 0;
+}
+
+static int bpa10x_flush(struct hci_dev *hdev)
+{
+ struct bpa10x_data *data = hdev->driver_data;
+
+ BT_DBG("hdev %p data %p", hdev, data);
+
+ skb_queue_purge(&data->cmd_queue);
+
+ return 0;
+}
+
+static int bpa10x_send_frame(struct sk_buff *skb)
+{
+ struct hci_dev *hdev = (struct hci_dev *) skb->dev;
+ struct bpa10x_data *data;
+
+ BT_DBG("hdev %p skb %p type %d len %d", hdev, skb, skb->pkt_type,
skb->len);
+
+ if (!hdev) {
+ BT_ERR("Frame for unknown HCI device");
+ return -ENODEV;
+ }
+
+ if (!test_bit(HCI_RUNNING, &hdev->flags))
+ return -EBUSY;
+
+ data = hdev->driver_data;
+
+ /* Prepend skb with frame type */
+ memcpy(skb_push(skb, 1), &(skb->pkt_type), 1);
+
+ switch (skb->pkt_type) {
+ case HCI_COMMAND_PKT:
+ hdev->stat.cmd_tx++;
+ skb_queue_tail(&data->cmd_queue, skb);
+ break;
+
+ case HCI_ACLDATA_PKT:
+ hdev->stat.acl_tx++;
+ skb_queue_tail(&data->tx_queue, skb);
+ break;
+
+ case HCI_SCODATA_PKT:
+ hdev->stat.sco_tx++;
+ skb_queue_tail(&data->tx_queue, skb);
+ break;
+ };
+
+ read_lock(&data->lock);
+
+ bpa10x_wakeup(data);
+
+ read_unlock(&data->lock);
+
+ return 0;
+}
+
+static void bpa10x_destruct(struct hci_dev *hdev)
+{
+ struct bpa10x_data *data = hdev->driver_data;
+
+ BT_DBG("hdev %p data %p", hdev, data);
+
+ kfree(data);
+}
+
+static int bpa10x_probe(struct usb_interface *intf, const struct usb_device_id
*id)
+{
+ struct usb_device *udev = interface_to_usbdev(intf);
+ struct hci_dev *hdev;
+ struct bpa10x_data *data;
+ int err;
+
+ BT_DBG("intf %p id %p", intf, id);
+
+ if (ignore)
+ return -ENODEV;
+
+ data = kmalloc(sizeof(*data), GFP_KERNEL);
+ if (!data) {
+ BT_ERR("Can't allocate data structure");
+ return -ENOMEM;
+ }
+
+ memset(data, 0, sizeof(*data));
+
+ data->udev = udev;
+
+ rwlock_init(&data->lock);
+
+ skb_queue_head_init(&data->cmd_queue);
+ skb_queue_head_init(&data->tx_queue);
+
+ hdev = hci_alloc_dev();
+ if (!hdev) {
+ BT_ERR("Can't allocate HCI device");
+ kfree(data);
+ return -ENOMEM;
+ }
+
+ data->hdev = hdev;
+
+ hdev->type = HCI_USB;
+ hdev->driver_data = data;
+ SET_HCIDEV_DEV(hdev, &intf->dev);
+
+ hdev->open = bpa10x_open;
+ hdev->close = bpa10x_close;
+ hdev->flush = bpa10x_flush;
+ hdev->send = bpa10x_send_frame;
+ hdev->destruct = bpa10x_destruct;
+
+ hdev->owner = THIS_MODULE;
+
+ err = hci_register_dev(hdev);
+ if (err < 0) {
+ BT_ERR("Can't register HCI device");
+ kfree(data);
+ hci_free_dev(hdev);
+ return err;
+ }
+
+ usb_set_intfdata(intf, data);
+
+ return 0;
+}
+
+static void bpa10x_disconnect(struct usb_interface *intf)
+{
+ struct bpa10x_data *data = usb_get_intfdata(intf);
+ struct hci_dev *hdev = data->hdev;
+
+ BT_DBG("intf %p", intf);
+
+ if (!hdev)
+ return;
+
+ usb_set_intfdata(intf, NULL);
+
+ if (hci_unregister_dev(hdev) < 0)
+ BT_ERR("Can't unregister HCI device %s", hdev->name);
+
+ hci_free_dev(hdev);
+}
+
+static struct usb_driver bpa10x_driver = {
+ .owner = THIS_MODULE,
+ .name = "bpa10x",
+ .probe = bpa10x_probe,
+ .disconnect = bpa10x_disconnect,
+ .id_table = bpa10x_table,
+};
+
+static int __init bpa10x_init(void)
+{
+ int err;
+
+ BT_INFO("Digianswer Bluetooth USB driver ver %s", VERSION);
+
+ err = usb_register(&bpa10x_driver);
+ if (err < 0)
+ BT_ERR("Failed to register USB driver");
+
+ return err;
+}
+
+static void __exit bpa10x_exit(void)
+{
+ usb_deregister(&bpa10x_driver);
+}
+
+module_init(bpa10x_init);
+module_exit(bpa10x_exit);
+
+module_param(ignore, bool, 0644);
+MODULE_PARM_DESC(ignore, "Ignore devices from the matching table");
+
+MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
+MODULE_DESCRIPTION("Digianswer Bluetooth USB driver ver " VERSION);
+MODULE_VERSION(VERSION);
+MODULE_LICENSE("GPL");
diff -urN linux/drivers/bluetooth/Kconfig linux/drivers/bluetooth/Kconfig
--- linux/drivers/bluetooth/Kconfig 2004/04/23 15:54:11 1.7
+++ linux/drivers/bluetooth/Kconfig 2005/02/13 20:16:21 1.8
@@ -75,6 +75,17 @@
Say Y here to compile support for HCI BCM203x devices into the
kernel or say M to compile it as module (bcm203x).
+config BT_HCIBPA10X
+ tristate "HCI BPA10x USB driver"
+ depends on USB
+ help
+ Bluetooth HCI BPA10x USB driver.
+ This driver provides support for the Digianswer BPA 100/105 Bluetooth
+ sniffer devices.
+
+ Say Y here to compile support for HCI BPA10x devices into the
+ kernel or say M to compile it as module (bpa10x).
+
config BT_HCIBFUSB
tristate "HCI BlueFRITZ! USB driver"
depends on USB
diff -urN linux/drivers/bluetooth/Makefile linux/drivers/bluetooth/Makefile
--- linux/drivers/bluetooth/Makefile 2004/02/05 02:39:59 1.11
+++ linux/drivers/bluetooth/Makefile 2005/02/13 20:16:21 1.12
@@ -6,6 +6,7 @@
obj-$(CONFIG_BT_HCIVHCI) += hci_vhci.o
obj-$(CONFIG_BT_HCIUART) += hci_uart.o
obj-$(CONFIG_BT_HCIBCM203X) += bcm203x.o
+obj-$(CONFIG_BT_HCIBPA10X) += bpa10x.o
obj-$(CONFIG_BT_HCIBFUSB) += bfusb.o
obj-$(CONFIG_BT_HCIDTL1) += dtl1_cs.o
obj-$(CONFIG_BT_HCIBT3C) += bt3c_cs.o
diff -urN linux/drivers/bluetooth/hci_usb.c linux/drivers/bluetooth/hci_usb.c
--- linux/drivers/bluetooth/hci_usb.c 2005/02/07 02:54:43 1.39
+++ linux/drivers/bluetooth/hci_usb.c 2005/02/13 20:16:21 1.40
@@ -73,7 +73,7 @@
static int isoc = 2;
#endif
-#define VERSION "2.7"
+#define VERSION "2.8"
static struct usb_driver hci_usb_driver;
@@ -104,11 +104,11 @@
{ USB_DEVICE(0x0a5c, 0x2033), .driver_info = HCI_IGNORE },
/* Broadcom BCM2035 */
- { USB_DEVICE(0x0a5c, 0x2009), .driver_info = HCI_RESET |
HCI_BROKEN_ISOC },
{ USB_DEVICE(0x0a5c, 0x200a), .driver_info = HCI_RESET |
HCI_BROKEN_ISOC },
+ { USB_DEVICE(0x0a5c, 0x2009), .driver_info = HCI_BCM92035 },
/* Microsoft Wireless Transceiver for Bluetooth 2.0 */
- { USB_DEVICE(0x045e, 0x009c), .driver_info = HCI_RESET |
HCI_BROKEN_ISOC },
+ { USB_DEVICE(0x045e, 0x009c), .driver_info = HCI_BCM92035 },
/* ISSC Bluetooth Adapter v3.1 */
{ USB_DEVICE(0x1131, 0x1001), .driver_info = HCI_RESET },
@@ -977,6 +977,17 @@
set_bit(HCI_QUIRK_RAW_DEVICE, &hdev->quirks);
}
+ if (id->driver_info & HCI_BCM92035) {
+ unsigned char cmd[] = { 0x3b, 0xfc, 0x01, 0x00 };
+ struct sk_buff *skb;
+
+ skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
+ if (skb) {
+ memcpy(skb_put(skb, sizeof(cmd)), cmd, sizeof(cmd));
+ skb_queue_tail(&hdev->driver_init, skb);
+ }
+ }
+
if (hci_register_dev(hdev) < 0) {
BT_ERR("Can't register HCI device");
hci_free_dev(hdev);
diff -urN linux/drivers/bluetooth/hci_usb.h linux/drivers/bluetooth/hci_usb.h
--- linux/drivers/bluetooth/hci_usb.h 2005/02/07 02:54:43 1.9
+++ linux/drivers/bluetooth/hci_usb.h 2005/02/13 20:16:21 1.10
@@ -33,6 +33,7 @@
#define HCI_DIGIANSWER 0x04
#define HCI_SNIFFER 0x08
#define HCI_BROKEN_ISOC 0x10
+#define HCI_BCM92035 0x20
#define HCI_MAX_IFACE_NUM 3
diff -urN linux/drivers/cdrom/Kconfig linux/drivers/cdrom/Kconfig
--- linux/drivers/cdrom/Kconfig 2005/01/25 04:28:12 1.6
+++ linux/drivers/cdrom/Kconfig 2005/02/13 20:16:21 1.7
@@ -105,7 +105,7 @@
config MCD
tristate "Mitsumi (standard) [no XA/Multisession] CDROM support"
- depends on CD_NO_IDESCSI
+ depends on CD_NO_IDESCSI && BROKEN
---help---
This is the older of the two drivers for the older Mitsumi models
LU-005, FX-001 and FX-001D. This is not the right driver for the
diff -urN linux/drivers/char/hvcs.c linux/drivers/char/hvcs.c
--- linux/drivers/char/hvcs.c 2005/01/13 14:05:52 1.6
+++ linux/drivers/char/hvcs.c 2005/02/13 20:16:21 1.7
@@ -1363,6 +1363,7 @@
hvcs_tty_driver->driver_name = hvcs_driver_name;
hvcs_tty_driver->name = hvcs_device_node;
+ hvcs_tty_driver->devfs_name = hvcs_device_node;
/*
* We'll let the system assign us a major number, indicated by leaving
diff -urN linux/drivers/char/mmtimer.c linux/drivers/char/mmtimer.c
--- linux/drivers/char/mmtimer.c 2004/12/04 18:16:02 1.4
+++ linux/drivers/char/mmtimer.c 2005/02/13 20:16:21 1.5
@@ -36,9 +36,7 @@
#include <asm/sn/intr.h>
#include <asm/sn/shub_mmr.h>
#include <asm/sn/nodepda.h>
-
-/* This is ugly and jbarnes has promised me to fix this later */
-#include "../../arch/ia64/sn/include/shubio.h"
+#include <asm/sn/shubio.h>
MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>");
MODULE_DESCRIPTION("SGI Altix RTC Timer");
diff -urN linux/drivers/char/mxser.c linux/drivers/char/mxser.c
--- linux/drivers/char/mxser.c 2005/01/13 14:05:52 1.39
+++ linux/drivers/char/mxser.c 2005/02/13 20:16:21 1.40
@@ -556,7 +556,7 @@
info = &mxvar_table[n];
/*if (verbose) */ {
printk(KERN_DEBUG " ttyM%d - ttyM%d ", n, n +
hwconf->ports - 1);
- printk(KERN_DEBUG " max. baud rate = %d bps.\n",
hwconf->MaxCanSetBaudRate[0]);
+ printk(" max. baud rate = %d bps.\n",
hwconf->MaxCanSetBaudRate[0]);
}
for (i = 0; i < hwconf->ports; i++, n++, info++) {
@@ -609,18 +609,12 @@
n = board * MXSER_PORTS_PER_BOARD;
info = &mxvar_table[n];
- spin_lock_irqsave(&info->slock, flags);
retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
"mxser", info);
if (retval) {
- spin_unlock_irqrestore(&info->slock, flags);
printk(KERN_ERR "Board %d: %s", board,
mxser_brdname[hwconf->board_type - 1]);
printk(" Request irq fail,IRQ (%d) may be conflit with another
device.\n", info->irq);
return retval;
}
-
- spin_unlock_irqrestore(&info->slock, flags);
-
-
return 0;
}
@@ -2144,10 +2138,9 @@
mxvar_log.rxcnt[info->port] += cnt;
info->mon_data.rxcnt += cnt;
info->mon_data.up_rxcnt += cnt;
-
- tty->ldisc.receive_buf(tty, tty->flip.char_buf, tty->flip.flag_buf,
count);
spin_unlock_irqrestore(&info->slock, flags);
-
+
+ tty_flip_buffer_push(tty);
}
static void mxser_transmit_chars(struct mxser_struct *info)
diff -urN linux/drivers/char/sonypi.c linux/drivers/char/sonypi.c
--- linux/drivers/char/sonypi.c 2005/01/13 14:05:52 1.26
+++ linux/drivers/char/sonypi.c 2005/02/13 20:16:21 1.27
@@ -1,7 +1,9 @@
/*
* Sony Programmable I/O Control Device driver for VAIO
*
- * Copyright (C) 2001-2004 Stelian Pop <stelian@popies.net>
+ * Copyright (C) 2001-2005 Stelian Pop <stelian@popies.net>
+ *
+ * Copyright (C) 2005 Narayanan R S <nars@kadamba.org>
*
* Copyright (C) 2001-2002 Alcôve <www.alcove.com>
*
@@ -45,14 +47,16 @@
#include <linux/acpi.h>
#include <linux/dmi.h>
#include <linux/err.h>
+#include <linux/kfifo.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/system.h>
-#include "sonypi.h"
#include <linux/sonypi.h>
+#define SONYPI_DRIVER_VERSION "1.26"
+
MODULE_AUTHOR("Stelian Pop <stelian@popies.net>");
MODULE_DESCRIPTION("Sony Programmable I/O Control Device driver");
MODULE_LICENSE("GPL");
@@ -92,7 +96,390 @@
MODULE_PARM_DESC(useinput,
"set this if you would like sonypi to feed events to the input
subsystem");
-static struct sonypi_device sonypi_device;
+#define SONYPI_DEVICE_MODEL_TYPE1 1
+#define SONYPI_DEVICE_MODEL_TYPE2 2
+
+/* type1 models use those */
+#define SONYPI_IRQ_PORT 0x8034
+#define SONYPI_IRQ_SHIFT 22
+#define SONYPI_BASE 0x50
+#define SONYPI_G10A (SONYPI_BASE+0x14)
+#define SONYPI_TYPE1_REGION_SIZE 0x08
+#define SONYPI_TYPE1_EVTYPE_OFFSET 0x04
+
+/* type2 series specifics */
+#define SONYPI_SIRQ 0x9b
+#define SONYPI_SLOB 0x9c
+#define SONYPI_SHIB 0x9d
+#define SONYPI_TYPE2_REGION_SIZE 0x20
+#define SONYPI_TYPE2_EVTYPE_OFFSET 0x12
+
+/* battery / brightness addresses */
+#define SONYPI_BAT_FLAGS 0x81
+#define SONYPI_LCD_LIGHT 0x96
+#define SONYPI_BAT1_PCTRM 0xa0
+#define SONYPI_BAT1_LEFT 0xa2
+#define SONYPI_BAT1_MAXRT 0xa4
+#define SONYPI_BAT2_PCTRM 0xa8
+#define SONYPI_BAT2_LEFT 0xaa
+#define SONYPI_BAT2_MAXRT 0xac
+#define SONYPI_BAT1_MAXTK 0xb0
+#define SONYPI_BAT1_FULL 0xb2
+#define SONYPI_BAT2_MAXTK 0xb8
+#define SONYPI_BAT2_FULL 0xba
+
+/* FAN0 information (reverse engineered from ACPI tables) */
+#define SONYPI_FAN0_STATUS 0x93
+#define SONYPI_TEMP_STATUS 0xC1
+
+/* ioports used for brightness and type2 events */
+#define SONYPI_DATA_IOPORT 0x62
+#define SONYPI_CST_IOPORT 0x66
+
+/* The set of possible ioports */
+struct sonypi_ioport_list {
+ u16 port1;
+ u16 port2;
+};
+
+static struct sonypi_ioport_list sonypi_type1_ioport_list[] = {
+ { 0x10c0, 0x10c4 }, /* looks like the default on C1Vx */
+ { 0x1080, 0x1084 },
+ { 0x1090, 0x1094 },
+ { 0x10a0, 0x10a4 },
+ { 0x10b0, 0x10b4 },
+ { 0x0, 0x0 }
+};
+
+static struct sonypi_ioport_list sonypi_type2_ioport_list[] = {
+ { 0x1080, 0x1084 },
+ { 0x10a0, 0x10a4 },
+ { 0x10c0, 0x10c4 },
+ { 0x10e0, 0x10e4 },
+ { 0x0, 0x0 }
+};
+
+/* The set of possible interrupts */
+struct sonypi_irq_list {
+ u16 irq;
+ u16 bits;
+};
+
+static struct sonypi_irq_list sonypi_type1_irq_list[] = {
+ { 11, 0x2 }, /* IRQ 11, GO22=0,GO23=1 in AML */
+ { 10, 0x1 }, /* IRQ 10, GO22=1,GO23=0 in AML */
+ { 5, 0x0 }, /* IRQ 5, GO22=0,GO23=0 in AML */
+ { 0, 0x3 } /* no IRQ, GO22=1,GO23=1 in AML */
+};
+
+static struct sonypi_irq_list sonypi_type2_irq_list[] = {
+ { 11, 0x80 }, /* IRQ 11, 0x80 in SIRQ in AML */
+ { 10, 0x40 }, /* IRQ 10, 0x40 in SIRQ in AML */
+ { 9, 0x20 }, /* IRQ 9, 0x20 in SIRQ in AML */
+ { 6, 0x10 }, /* IRQ 6, 0x10 in SIRQ in AML */
+ { 0, 0x00 } /* no IRQ, 0x00 in SIRQ in AML */
+};
+
+#define SONYPI_CAMERA_BRIGHTNESS 0
+#define SONYPI_CAMERA_CONTRAST 1
+#define SONYPI_CAMERA_HUE 2
+#define SONYPI_CAMERA_COLOR 3
+#define SONYPI_CAMERA_SHARPNESS 4
+
+#define SONYPI_CAMERA_PICTURE 5
+#define SONYPI_CAMERA_EXPOSURE_MASK 0xC
+#define SONYPI_CAMERA_WHITE_BALANCE_MASK 0x3
+#define SONYPI_CAMERA_PICTURE_MODE_MASK 0x30
+#define SONYPI_CAMERA_MUTE_MASK 0x40
+
+/* the rest don't need a loop until not 0xff */
+#define SONYPI_CAMERA_AGC 6
+#define SONYPI_CAMERA_AGC_MASK 0x30
+#define SONYPI_CAMERA_SHUTTER_MASK 0x7
+
+#define SONYPI_CAMERA_SHUTDOWN_REQUEST 7
+#define SONYPI_CAMERA_CONTROL 0x10
+
+#define SONYPI_CAMERA_STATUS 7
+#define SONYPI_CAMERA_STATUS_READY 0x2
+#define SONYPI_CAMERA_STATUS_POSITION 0x4
+
+#define SONYPI_DIRECTION_BACKWARDS 0x4
+
+#define SONYPI_CAMERA_REVISION 8
+#define SONYPI_CAMERA_ROMVERSION 9
+
+/* Event masks */
+#define SONYPI_JOGGER_MASK 0x00000001
+#define SONYPI_CAPTURE_MASK 0x00000002
+#define SONYPI_FNKEY_MASK 0x00000004
+#define SONYPI_BLUETOOTH_MASK 0x00000008
+#define SONYPI_PKEY_MASK 0x00000010
+#define SONYPI_BACK_MASK 0x00000020
+#define SONYPI_HELP_MASK 0x00000040
+#define SONYPI_LID_MASK 0x00000080
+#define SONYPI_ZOOM_MASK 0x00000100
+#define SONYPI_THUMBPHRASE_MASK 0x00000200
+#define SONYPI_MEYE_MASK 0x00000400
+#define SONYPI_MEMORYSTICK_MASK 0x00000800
+#define SONYPI_BATTERY_MASK 0x00001000
+
+struct sonypi_event {
+ u8 data;
+ u8 event;
+};
+
+/* The set of possible button release events */
+static struct sonypi_event sonypi_releaseev[] = {
+ { 0x00, SONYPI_EVENT_ANYBUTTON_RELEASED },
+ { 0, 0 }
+};
+
+/* The set of possible jogger events */
+static struct sonypi_event sonypi_joggerev[] = {
+ { 0x1f, SONYPI_EVENT_JOGDIAL_UP },
+ { 0x01, SONYPI_EVENT_JOGDIAL_DOWN },
+ { 0x5f, SONYPI_EVENT_JOGDIAL_UP_PRESSED },
+ { 0x41, SONYPI_EVENT_JOGDIAL_DOWN_PRESSED },
+ { 0x1e, SONYPI_EVENT_JOGDIAL_FAST_UP },
+ { 0x02, SONYPI_EVENT_JOGDIAL_FAST_DOWN },
+ { 0x5e, SONYPI_EVENT_JOGDIAL_FAST_UP_PRESSED },
+ { 0x42, SONYPI_EVENT_JOGDIAL_FAST_DOWN_PRESSED },
+ { 0x1d, SONYPI_EVENT_JOGDIAL_VFAST_UP },
+ { 0x03, SONYPI_EVENT_JOGDIAL_VFAST_DOWN },
+ { 0x5d, SONYPI_EVENT_JOGDIAL_VFAST_UP_PRESSED },
+ { 0x43, SONYPI_EVENT_JOGDIAL_VFAST_DOWN_PRESSED },
+ { 0x40, SONYPI_EVENT_JOGDIAL_PRESSED },
+ { 0, 0 }
+};
+
+/* The set of possible capture button events */
+static struct sonypi_event sonypi_captureev[] = {
+ { 0x05, SONYPI_EVENT_CAPTURE_PARTIALPRESSED },
+ { 0x07, SONYPI_EVENT_CAPTURE_PRESSED },
+ { 0x01, SONYPI_EVENT_CAPTURE_PARTIALRELEASED },
+ { 0, 0 }
+};
+
+/* The set of possible fnkeys events */
+static struct sonypi_event sonypi_fnkeyev[] = {
+ { 0x10, SONYPI_EVENT_FNKEY_ESC },
+ { 0x11, SONYPI_EVENT_FNKEY_F1 },
+ { 0x12, SONYPI_EVENT_FNKEY_F2 },
+ { 0x13, SONYPI_EVENT_FNKEY_F3 },
+ { 0x14, SONYPI_EVENT_FNKEY_F4 },
+ { 0x15, SONYPI_EVENT_FNKEY_F5 },
+ { 0x16, SONYPI_EVENT_FNKEY_F6 },
+ { 0x17, SONYPI_EVENT_FNKEY_F7 },
+ { 0x18, SONYPI_EVENT_FNKEY_F8 },
+ { 0x19, SONYPI_EVENT_FNKEY_F9 },
+ { 0x1a, SONYPI_EVENT_FNKEY_F10 },
+ { 0x1b, SONYPI_EVENT_FNKEY_F11 },
+ { 0x1c, SONYPI_EVENT_FNKEY_F12 },
+ { 0x1f, SONYPI_EVENT_FNKEY_RELEASED },
+ { 0x21, SONYPI_EVENT_FNKEY_1 },
+ { 0x22, SONYPI_EVENT_FNKEY_2 },
+ { 0x31, SONYPI_EVENT_FNKEY_D },
+ { 0x32, SONYPI_EVENT_FNKEY_E },
+ { 0x33, SONYPI_EVENT_FNKEY_F },
+ { 0x34, SONYPI_EVENT_FNKEY_S },
+ { 0x35, SONYPI_EVENT_FNKEY_B },
+ { 0x36, SONYPI_EVENT_FNKEY_ONLY },
+ { 0, 0 }
+};
+
+/* The set of possible program key events */
+static struct sonypi_event sonypi_pkeyev[] = {
+ { 0x01, SONYPI_EVENT_PKEY_P1 },
+ { 0x02, SONYPI_EVENT_PKEY_P2 },
+ { 0x04, SONYPI_EVENT_PKEY_P3 },
+ { 0x5c, SONYPI_EVENT_PKEY_P1 },
+ { 0, 0 }
+};
+
+/* The set of possible bluetooth events */
+static struct sonypi_event sonypi_blueev[] = {
+ { 0x55, SONYPI_EVENT_BLUETOOTH_PRESSED },
+ { 0x59, SONYPI_EVENT_BLUETOOTH_ON },
+ { 0x5a, SONYPI_EVENT_BLUETOOTH_OFF },
+ { 0, 0 }
+};
+
+/* The set of possible back button events */
+static struct sonypi_event sonypi_backev[] = {
+ { 0x20, SONYPI_EVENT_BACK_PRESSED },
+ { 0, 0 }
+};
+
+/* The set of possible help button events */
+static struct sonypi_event sonypi_helpev[] = {
+ { 0x3b, SONYPI_EVENT_HELP_PRESSED },
+ { 0, 0 }
+};
+
+
+/* The set of possible lid events */
+static struct sonypi_event sonypi_lidev[] = {
+ { 0x51, SONYPI_EVENT_LID_CLOSED },
+ { 0x50, SONYPI_EVENT_LID_OPENED },
+ { 0, 0 }
+};
+
+/* The set of possible zoom events */
+static struct sonypi_event sonypi_zoomev[] = {
+ { 0x39, SONYPI_EVENT_ZOOM_PRESSED },
+ { 0, 0 }
+};
+
+/* The set of possible thumbphrase events */
+static struct sonypi_event sonypi_thumbphraseev[] = {
+ { 0x3a, SONYPI_EVENT_THUMBPHRASE_PRESSED },
+ { 0, 0 }
+};
+
+/* The set of possible motioneye camera events */
+static struct sonypi_event sonypi_meyeev[] = {
+ { 0x00, SONYPI_EVENT_MEYE_FACE },
+ { 0x01, SONYPI_EVENT_MEYE_OPPOSITE },
+ { 0, 0 }
+};
+
+/* The set of possible memorystick events */
+static struct sonypi_event sonypi_memorystickev[] = {
+ { 0x53, SONYPI_EVENT_MEMORYSTICK_INSERT },
+ { 0x54, SONYPI_EVENT_MEMORYSTICK_EJECT },
+ { 0, 0 }
+};
+
+/* The set of possible battery events */
+static struct sonypi_event sonypi_batteryev[] = {
+ { 0x20, SONYPI_EVENT_BATTERY_INSERT },
+ { 0x30, SONYPI_EVENT_BATTERY_REMOVE },
+ { 0, 0 }
+};
+
+static struct sonypi_eventtypes {
+ int model;
+ u8 data;
+ unsigned long mask;
+ struct sonypi_event * events;
+} sonypi_eventtypes[] = {
+ { SONYPI_DEVICE_MODEL_TYPE1, 0, 0xffffffff, sonypi_releaseev },
+ { SONYPI_DEVICE_MODEL_TYPE1, 0x70, SONYPI_MEYE_MASK, sonypi_meyeev },
+ { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_LID_MASK, sonypi_lidev },
+ { SONYPI_DEVICE_MODEL_TYPE1, 0x60, SONYPI_CAPTURE_MASK,
sonypi_captureev },
+ { SONYPI_DEVICE_MODEL_TYPE1, 0x10, SONYPI_JOGGER_MASK, sonypi_joggerev
},
+ { SONYPI_DEVICE_MODEL_TYPE1, 0x20, SONYPI_FNKEY_MASK, sonypi_fnkeyev },
+ { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_BLUETOOTH_MASK, sonypi_blueev
},
+ { SONYPI_DEVICE_MODEL_TYPE1, 0x40, SONYPI_PKEY_MASK, sonypi_pkeyev },
+ { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_MEMORYSTICK_MASK,
sonypi_memorystickev },
+ { SONYPI_DEVICE_MODEL_TYPE1, 0x40, SONYPI_BATTERY_MASK,
sonypi_batteryev },
+
+ { SONYPI_DEVICE_MODEL_TYPE2, 0, 0xffffffff, sonypi_releaseev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x38, SONYPI_LID_MASK, sonypi_lidev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x11, SONYPI_JOGGER_MASK, sonypi_joggerev
},
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x61, SONYPI_CAPTURE_MASK,
sonypi_captureev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_FNKEY_MASK, sonypi_fnkeyev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_BLUETOOTH_MASK, sonypi_blueev
},
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x08, SONYPI_PKEY_MASK, sonypi_pkeyev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x11, SONYPI_BACK_MASK, sonypi_backev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x08, SONYPI_HELP_MASK, sonypi_helpev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_HELP_MASK, sonypi_helpev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_ZOOM_MASK, sonypi_zoomev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x20, SONYPI_THUMBPHRASE_MASK,
sonypi_thumbphraseev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_MEMORYSTICK_MASK,
sonypi_memorystickev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x41, SONYPI_BATTERY_MASK,
sonypi_batteryev },
+ { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_PKEY_MASK, sonypi_pkeyev },
+
+ { 0 }
+};
+
+#define SONYPI_BUF_SIZE 128
+
+/* The name of the devices for the input device drivers */
+#define SONYPI_JOG_INPUTNAME "Sony Vaio Jogdial"
+#define SONYPI_KEY_INPUTNAME "Sony Vaio Keys"
+
+/* Correspondance table between sonypi events and input layer events */
+static struct {
+ int sonypiev;
+ int inputev;
+} sonypi_inputkeys[] = {
+ { SONYPI_EVENT_CAPTURE_PRESSED, KEY_CAMERA },
+ { SONYPI_EVENT_FNKEY_ONLY, KEY_FN },
+ { SONYPI_EVENT_FNKEY_ESC, KEY_FN_ESC },
+ { SONYPI_EVENT_FNKEY_F1, KEY_FN_F1 },
+ { SONYPI_EVENT_FNKEY_F2, KEY_FN_F2 },
+ { SONYPI_EVENT_FNKEY_F3, KEY_FN_F3 },
+ { SONYPI_EVENT_FNKEY_F4, KEY_FN_F4 },
+ { SONYPI_EVENT_FNKEY_F5, KEY_FN_F5 },
+ { SONYPI_EVENT_FNKEY_F6, KEY_FN_F6 },
+ { SONYPI_EVENT_FNKEY_F7, KEY_FN_F7 },
+ { SONYPI_EVENT_FNKEY_F8, KEY_FN_F8 },
+ { SONYPI_EVENT_FNKEY_F9, KEY_FN_F9 },
+ { SONYPI_EVENT_FNKEY_F10, KEY_FN_F10 },
+ { SONYPI_EVENT_FNKEY_F11, KEY_FN_F11 },
+ { SONYPI_EVENT_FNKEY_F12, KEY_FN_F12 },
+ { SONYPI_EVENT_FNKEY_1, KEY_FN_1 },
+ { SONYPI_EVENT_FNKEY_2, KEY_FN_2 },
+ { SONYPI_EVENT_FNKEY_D, KEY_FN_D },
+ { SONYPI_EVENT_FNKEY_E, KEY_FN_E },
+ { SONYPI_EVENT_FNKEY_F, KEY_FN_F },
+ { SONYPI_EVENT_FNKEY_S, KEY_FN_S },
+ { SONYPI_EVENT_FNKEY_B, KEY_FN_B },
+ { SONYPI_EVENT_BLUETOOTH_PRESSED, KEY_BLUE },
+ { SONYPI_EVENT_BLUETOOTH_ON, KEY_BLUE },
+ { SONYPI_EVENT_PKEY_P1, KEY_PROG1 },
+ { SONYPI_EVENT_PKEY_P2, KEY_PROG2 },
+ { SONYPI_EVENT_PKEY_P3, KEY_PROG3 },
+ { SONYPI_EVENT_BACK_PRESSED, KEY_BACK },
+ { SONYPI_EVENT_HELP_PRESSED, KEY_HELP },
+ { SONYPI_EVENT_ZOOM_PRESSED, KEY_ZOOM },
+ { SONYPI_EVENT_THUMBPHRASE_PRESSED, BTN_THUMB },
+ { 0, 0 },
+};
+
+static struct sonypi_device {
+ struct pci_dev *dev;
+ struct platform_device *pdev;
+ u16 irq;
+ u16 bits;
+ u16 ioport1;
+ u16 ioport2;
+ u16 region_size;
+ u16 evtype_offset;
+ int camera_power;
+ int bluetooth_power;
+ struct semaphore lock;
+ struct kfifo *fifo;
+ spinlock_t fifo_lock;
+ wait_queue_head_t fifo_proc_list;
+ struct fasync_struct *fifo_async;
+ int open_count;
+ int model;
+ struct input_dev input_jog_dev;
+ struct input_dev input_key_dev;
+ struct work_struct input_work;
+ struct kfifo *input_fifo;
+ spinlock_t input_fifo_lock;
+} sonypi_device;
+
+#define ITERATIONS_LONG 10000
+#define ITERATIONS_SHORT 10
+
+#define wait_on_command(quiet, command, iterations) { \
+ unsigned int n = iterations; \
+ while (--n && (command)) \
+ udelay(1); \
+ if (!n && (verbose || !quiet)) \
+ printk(KERN_WARNING "sonypi command failed at %s : %s (line
%d)\n", __FILE__, __FUNCTION__, __LINE__); \
+}
+
+#ifdef CONFIG_ACPI
+#define SONYPI_ACPI_ACTIVE (!acpi_disabled)
+#else
+#define SONYPI_ACPI_ACTIVE 0
+#endif /* CONFIG_ACPI */
static int sonypi_ec_write(u8 addr, u8 value)
{
@@ -286,17 +673,14 @@
for (j = 5; j > 0; j--) {
- while (sonypi_call2(0x91, 0x1)) {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- }
+ while (sonypi_call2(0x91, 0x1))
+ msleep(10);
sonypi_call1(0x93);
for (i = 400; i > 0; i--) {
if (sonypi_camera_ready())
break;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ msleep(10);
}
if (i)
break;
@@ -631,6 +1015,32 @@
}
sonypi_setbluetoothpower(val8);
break;
+ /* FAN Controls */
+ case SONYPI_IOCGFAN:
+ if (sonypi_ec_read(SONYPI_FAN0_STATUS, &val8)) {
+ ret = -EIO;
+ break;
+ }
+ if (copy_to_user((u8 *)arg, &val8, sizeof(val8)))
+ ret = -EFAULT;
+ break;
+ case SONYPI_IOCSFAN:
+ if (copy_from_user(&val8, (u8 *)arg, sizeof(val8))) {
+ ret = -EFAULT;
+ break;
+ }
+ if (sonypi_ec_write(SONYPI_FAN0_STATUS, val8))
+ ret = -EIO;
+ break;
+ /* GET Temperature (useful under APM) */
+ case SONYPI_IOCGTEMP:
+ if (sonypi_ec_read(SONYPI_TEMP_STATUS, &val8)) {
+ ret = -EIO;
+ break;
+ }
+ if (copy_to_user((u8 *)arg, &val8, sizeof(val8)))
+ ret = -EFAULT;
+ break;
default:
ret = -EINVAL;
}
@@ -648,8 +1058,8 @@
.ioctl = sonypi_misc_ioctl,
};
-struct miscdevice sonypi_misc_device = {
- .minor = -1,
+static struct miscdevice sonypi_misc_device = {
+ .minor = MISC_DYNAMIC_MINOR,
.name = "sonypi",
.fops = &sonypi_misc_fops,
};
@@ -758,7 +1168,8 @@
goto out_pcienable;
}
- sonypi_misc_device.minor = (minor == -1) ? MISC_DYNAMIC_MINOR : minor;
+ if (minor != -1)
+ sonypi_misc_device.minor = minor;
if ((ret = misc_register(&sonypi_misc_device))) {
printk(KERN_ERR "sonypi: misc_register failed\n");
goto out_miscreg;
diff -urN linux/drivers/char/tty_io.c linux/drivers/char/tty_io.c
--- linux/drivers/char/tty_io.c 2005/02/07 02:54:43 1.129
+++ linux/drivers/char/tty_io.c 2005/02/13 20:16:21 1.130
@@ -1156,8 +1156,8 @@
int i = index + driver->name_base;
/* ->name is initialized to "ttyp", but "tty" is expected */
sprintf(p, "%s%c%x",
- driver->subtype == PTY_TYPE_SLAVE ? "pty" : driver->name,
- ptychar[i >> 4 & 0xf], i & 0xf);
+ driver->subtype == PTY_TYPE_SLAVE ? "tty" :
driver->name,
+ ptychar[i >> 4 & 0xf], i & 0xf);
}
static inline void tty_line_name(struct tty_driver *driver, int index, char *p)
diff -urN linux/drivers/char/sonypi.h linux/drivers/char/sonypi.h
--- linux/drivers/char/Attic/sonypi.h Sun Feb 13 20:16:21 2005 1.23
+++ linux/drivers/char/Attic/sonypi.h 1970/01/01 00:00:002002
@@ -1,431 +0,0 @@
-/*
- * Sony Programmable I/O Control Device driver for VAIO
- *
- * Copyright (C) 2001-2004 Stelian Pop <stelian@popies.net>
- *
- * Copyright (C) 2001-2002 Alcôve <www.alcove.com>
- *
- * Copyright (C) 2001 Michael Ashley <m.ashley@unsw.edu.au>
- *
- * Copyright (C) 2001 Junichi Morita <jun1m@mars.dti.ne.jp>
- *
- * Copyright (C) 2000 Takaya Kinjo <t-kinjo@tc4.so-net.ne.jp>
- *
- * Copyright (C) 2000 Andrew Tridgell <tridge@valinux.com>
- *
- * Earlier work by Werner Almesberger, Paul `Rusty' Russell and Paul Mackerras.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#ifndef _SONYPI_PRIV_H_
-#define _SONYPI_PRIV_H_
-
-#ifdef __KERNEL__
-
-#define SONYPI_DRIVER_VERSION "1.25"
-
-#define SONYPI_DEVICE_MODEL_TYPE1 1
-#define SONYPI_DEVICE_MODEL_TYPE2 2
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/input.h>
-#include <linux/acpi.h>
-#include <linux/kfifo.h>
-#include <linux/sonypi.h>
-
-/* type1 models use those */
-#define SONYPI_IRQ_PORT 0x8034
-#define SONYPI_IRQ_SHIFT 22
-#define SONYPI_BASE 0x50
-#define SONYPI_G10A (SONYPI_BASE+0x14)
-#define SONYPI_TYPE1_REGION_SIZE 0x08
-#define SONYPI_TYPE1_EVTYPE_OFFSET 0x04
-
-/* type2 series specifics */
-#define SONYPI_SIRQ 0x9b
-#define SONYPI_SLOB 0x9c
-#define SONYPI_SHIB 0x9d
-#define SONYPI_TYPE2_REGION_SIZE 0x20
-#define SONYPI_TYPE2_EVTYPE_OFFSET 0x12
-
-/* battery / brightness addresses */
-#define SONYPI_BAT_FLAGS 0x81
-#define SONYPI_LCD_LIGHT 0x96
-#define SONYPI_BAT1_PCTRM 0xa0
-#define SONYPI_BAT1_LEFT 0xa2
-#define SONYPI_BAT1_MAXRT 0xa4
-#define SONYPI_BAT2_PCTRM 0xa8
-#define SONYPI_BAT2_LEFT 0xaa
-#define SONYPI_BAT2_MAXRT 0xac
-#define SONYPI_BAT1_MAXTK 0xb0
-#define SONYPI_BAT1_FULL 0xb2
-#define SONYPI_BAT2_MAXTK 0xb8
-#define SONYPI_BAT2_FULL 0xba
-
-/* ioports used for brightness and type2 events */
-#define SONYPI_DATA_IOPORT 0x62
-#define SONYPI_CST_IOPORT 0x66
-
-/* The set of possible ioports */
-struct sonypi_ioport_list {
- u16 port1;
- u16 port2;
-};
-
-static struct sonypi_ioport_list sonypi_type1_ioport_list[] = {
- { 0x10c0, 0x10c4 }, /* looks like the default on C1Vx */
- { 0x1080, 0x1084 },
- { 0x1090, 0x1094 },
- { 0x10a0, 0x10a4 },
- { 0x10b0, 0x10b4 },
- { 0x0, 0x0 }
-};
-
-static struct sonypi_ioport_list sonypi_type2_ioport_list[] = {
- { 0x1080, 0x1084 },
- { 0x10a0, 0x10a4 },
- { 0x10c0, 0x10c4 },
- { 0x10e0, 0x10e4 },
- { 0x0, 0x0 }
-};
-
-/* The set of possible interrupts */
-struct sonypi_irq_list {
- u16 irq;
- u16 bits;
-};
-
-static struct sonypi_irq_list sonypi_type1_irq_list[] = {
- { 11, 0x2 }, /* IRQ 11, GO22=0,GO23=1 in AML */
- { 10, 0x1 }, /* IRQ 10, GO22=1,GO23=0 in AML */
- { 5, 0x0 }, /* IRQ 5, GO22=0,GO23=0 in AML */
- { 0, 0x3 } /* no IRQ, GO22=1,GO23=1 in AML */
-};
-
-static struct sonypi_irq_list sonypi_type2_irq_list[] = {
- { 11, 0x80 }, /* IRQ 11, 0x80 in SIRQ in AML */
- { 10, 0x40 }, /* IRQ 10, 0x40 in SIRQ in AML */
- { 9, 0x20 }, /* IRQ 9, 0x20 in SIRQ in AML */
- { 6, 0x10 }, /* IRQ 6, 0x10 in SIRQ in AML */
- { 0, 0x00 } /* no IRQ, 0x00 in SIRQ in AML */
-};
-
-#define SONYPI_CAMERA_BRIGHTNESS 0
-#define SONYPI_CAMERA_CONTRAST 1
-#define SONYPI_CAMERA_HUE 2
-#define SONYPI_CAMERA_COLOR 3
-#define SONYPI_CAMERA_SHARPNESS 4
-
-#define SONYPI_CAMERA_PICTURE 5
-#define SONYPI_CAMERA_EXPOSURE_MASK 0xC
-#define SONYPI_CAMERA_WHITE_BALANCE_MASK 0x3
-#define SONYPI_CAMERA_PICTURE_MODE_MASK 0x30
-#define SONYPI_CAMERA_MUTE_MASK 0x40
-
-/* the rest don't need a loop until not 0xff */
-#define SONYPI_CAMERA_AGC 6
-#define SONYPI_CAMERA_AGC_MASK 0x30
-#define SONYPI_CAMERA_SHUTTER_MASK 0x7
-
-#define SONYPI_CAMERA_SHUTDOWN_REQUEST 7
-#define SONYPI_CAMERA_CONTROL 0x10
-
-#define SONYPI_CAMERA_STATUS 7
-#define SONYPI_CAMERA_STATUS_READY 0x2
-#define SONYPI_CAMERA_STATUS_POSITION 0x4
-
-#define SONYPI_DIRECTION_BACKWARDS 0x4
-
-#define SONYPI_CAMERA_REVISION 8
-#define SONYPI_CAMERA_ROMVERSION 9
-
-/* Event masks */
-#define SONYPI_JOGGER_MASK 0x00000001
-#define SONYPI_CAPTURE_MASK 0x00000002
-#define SONYPI_FNKEY_MASK 0x00000004
-#define SONYPI_BLUETOOTH_MASK 0x00000008
-#define SONYPI_PKEY_MASK 0x00000010
-#define SONYPI_BACK_MASK 0x00000020
-#define SONYPI_HELP_MASK 0x00000040
-#define SONYPI_LID_MASK 0x00000080
-#define SONYPI_ZOOM_MASK 0x00000100
-#define SONYPI_THUMBPHRASE_MASK 0x00000200
-#define SONYPI_MEYE_MASK 0x00000400
-#define SONYPI_MEMORYSTICK_MASK 0x00000800
-#define SONYPI_BATTERY_MASK 0x00001000
-
-struct sonypi_event {
- u8 data;
- u8 event;
-};
-
-/* The set of possible button release events */
-static struct sonypi_event sonypi_releaseev[] = {
- { 0x00, SONYPI_EVENT_ANYBUTTON_RELEASED },
- { 0, 0 }
-};
-
-/* The set of possible jogger events */
-static struct sonypi_event sonypi_joggerev[] = {
- { 0x1f, SONYPI_EVENT_JOGDIAL_UP },
- { 0x01, SONYPI_EVENT_JOGDIAL_DOWN },
- { 0x5f, SONYPI_EVENT_JOGDIAL_UP_PRESSED },
- { 0x41, SONYPI_EVENT_JOGDIAL_DOWN_PRESSED },
- { 0x1e, SONYPI_EVENT_JOGDIAL_FAST_UP },
- { 0x02, SONYPI_EVENT_JOGDIAL_FAST_DOWN },
- { 0x5e, SONYPI_EVENT_JOGDIAL_FAST_UP_PRESSED },
- { 0x42, SONYPI_EVENT_JOGDIAL_FAST_DOWN_PRESSED },
- { 0x1d, SONYPI_EVENT_JOGDIAL_VFAST_UP },
- { 0x03, SONYPI_EVENT_JOGDIAL_VFAST_DOWN },
- { 0x5d, SONYPI_EVENT_JOGDIAL_VFAST_UP_PRESSED },
- { 0x43, SONYPI_EVENT_JOGDIAL_VFAST_DOWN_PRESSED },
- { 0x40, SONYPI_EVENT_JOGDIAL_PRESSED },
- { 0, 0 }
-};
-
-/* The set of possible capture button events */
-static struct sonypi_event sonypi_captureev[] = {
- { 0x05, SONYPI_EVENT_CAPTURE_PARTIALPRESSED },
- { 0x07, SONYPI_EVENT_CAPTURE_PRESSED },
- { 0x01, SONYPI_EVENT_CAPTURE_PARTIALRELEASED },
- { 0, 0 }
-};
-
-/* The set of possible fnkeys events */
-static struct sonypi_event sonypi_fnkeyev[] = {
- { 0x10, SONYPI_EVENT_FNKEY_ESC },
- { 0x11, SONYPI_EVENT_FNKEY_F1 },
- { 0x12, SONYPI_EVENT_FNKEY_F2 },
- { 0x13, SONYPI_EVENT_FNKEY_F3 },
- { 0x14, SONYPI_EVENT_FNKEY_F4 },
- { 0x15, SONYPI_EVENT_FNKEY_F5 },
- { 0x16, SONYPI_EVENT_FNKEY_F6 },
- { 0x17, SONYPI_EVENT_FNKEY_F7 },
- { 0x18, SONYPI_EVENT_FNKEY_F8 },
- { 0x19, SONYPI_EVENT_FNKEY_F9 },
- { 0x1a, SONYPI_EVENT_FNKEY_F10 },
- { 0x1b, SONYPI_EVENT_FNKEY_F11 },
- { 0x1c, SONYPI_EVENT_FNKEY_F12 },
- { 0x1f, SONYPI_EVENT_FNKEY_RELEASED },
- { 0x21, SONYPI_EVENT_FNKEY_1 },
- { 0x22, SONYPI_EVENT_FNKEY_2 },
- { 0x31, SONYPI_EVENT_FNKEY_D },
- { 0x32, SONYPI_EVENT_FNKEY_E },
- { 0x33, SONYPI_EVENT_FNKEY_F },
- { 0x34, SONYPI_EVENT_FNKEY_S },
- { 0x35, SONYPI_EVENT_FNKEY_B },
- { 0x36, SONYPI_EVENT_FNKEY_ONLY },
- { 0, 0 }
-};
-
-/* The set of possible program key events */
-static struct sonypi_event sonypi_pkeyev[] = {
- { 0x01, SONYPI_EVENT_PKEY_P1 },
- { 0x02, SONYPI_EVENT_PKEY_P2 },
- { 0x04, SONYPI_EVENT_PKEY_P3 },
- { 0x5c, SONYPI_EVENT_PKEY_P1 },
- { 0, 0 }
-};
-
-/* The set of possible bluetooth events */
-static struct sonypi_event sonypi_blueev[] = {
- { 0x55, SONYPI_EVENT_BLUETOOTH_PRESSED },
- { 0x59, SONYPI_EVENT_BLUETOOTH_ON },
- { 0x5a, SONYPI_EVENT_BLUETOOTH_OFF },
- { 0, 0 }
-};
-
-/* The set of possible back button events */
-static struct sonypi_event sonypi_backev[] = {
- { 0x20, SONYPI_EVENT_BACK_PRESSED },
- { 0, 0 }
-};
-
-/* The set of possible help button events */
-static struct sonypi_event sonypi_helpev[] = {
- { 0x3b, SONYPI_EVENT_HELP_PRESSED },
- { 0, 0 }
-};
-
-
-/* The set of possible lid events */
-static struct sonypi_event sonypi_lidev[] = {
- { 0x51, SONYPI_EVENT_LID_CLOSED },
- { 0x50, SONYPI_EVENT_LID_OPENED },
- { 0, 0 }
-};
-
-/* The set of possible zoom events */
-static struct sonypi_event sonypi_zoomev[] = {
- { 0x39, SONYPI_EVENT_ZOOM_PRESSED },
- { 0, 0 }
-};
-
-/* The set of possible thumbphrase events */
-static struct sonypi_event sonypi_thumbphraseev[] = {
- { 0x3a, SONYPI_EVENT_THUMBPHRASE_PRESSED },
- { 0, 0 }
-};
-
-/* The set of possible motioneye camera events */
-static struct sonypi_event sonypi_meyeev[] = {
- { 0x00, SONYPI_EVENT_MEYE_FACE },
- { 0x01, SONYPI_EVENT_MEYE_OPPOSITE },
- { 0, 0 }
-};
-
-/* The set of possible memorystick events */
-static struct sonypi_event sonypi_memorystickev[] = {
- { 0x53, SONYPI_EVENT_MEMORYSTICK_INSERT },
- { 0x54, SONYPI_EVENT_MEMORYSTICK_EJECT },
- { 0, 0 }
-};
-
-/* The set of possible battery events */
-static struct sonypi_event sonypi_batteryev[] = {
- { 0x20, SONYPI_EVENT_BATTERY_INSERT },
- { 0x30, SONYPI_EVENT_BATTERY_REMOVE },
- { 0, 0 }
-};
-
-struct sonypi_eventtypes {
- int model;
- u8 data;
- unsigned long mask;
- struct sonypi_event * events;
-} sonypi_eventtypes[] = {
- { SONYPI_DEVICE_MODEL_TYPE1, 0, 0xffffffff, sonypi_releaseev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x70, SONYPI_MEYE_MASK, sonypi_meyeev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_LID_MASK, sonypi_lidev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x60, SONYPI_CAPTURE_MASK,
sonypi_captureev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x10, SONYPI_JOGGER_MASK, sonypi_joggerev
},
- { SONYPI_DEVICE_MODEL_TYPE1, 0x20, SONYPI_FNKEY_MASK, sonypi_fnkeyev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_BLUETOOTH_MASK, sonypi_blueev
},
- { SONYPI_DEVICE_MODEL_TYPE1, 0x40, SONYPI_PKEY_MASK, sonypi_pkeyev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_MEMORYSTICK_MASK,
sonypi_memorystickev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x40, SONYPI_BATTERY_MASK,
sonypi_batteryev },
-
- { SONYPI_DEVICE_MODEL_TYPE2, 0, 0xffffffff, sonypi_releaseev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x38, SONYPI_LID_MASK, sonypi_lidev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x11, SONYPI_JOGGER_MASK, sonypi_joggerev
},
- { SONYPI_DEVICE_MODEL_TYPE2, 0x61, SONYPI_CAPTURE_MASK,
sonypi_captureev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_FNKEY_MASK, sonypi_fnkeyev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_BLUETOOTH_MASK, sonypi_blueev
},
- { SONYPI_DEVICE_MODEL_TYPE2, 0x08, SONYPI_PKEY_MASK, sonypi_pkeyev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x11, SONYPI_BACK_MASK, sonypi_backev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x08, SONYPI_HELP_MASK, sonypi_helpev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_ZOOM_MASK, sonypi_zoomev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x20, SONYPI_THUMBPHRASE_MASK,
sonypi_thumbphraseev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_MEMORYSTICK_MASK,
sonypi_memorystickev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x41, SONYPI_BATTERY_MASK,
sonypi_batteryev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_PKEY_MASK, sonypi_pkeyev },
-
- { 0 }
-};
-
-#define SONYPI_BUF_SIZE 128
-
-/* The name of the devices for the input device drivers */
-#define SONYPI_JOG_INPUTNAME "Sony Vaio Jogdial"
-#define SONYPI_KEY_INPUTNAME "Sony Vaio Keys"
-
-/* Correspondance table between sonypi events and input layer events */
-struct {
- int sonypiev;
- int inputev;
-} sonypi_inputkeys[] = {
- { SONYPI_EVENT_CAPTURE_PRESSED, KEY_CAMERA },
- { SONYPI_EVENT_FNKEY_ONLY, KEY_FN },
- { SONYPI_EVENT_FNKEY_ESC, KEY_FN_ESC },
- { SONYPI_EVENT_FNKEY_F1, KEY_FN_F1 },
- { SONYPI_EVENT_FNKEY_F2, KEY_FN_F2 },
- { SONYPI_EVENT_FNKEY_F3, KEY_FN_F3 },
- { SONYPI_EVENT_FNKEY_F4, KEY_FN_F4 },
- { SONYPI_EVENT_FNKEY_F5, KEY_FN_F5 },
- { SONYPI_EVENT_FNKEY_F6, KEY_FN_F6 },
- { SONYPI_EVENT_FNKEY_F7, KEY_FN_F7 },
- { SONYPI_EVENT_FNKEY_F8, KEY_FN_F8 },
- { SONYPI_EVENT_FNKEY_F9, KEY_FN_F9 },
- { SONYPI_EVENT_FNKEY_F10, KEY_FN_F10 },
- { SONYPI_EVENT_FNKEY_F11, KEY_FN_F11 },
- { SONYPI_EVENT_FNKEY_F12, KEY_FN_F12 },
- { SONYPI_EVENT_FNKEY_1, KEY_FN_1 },
- { SONYPI_EVENT_FNKEY_2, KEY_FN_2 },
- { SONYPI_EVENT_FNKEY_D, KEY_FN_D },
- { SONYPI_EVENT_FNKEY_E, KEY_FN_E },
- { SONYPI_EVENT_FNKEY_F, KEY_FN_F },
- { SONYPI_EVENT_FNKEY_S, KEY_FN_S },
- { SONYPI_EVENT_FNKEY_B, KEY_FN_B },
- { SONYPI_EVENT_BLUETOOTH_PRESSED, KEY_BLUE },
- { SONYPI_EVENT_BLUETOOTH_ON, KEY_BLUE },
- { SONYPI_EVENT_PKEY_P1, KEY_PROG1 },
- { SONYPI_EVENT_PKEY_P2, KEY_PROG2 },
- { SONYPI_EVENT_PKEY_P3, KEY_PROG3 },
- { SONYPI_EVENT_BACK_PRESSED, KEY_BACK },
- { SONYPI_EVENT_HELP_PRESSED, KEY_HELP },
- { SONYPI_EVENT_ZOOM_PRESSED, KEY_ZOOM },
- { SONYPI_EVENT_THUMBPHRASE_PRESSED, BTN_THUMB },
- { 0, 0 },
-};
-
-struct sonypi_device {
- struct pci_dev *dev;
- struct platform_device *pdev;
- u16 irq;
- u16 bits;
- u16 ioport1;
- u16 ioport2;
- u16 region_size;
- u16 evtype_offset;
- int camera_power;
- int bluetooth_power;
- struct semaphore lock;
- struct kfifo *fifo;
- spinlock_t fifo_lock;
- wait_queue_head_t fifo_proc_list;
- struct fasync_struct *fifo_async;
- int open_count;
- int model;
- struct input_dev input_jog_dev;
- struct input_dev input_key_dev;
- struct work_struct input_work;
- struct kfifo *input_fifo;
- spinlock_t input_fifo_lock;
-};
-
-#define ITERATIONS_LONG 10000
-#define ITERATIONS_SHORT 10
-
-#define wait_on_command(quiet, command, iterations) { \
- unsigned int n = iterations; \
- while (--n && (command)) \
- udelay(1); \
- if (!n && (verbose || !quiet)) \
- printk(KERN_WARNING "sonypi command failed at %s : %s (line
%d)\n", __FILE__, __FUNCTION__, __LINE__); \
-}
-
-#ifdef CONFIG_ACPI
-#define SONYPI_ACPI_ACTIVE (!acpi_disabled)
-#else
-#define SONYPI_ACPI_ACTIVE 0
-#endif /* CONFIG_ACPI */
-
-#endif /* __KERNEL__ */
-
-#endif /* _SONYPI_PRIV_H_ */
diff -urN linux/drivers/char/agp/intel-agp.c linux/drivers/char/agp/intel-agp.c
--- linux/drivers/char/agp/intel-agp.c 2005/01/25 04:28:13 1.27
+++ linux/drivers/char/agp/intel-agp.c 2005/02/13 20:16:21 1.28
@@ -1748,12 +1748,16 @@
if (bridge->driver == &intel_generic_driver)
intel_configure();
+ else if (bridge->driver == &intel_850_driver)
+ intel_850_configure();
else if (bridge->driver == &intel_845_driver)
intel_845_configure();
else if (bridge->driver == &intel_830mp_driver)
intel_830mp_configure();
else if (bridge->driver == &intel_915_driver)
intel_i915_configure();
+ else if (bridge->driver == &intel_830_driver)
+ intel_i830_configure();
return 0;
}
diff -urN linux/drivers/char/drm/drm_drv.c linux/drivers/char/drm/drm_drv.c
--- linux/drivers/char/drm/drm_drv.c 2005/02/07 02:54:44 1.2
+++ linux/drivers/char/drm/drm_drv.c 2005/02/13 20:16:21 1.3
@@ -516,7 +516,7 @@
if (nr < DRIVER_IOCTL_COUNT)
ioctl = &drm_ioctls[nr];
- else if ((nr >= DRM_COMMAND_BASE) || (nr < DRM_COMMAND_BASE +
dev->driver->num_ioctls))
+ else if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_BASE +
dev->driver->num_ioctls))
ioctl = &dev->driver->ioctls[nr - DRM_COMMAND_BASE];
else
goto err_i1;
diff -urN linux/drivers/char/drm/drm_os_linux.h
linux/drivers/char/drm/drm_os_linux.h
--- linux/drivers/char/drm/drm_os_linux.h 2005/01/13 14:05:54 1.14
+++ linux/drivers/char/drm/drm_os_linux.h 2005/02/13 20:16:21 1.15
@@ -96,9 +96,6 @@
__copy_to_user(arg1, arg2, arg3)
#define DRM_GET_USER_UNCHECKED(val, uaddr) \
__get_user(val, uaddr)
-#define DRM_PUT_USER_UNCHECKED(uaddr, val) \
- __put_user(val, uaddr)
-
#define DRM_GET_PRIV_WITH_RETURN(_priv, _filp) _priv = _filp->private_data
diff -urN linux/drivers/char/drm/radeon_drv.h
linux/drivers/char/drm/radeon_drv.h
--- linux/drivers/char/drm/radeon_drv.h 2005/02/07 02:54:44 1.22
+++ linux/drivers/char/drm/radeon_drv.h 2005/02/13 20:16:21 1.23
@@ -1027,25 +1027,27 @@
} while (0)
-#define OUT_RING_USER_TABLE( tab, sz ) do { \
+#define OUT_RING_TABLE( tab, sz ) do { \
int _size = (sz); \
- int __user *_tab = (tab); \
+ int *_tab = (int *)(tab); \
\
if (write + _size > mask) { \
- int i = (mask+1) - write; \
- if (DRM_COPY_FROM_USER_UNCHECKED( (int *)(ring+write), \
- _tab, i*4 )) \
- return DRM_ERR(EFAULT); \
+ int _i = (mask+1) - write; \
+ _size -= _i; \
+ while (_i > 0 ) { \
+ *(int *)(ring + write) = *_tab++; \
+ write++; \
+ _i--; \
+ } \
write = 0; \
- _size -= i; \
- _tab += i; \
+ _tab += _i; \
} \
\
- if (_size && DRM_COPY_FROM_USER_UNCHECKED( (int *)(ring+write), \
- _tab, _size*4 )) \
- return DRM_ERR(EFAULT); \
- \
- write += _size; \
+ while (_size > 0) { \
+ *(ring + write) = *_tab++; \
+ write++; \
+ _size--; \
+ } \
write &= mask; \
} while (0)
diff -urN linux/drivers/char/drm/radeon_state.c
linux/drivers/char/drm/radeon_state.c
--- linux/drivers/char/drm/radeon_state.c 2005/02/07 02:54:44 1.23
+++ linux/drivers/char/drm/radeon_state.c 2005/02/13 20:16:21 1.24
@@ -93,21 +93,6 @@
return 0;
}
-static __inline__ int radeon_check_and_fixup_offset_user( drm_radeon_private_t
*dev_priv,
- drm_file_t *filp_priv,
- u32 __user *offset ) {
- u32 off;
-
- DRM_GET_USER_UNCHECKED( off, offset );
-
- if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, &off ) )
- return DRM_ERR( EINVAL );
-
- DRM_PUT_USER_UNCHECKED( offset, off );
-
- return 0;
-}
-
static __inline__ int radeon_check_and_fixup_packets( drm_radeon_private_t
*dev_priv,
drm_file_t *filp_priv,
int id,
@@ -115,18 +100,18 @@
switch ( id ) {
case RADEON_EMIT_PP_MISC:
- if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv,
- &data[(
RADEON_RB3D_DEPTHOFFSET
- -
RADEON_PP_MISC ) / 4] ) ) {
+ if ( radeon_check_and_fixup_offset( dev_priv, filp_priv,
+ &data[(
RADEON_RB3D_DEPTHOFFSET
+ - RADEON_PP_MISC )
/ 4] ) ) {
DRM_ERROR( "Invalid depth buffer offset\n" );
return DRM_ERR( EINVAL );
}
break;
case RADEON_EMIT_PP_CNTL:
- if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv,
- &data[(
RADEON_RB3D_COLOROFFSET
- -
RADEON_PP_CNTL ) / 4] ) ) {
+ if ( radeon_check_and_fixup_offset( dev_priv, filp_priv,
+ &data[(
RADEON_RB3D_COLOROFFSET
+ - RADEON_PP_CNTL )
/ 4] ) ) {
DRM_ERROR( "Invalid colour buffer offset\n" );
return DRM_ERR( EINVAL );
}
@@ -138,8 +123,8 @@
case R200_EMIT_PP_TXOFFSET_3:
case R200_EMIT_PP_TXOFFSET_4:
case R200_EMIT_PP_TXOFFSET_5:
- if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv,
- &data[0] ) ) {
+ if ( radeon_check_and_fixup_offset( dev_priv, filp_priv,
+ &data[0] ) ) {
DRM_ERROR( "Invalid R200 texture offset\n" );
return DRM_ERR( EINVAL );
}
@@ -148,9 +133,9 @@
case RADEON_EMIT_PP_TXFILTER_0:
case RADEON_EMIT_PP_TXFILTER_1:
case RADEON_EMIT_PP_TXFILTER_2:
- if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv,
- &data[(
RADEON_PP_TXOFFSET_0
- -
RADEON_PP_TXFILTER_0 ) / 4] ) ) {
+ if ( radeon_check_and_fixup_offset( dev_priv, filp_priv,
+ &data[( RADEON_PP_TXOFFSET_0
+ -
RADEON_PP_TXFILTER_0 ) / 4] ) ) {
DRM_ERROR( "Invalid R100 texture offset\n" );
return DRM_ERR( EINVAL );
}
@@ -164,9 +149,8 @@
case R200_EMIT_PP_CUBIC_OFFSETS_5: {
int i;
for ( i = 0; i < 5; i++ ) {
- if ( radeon_check_and_fixup_offset_user( dev_priv,
- filp_priv,
- &data[i] ) ) {
+ if ( radeon_check_and_fixup_offset( dev_priv, filp_priv,
+ &data[i] ) ) {
DRM_ERROR( "Invalid R200 cubic texture
offset\n" );
return DRM_ERR( EINVAL );
}
@@ -250,17 +234,11 @@
drm_file_t *filp_priv,
drm_radeon_cmd_buffer_t
*cmdbuf,
unsigned int *cmdsz ) {
- u32 tmp[4];
- u32 __user *cmd = (u32 __user *)cmdbuf->buf;
-
- if ( DRM_COPY_FROM_USER_UNCHECKED( tmp, cmd, sizeof( tmp ) ) ) {
- DRM_ERROR( "Failed to copy data from user space\n" );
- return DRM_ERR( EFAULT );
- }
+ u32 *cmd = (u32 *) cmdbuf->buf;
- *cmdsz = 2 + ( ( tmp[0] & RADEON_CP_PACKET_COUNT_MASK ) >> 16 );
+ *cmdsz = 2 + ( ( cmd[0] & RADEON_CP_PACKET_COUNT_MASK ) >> 16 );
- if ( ( tmp[0] & 0xc0000000 ) != RADEON_CP_PACKET3 ) {
+ if ( ( cmd[0] & 0xc0000000 ) != RADEON_CP_PACKET3 ) {
DRM_ERROR( "Not a type 3 packet\n" );
return DRM_ERR( EINVAL );
}
@@ -271,32 +249,27 @@
}
/* Check client state and fix it up if necessary */
- if ( tmp[0] & 0x8000 ) { /* MSB of opcode: next DWORD GUI_CNTL */
+ if ( cmd[0] & 0x8000 ) { /* MSB of opcode: next DWORD GUI_CNTL */
u32 offset;
- if ( tmp[1] & ( RADEON_GMC_SRC_PITCH_OFFSET_CNTL
+ if ( cmd[1] & ( RADEON_GMC_SRC_PITCH_OFFSET_CNTL
| RADEON_GMC_DST_PITCH_OFFSET_CNTL ) ) {
- offset = tmp[2] << 10;
+ offset = cmd[2] << 10;
if ( radeon_check_and_fixup_offset( dev_priv,
filp_priv, &offset ) ) {
DRM_ERROR( "Invalid first packet offset\n" );
return DRM_ERR( EINVAL );
}
- tmp[2] = ( tmp[2] & 0xffc00000 ) | offset >> 10;
+ cmd[2] = ( cmd[2] & 0xffc00000 ) | offset >> 10;
}
- if ( ( tmp[1] & RADEON_GMC_SRC_PITCH_OFFSET_CNTL ) &&
- ( tmp[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL ) ) {
- offset = tmp[3] << 10;
+ if ( ( cmd[1] & RADEON_GMC_SRC_PITCH_OFFSET_CNTL ) &&
+ ( cmd[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL ) ) {
+ offset = cmd[3] << 10;
if ( radeon_check_and_fixup_offset( dev_priv,
filp_priv, &offset ) ) {
DRM_ERROR( "Invalid second packet offset\n" );
return DRM_ERR( EINVAL );
}
- tmp[3] = ( tmp[3] & 0xffc00000 ) | offset >> 10;
- }
-
- if ( DRM_COPY_TO_USER_UNCHECKED( cmd, tmp, sizeof( tmp ) ) ) {
- DRM_ERROR( "Failed to copy data to user space\n" );
- return DRM_ERR( EFAULT );
+ cmd[3] = ( cmd[3] & 0xffc00000 ) | offset >> 10;
}
}
@@ -2473,7 +2446,7 @@
{
int id = (int)header.packet.packet_id;
int sz, reg;
- int __user *data = (int __user *)cmdbuf->buf;
+ int *data = (int *)cmdbuf->buf;
RING_LOCALS;
if (id >= RADEON_MAX_STATE_PACKETS)
@@ -2494,7 +2467,7 @@
BEGIN_RING(sz+1);
OUT_RING( CP_PACKET0( reg, (sz-1) ) );
- OUT_RING_USER_TABLE( data, sz );
+ OUT_RING_TABLE( data, sz );
ADVANCE_RING();
cmdbuf->buf += sz * sizeof(int);
@@ -2508,7 +2481,6 @@
drm_radeon_cmd_buffer_t *cmdbuf )
{
int sz = header.scalars.count;
- int __user *data = (int __user *)cmdbuf->buf;
int start = header.scalars.offset;
int stride = header.scalars.stride;
RING_LOCALS;
@@ -2517,7 +2489,7 @@
OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) );
OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT));
OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) );
- OUT_RING_USER_TABLE( data, sz );
+ OUT_RING_TABLE( cmdbuf->buf, sz );
ADVANCE_RING();
cmdbuf->buf += sz * sizeof(int);
cmdbuf->bufsz -= sz * sizeof(int);
@@ -2532,7 +2504,6 @@
drm_radeon_cmd_buffer_t *cmdbuf )
{
int sz = header.scalars.count;
- int __user *data = (int __user *)cmdbuf->buf;
int start = ((unsigned int)header.scalars.offset) + 0x100;
int stride = header.scalars.stride;
RING_LOCALS;
@@ -2541,7 +2512,7 @@
OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) );
OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT));
OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) );
- OUT_RING_USER_TABLE( data, sz );
+ OUT_RING_TABLE( cmdbuf->buf, sz );
ADVANCE_RING();
cmdbuf->buf += sz * sizeof(int);
cmdbuf->bufsz -= sz * sizeof(int);
@@ -2554,7 +2525,6 @@
drm_radeon_cmd_buffer_t *cmdbuf )
{
int sz = header.vectors.count;
- int __user *data = (int __user *)cmdbuf->buf;
int start = header.vectors.offset;
int stride = header.vectors.stride;
RING_LOCALS;
@@ -2563,7 +2533,7 @@
OUT_RING( CP_PACKET0( RADEON_SE_TCL_VECTOR_INDX_REG, 0 ) );
OUT_RING( start | (stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT));
OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_VECTOR_DATA_REG, (sz-1) ) );
- OUT_RING_USER_TABLE( data, sz );
+ OUT_RING_TABLE( cmdbuf->buf, sz );
ADVANCE_RING();
cmdbuf->buf += sz * sizeof(int);
@@ -2578,7 +2548,6 @@
{
drm_radeon_private_t *dev_priv = dev->dev_private;
unsigned int cmdsz;
- int __user *cmd = (int __user *)cmdbuf->buf;
int ret;
RING_LOCALS;
@@ -2591,7 +2560,7 @@
}
BEGIN_RING( cmdsz );
- OUT_RING_USER_TABLE( cmd, cmdsz );
+ OUT_RING_TABLE( cmdbuf->buf, cmdsz );
ADVANCE_RING();
cmdbuf->buf += cmdsz * 4;
@@ -2608,7 +2577,6 @@
drm_radeon_private_t *dev_priv = dev->dev_private;
drm_clip_rect_t box;
unsigned int cmdsz;
- int __user *cmd = (int __user *)cmdbuf->buf;
int ret;
drm_clip_rect_t __user *boxes = cmdbuf->boxes;
int i = 0;
@@ -2627,7 +2595,7 @@
do {
if ( i < cmdbuf->nbox ) {
- if (DRM_COPY_FROM_USER_UNCHECKED( &box, &boxes[i],
sizeof(box) ))
+ if (DRM_COPY_FROM_USER( &box, &boxes[i], sizeof(box) ))
return DRM_ERR(EFAULT);
/* FIXME The second and subsequent times round
* this loop, send a WAIT_UNTIL_3D_IDLE before
@@ -2650,7 +2618,7 @@
}
BEGIN_RING( cmdsz );
- OUT_RING_USER_TABLE( cmd, cmdsz );
+ OUT_RING_TABLE( cmdbuf->buf, cmdsz );
ADVANCE_RING();
} while ( ++i < cmdbuf->nbox );
@@ -2703,7 +2671,8 @@
int idx;
drm_radeon_cmd_buffer_t cmdbuf;
drm_radeon_cmd_header_t header;
- int orig_nbox;
+ int orig_nbox, orig_bufsz;
+ char *kbuf=NULL;
LOCK_TEST_WITH_RETURN( dev, filp );
@@ -2720,24 +2689,29 @@
RING_SPACE_TEST_WITH_RETURN( dev_priv );
VB_AGE_TEST_WITH_RETURN( dev_priv );
+ if (cmdbuf.bufsz > 64*1024 || cmdbuf.bufsz<0) {
+ return DRM_ERR(EINVAL);
+ }
- if (DRM_VERIFYAREA_READ( cmdbuf.buf, cmdbuf.bufsz ))
- return DRM_ERR(EFAULT);
-
- if (cmdbuf.nbox &&
- DRM_VERIFYAREA_READ(cmdbuf.boxes,
- cmdbuf.nbox * sizeof(drm_clip_rect_t)))
- return DRM_ERR(EFAULT);
+ /* Allocate an in-kernel area and copy in the cmdbuf. Do this to avoid
+ * races between checking values and using those values in other code,
+ * and simply to avoid a lot of function calls to copy in data.
+ */
+ orig_bufsz = cmdbuf.bufsz;
+ if (orig_bufsz != 0) {
+ kbuf = drm_alloc(cmdbuf.bufsz, DRM_MEM_DRIVER);
+ if (kbuf == NULL)
+ return DRM_ERR(ENOMEM);
+ if (DRM_COPY_FROM_USER(kbuf, cmdbuf.buf, cmdbuf.bufsz))
+ return DRM_ERR(EFAULT);
+ cmdbuf.buf = kbuf;
+ }
orig_nbox = cmdbuf.nbox;
while ( cmdbuf.bufsz >= sizeof(header) ) {
-
- if (DRM_GET_USER_UNCHECKED( header.i, (int __user *)cmdbuf.buf
)) {
- DRM_ERROR("__get_user %p\n", cmdbuf.buf);
- return DRM_ERR(EFAULT);
- }
+ header.i = *(int *)cmdbuf.buf;
cmdbuf.buf += sizeof(header);
cmdbuf.bufsz -= sizeof(header);
@@ -2746,7 +2720,7 @@
DRM_DEBUG("RADEON_CMD_PACKET\n");
if (radeon_emit_packets( dev_priv, filp_priv, header,
&cmdbuf )) {
DRM_ERROR("radeon_emit_packets failed\n");
- return DRM_ERR(EINVAL);
+ goto err;
}
break;
@@ -2754,7 +2728,7 @@
DRM_DEBUG("RADEON_CMD_SCALARS\n");
if (radeon_emit_scalars( dev_priv, header, &cmdbuf )) {
DRM_ERROR("radeon_emit_scalars failed\n");
- return DRM_ERR(EINVAL);
+ goto err;
}
break;
@@ -2762,7 +2736,7 @@
DRM_DEBUG("RADEON_CMD_VECTORS\n");
if (radeon_emit_vectors( dev_priv, header, &cmdbuf )) {
DRM_ERROR("radeon_emit_vectors failed\n");
- return DRM_ERR(EINVAL);
+ goto err;
}
break;
@@ -2772,14 +2746,14 @@
if ( idx < 0 || idx >= dma->buf_count ) {
DRM_ERROR( "buffer index %d (of %d max)\n",
idx, dma->buf_count - 1 );
- return DRM_ERR(EINVAL);
+ goto err;
}
buf = dma->buflist[idx];
if ( buf->filp != filp || buf->pending ) {
DRM_ERROR( "bad buffer %p %p %d\n",
buf->filp, filp, buf->pending);
- return DRM_ERR(EINVAL);
+ goto err;
}
radeon_cp_discard_buffer( dev, buf );
@@ -2789,7 +2763,7 @@
DRM_DEBUG("RADEON_CMD_PACKET3\n");
if (radeon_emit_packet3( dev, filp_priv, &cmdbuf )) {
DRM_ERROR("radeon_emit_packet3 failed\n");
- return DRM_ERR(EINVAL);
+ goto err;
}
break;
@@ -2797,7 +2771,7 @@
DRM_DEBUG("RADEON_CMD_PACKET3_CLIP\n");
if (radeon_emit_packet3_cliprect( dev, filp_priv,
&cmdbuf, orig_nbox )) {
DRM_ERROR("radeon_emit_packet3_clip failed\n");
- return DRM_ERR(EINVAL);
+ goto err;
}
break;
@@ -2805,7 +2779,7 @@
DRM_DEBUG("RADEON_CMD_SCALARS2\n");
if (radeon_emit_scalars2( dev_priv, header, &cmdbuf )) {
DRM_ERROR("radeon_emit_scalars2 failed\n");
- return DRM_ERR(EINVAL);
+ goto err;
}
break;
@@ -2813,21 +2787,28 @@
DRM_DEBUG("RADEON_CMD_WAIT\n");
if (radeon_emit_wait( dev, header.wait.flags )) {
DRM_ERROR("radeon_emit_wait failed\n");
- return DRM_ERR(EINVAL);
+ goto err;
}
break;
default:
DRM_ERROR("bad cmd_type %d at %p\n",
header.header.cmd_type,
cmdbuf.buf - sizeof(header));
- return DRM_ERR(EINVAL);
+ goto err;
}
}
+ if (orig_bufsz != 0)
+ drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER);
DRM_DEBUG("DONE\n");
COMMIT_RING();
return 0;
+
+err:
+ if (orig_bufsz != 0)
+ drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER);
+ return DRM_ERR(EINVAL);
}
diff -urN linux/drivers/char/ipmi/ipmi_si_intf.c
linux/drivers/char/ipmi/ipmi_si_intf.c
--- linux/drivers/char/ipmi/ipmi_si_intf.c 2005/01/25 04:28:13 1.11
+++ linux/drivers/char/ipmi/ipmi_si_intf.c 2005/02/13 20:16:22 1.12
@@ -1564,48 +1564,54 @@
u8 *data = (u8 *)dm;
unsigned long base_addr;
u8 reg_spacing;
+ u8 len = dm->length;
- ipmi_data->type = data[0x04];
+ ipmi_data->type = data[4];
- memcpy(&base_addr,&data[0x08],sizeof(unsigned long));
- if (base_addr & 1) {
- /* I/O */
- base_addr &= 0xFFFE;
+ memcpy(&base_addr, data+8, sizeof(unsigned long));
+ if (len >= 0x11) {
+ if (base_addr & 1) {
+ /* I/O */
+ base_addr &= 0xFFFE;
+ ipmi_data->addr_space = IPMI_IO_ADDR_SPACE;
+ }
+ else {
+ /* Memory */
+ ipmi_data->addr_space = IPMI_MEM_ADDR_SPACE;
+ }
+ /* If bit 4 of byte 0x10 is set, then the lsb for the address
+ is odd. */
+ ipmi_data->base_addr = base_addr | ((data[0x10] & 0x10) >> 4);
+
+ ipmi_data->irq = data[0x11];
+
+ /* The top two bits of byte 0x10 hold the register spacing. */
+ reg_spacing = (data[0x10] & 0xC0) >> 6;
+ switch(reg_spacing){
+ case 0x00: /* Byte boundaries */
+ ipmi_data->offset = 1;
+ break;
+ case 0x01: /* 32-bit boundaries */
+ ipmi_data->offset = 4;
+ break;
+ case 0x02: /* 16-byte boundaries */
+ ipmi_data->offset = 16;
+ break;
+ default:
+ /* Some other interface, just ignore it. */
+ return -EIO;
+ }
+ } else {
+ /* Old DMI spec. */
+ ipmi_data->base_addr = base_addr;
ipmi_data->addr_space = IPMI_IO_ADDR_SPACE;
- }
- else {
- /* Memory */
- ipmi_data->addr_space = IPMI_MEM_ADDR_SPACE;
- }
-
- /* The top two bits of byte 0x10 hold the register spacing. */
- reg_spacing = (data[0x10] & 0xC0) >> 6;
- switch(reg_spacing){
- case 0x00: /* Byte boundaries */
ipmi_data->offset = 1;
- break;
- case 0x01: /* 32-bit boundaries */
- ipmi_data->offset = 4;
- break;
- case 0x02: /* 16-byte boundaries */
- ipmi_data->offset = 16;
- break;
- default:
- printk("ipmi_si: Unknown SMBIOS IPMI Base Addr"
- " Modifier: 0x%x\n", reg_spacing);
- return -EIO;
}
- /* If bit 4 of byte 0x10 is set, then the lsb for the address
- is odd. */
- ipmi_data->base_addr = base_addr | ((data[0x10] & 0x10) >> 4);
-
- ipmi_data->irq = data[0x11];
-
if (is_new_interface(-1, ipmi_data->addr_space,ipmi_data->base_addr))
- return 0;
+ return 0;
- memset(ipmi_data,0,sizeof(dmi_ipmi_data_t));
+ memset(ipmi_data, 0, sizeof(dmi_ipmi_data_t));
return -1;
}
diff -urN linux/drivers/cpufreq/cpufreq.c linux/drivers/cpufreq/cpufreq.c
--- linux/drivers/cpufreq/cpufreq.c 2005/01/25 04:28:14 1.14
+++ linux/drivers/cpufreq/cpufreq.c 2005/02/13 20:16:22 1.15
@@ -900,9 +900,12 @@
if (cpufreq_driver->resume) {
ret = cpufreq_driver->resume(cpu_policy);
- printk(KERN_ERR "cpufreq: resume failed in ->resume step on CPU
%u\n", cpu_policy->cpu);
- cpufreq_cpu_put(cpu_policy);
- return (ret);
+ if (ret) {
+ printk(KERN_ERR "cpufreq: resume failed in ->resume "
+ "step on CPU %u\n", cpu_policy->cpu);
+ cpufreq_cpu_put(cpu_policy);
+ return ret;
+ }
}
if (!(cpufreq_driver->flags & CPUFREQ_CONST_LOOPS)) {
diff -urN linux/drivers/i2c/busses/i2c-sis5595.c
linux/drivers/i2c/busses/i2c-sis5595.c
--- linux/drivers/i2c/busses/i2c-sis5595.c 2004/10/25 20:44:24 1.6
+++ linux/drivers/i2c/busses/i2c-sis5595.c 2005/02/13 20:16:22 1.7
@@ -181,9 +181,11 @@
if (force_addr) {
dev_info(&SIS5595_dev->dev, "forcing ISA address 0x%04X\n",
sis5595_base);
- if (!pci_write_config_word(SIS5595_dev, ACPI_BASE,
sis5595_base))
+ if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base)
+ != PCIBIOS_SUCCESSFUL)
goto error;
- if (!pci_read_config_word(SIS5595_dev, ACPI_BASE, &a))
+ if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a)
+ != PCIBIOS_SUCCESSFUL)
goto error;
if ((a & ~(SIS5595_EXTENT - 1)) != sis5595_base) {
/* doesn't work for some chips! */
@@ -192,13 +194,16 @@
}
}
- if (!pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val))
+ if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
+ != PCIBIOS_SUCCESSFUL)
goto error;
if ((val & 0x80) == 0) {
dev_info(&SIS5595_dev->dev, "enabling ACPI\n");
- if (!pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val
| 0x80))
+ if (pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val
| 0x80)
+ != PCIBIOS_SUCCESSFUL)
goto error;
- if (!pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG,
&val))
+ if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
+ != PCIBIOS_SUCCESSFUL)
goto error;
if ((val & 0x80) == 0) {
/* doesn't work for some chips? */
diff -urN linux/drivers/i2c/busses/i2c-viapro.c
linux/drivers/i2c/busses/i2c-viapro.c
--- linux/drivers/i2c/busses/i2c-viapro.c 2005/01/13 14:05:59 1.11
+++ linux/drivers/i2c/busses/i2c-viapro.c 2005/02/13 20:16:22 1.12
@@ -45,6 +45,8 @@
#include <linux/init.h>
#include <asm/io.h>
+static struct pci_dev *vt596_pdev;
+
#define SMBBA1 0x90
#define SMBBA2 0x80
#define SMBBA3 0xD0
@@ -231,8 +233,8 @@
len = data->block[0];
if (len < 0)
len = 0;
- if (len > 32)
- len = 32;
+ if (len > I2C_SMBUS_BLOCK_MAX)
+ len = I2C_SMBUS_BLOCK_MAX;
outb_p(len, SMBHSTDAT0);
i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
for (i = 1; i <= len; i++)
@@ -266,6 +268,8 @@
break;
case VT596_BLOCK_DATA:
data->block[0] = inb_p(SMBHSTDAT0);
+ if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
+ data->block[0] = I2C_SMBUS_BLOCK_MAX;
i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
for (i = 1; i <= data->block[0]; i++)
data->block[i] = inb_p(SMBBLKDAT);
@@ -381,19 +385,23 @@
snprintf(vt596_adapter.name, I2C_NAME_SIZE,
"SMBus Via Pro adapter at %04x", vt596_smba);
- return i2c_add_adapter(&vt596_adapter);
+ vt596_pdev = pci_dev_get(pdev);
+ if (i2c_add_adapter(&vt596_adapter)) {
+ pci_dev_put(vt596_pdev);
+ vt596_pdev = NULL;
+ }
+
+ /* Always return failure here. This is to allow other drivers to bind
+ * to this pci device. We don't really want to have control over the
+ * pci device, we only wanted to read as few register values from it.
+ */
+ return -ENODEV;
release_region:
release_region(vt596_smba, 8);
return error;
}
-static void __devexit vt596_remove(struct pci_dev *pdev)
-{
- i2c_del_adapter(&vt596_adapter);
- release_region(vt596_smba, 8);
-}
-
static struct pci_device_id vt596_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596_3),
.driver_data = SMBBA1 },
@@ -420,7 +428,6 @@
.name = "vt596_smbus",
.id_table = vt596_ids,
.probe = vt596_probe,
- .remove = __devexit_p(vt596_remove),
};
static int __init i2c_vt596_init(void)
@@ -432,6 +439,12 @@
static void __exit i2c_vt596_exit(void)
{
pci_unregister_driver(&vt596_driver);
+ if (vt596_pdev != NULL) {
+ i2c_del_adapter(&vt596_adapter);
+ release_region(vt596_smba, 8);
+ pci_dev_put(vt596_pdev);
+ vt596_pdev = NULL;
+ }
}
MODULE_AUTHOR(
diff -urN linux/drivers/i2c/chips/ds1621.c linux/drivers/i2c/chips/ds1621.c
--- linux/drivers/i2c/chips/ds1621.c 2004/11/15 11:49:26 1.5
+++ linux/drivers/i2c/chips/ds1621.c 2005/02/13 20:16:22 1.6
@@ -42,9 +42,8 @@
/* Many DS1621 constants specified below */
/* Config register used for detection */
/* 7 6 5 4 3 2 1 0 */
-/* |Done|THF |TLF |NVB | 1 | 0 |POL |1SHOT| */
-#define DS1621_REG_CONFIG_MASK 0x0C
-#define DS1621_REG_CONFIG_VAL 0x08
+/* |Done|THF |TLF |NVB | X | X |POL |1SHOT| */
+#define DS1621_REG_CONFIG_NVB 0x10
#define DS1621_REG_CONFIG_POLARITY 0x02
#define DS1621_REG_CONFIG_1SHOT 0x01
#define DS1621_REG_CONFIG_DONE 0x80
@@ -55,6 +54,7 @@
#define DS1621_REG_TEMP_MAX 0xA2 /* word, RW */
#define DS1621_REG_CONF 0xAC /* byte, RW */
#define DS1621_COM_START 0xEE /* no data */
+#define DS1621_COM_STOP 0x22 /* no data */
/* The DS1621 configuration register */
#define DS1621_ALARM_TEMP_HIGH 0x40
@@ -212,9 +212,13 @@
/* Now, we do the remaining detection. It is lousy. */
if (kind < 0) {
+ /* The NVB bit should be low if no EEPROM write has been
+ requested during the latest 10ms, which is highly
+ improbable in our case. */
conf = ds1621_read_value(new_client, DS1621_REG_CONF);
- if ((conf & DS1621_REG_CONFIG_MASK) != DS1621_REG_CONFIG_VAL)
+ if (conf & DS1621_REG_CONFIG_NVB)
goto exit_free;
+ /* The 7 lowest bits of a temperature should always be 0. */
temp = ds1621_read_value(new_client, DS1621_REG_TEMP);
if (temp & 0x007f)
goto exit_free;
diff -urN linux/drivers/i2c/chips/it87.c linux/drivers/i2c/chips/it87.c
--- linux/drivers/i2c/chips/it87.c 2005/01/25 04:28:14 1.18
+++ linux/drivers/i2c/chips/it87.c 2005/02/13 20:16:22 1.19
@@ -2,8 +2,8 @@
it87.c - Part of lm_sensors, Linux kernel modules for hardware
monitoring.
- Supports: IT8705F Super I/O chip w/LPC interface
- IT8712F Super I/O chip w/LPC interface & SMbus
+ Supports: IT8705F Super I/O chip w/LPC interface & SMBus
+ IT8712F Super I/O chip w/LPC interface & SMBus
Sis950 A clone of the IT8705F
Copyright (C) 2001 Chris Gauthron <chrisg@0-in.com>
@@ -42,10 +42,8 @@
/* Addresses to scan */
-static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24,
- 0x25, 0x26, 0x27, 0x28, 0x29,
- 0x2a, 0x2b, 0x2c, 0x2d, 0x2e,
- 0x2f, I2C_CLIENT_END };
+static unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
+ 0x2e, 0x2f, I2C_CLIENT_END };
static unsigned int normal_isa[] = { 0x0290, I2C_CLIENT_ISA_END };
/* Insmod parameters */
diff -urN linux/drivers/i2c/chips/pc87360.c linux/drivers/i2c/chips/pc87360.c
--- linux/drivers/i2c/chips/pc87360.c 2005/01/13 14:05:59 1.2
+++ linux/drivers/i2c/chips/pc87360.c 2005/02/13 20:16:22 1.3
@@ -795,8 +795,10 @@
/* Fan clock dividers may be needed before any data is read */
for (i = 0; i < data->fannr; i++) {
- data->fan_status[i] = pc87360_read_value(data, LD_FAN,
- NO_BANK, PC87360_REG_FAN_STATUS(i));
+ if (FAN_CONFIG_MONITOR(data->fan_conf, i))
+ data->fan_status[i] = pc87360_read_value(data,
+ LD_FAN, NO_BANK,
+ PC87360_REG_FAN_STATUS(i));
}
if (init > 0) {
@@ -898,14 +900,27 @@
}
if (data->fannr) {
- device_create_file(&new_client->dev, &dev_attr_fan1_input);
- device_create_file(&new_client->dev, &dev_attr_fan2_input);
- device_create_file(&new_client->dev, &dev_attr_fan1_min);
- device_create_file(&new_client->dev, &dev_attr_fan2_min);
- device_create_file(&new_client->dev, &dev_attr_fan1_div);
- device_create_file(&new_client->dev, &dev_attr_fan2_div);
- device_create_file(&new_client->dev, &dev_attr_fan1_status);
- device_create_file(&new_client->dev, &dev_attr_fan2_status);
+ if (FAN_CONFIG_MONITOR(data->fan_conf, 0)) {
+ device_create_file(&new_client->dev,
+ &dev_attr_fan1_input);
+ device_create_file(&new_client->dev,
+ &dev_attr_fan1_min);
+ device_create_file(&new_client->dev,
+ &dev_attr_fan1_div);
+ device_create_file(&new_client->dev,
+ &dev_attr_fan1_status);
+ }
+
+ if (FAN_CONFIG_MONITOR(data->fan_conf, 1)) {
+ device_create_file(&new_client->dev,
+ &dev_attr_fan2_input);
+ device_create_file(&new_client->dev,
+ &dev_attr_fan2_min);
+ device_create_file(&new_client->dev,
+ &dev_attr_fan2_div);
+ device_create_file(&new_client->dev,
+ &dev_attr_fan2_status);
+ }
if (FAN_CONFIG_CONTROL(data->fan_conf, 0))
device_create_file(&new_client->dev, &dev_attr_pwm1);
@@ -913,10 +928,16 @@
device_create_file(&new_client->dev, &dev_attr_pwm2);
}
if (data->fannr == 3) {
- device_create_file(&new_client->dev, &dev_attr_fan3_input);
- device_create_file(&new_client->dev, &dev_attr_fan3_min);
- device_create_file(&new_client->dev, &dev_attr_fan3_div);
- device_create_file(&new_client->dev, &dev_attr_fan3_status);
+ if (FAN_CONFIG_MONITOR(data->fan_conf, 2)) {
+ device_create_file(&new_client->dev,
+ &dev_attr_fan3_input);
+ device_create_file(&new_client->dev,
+ &dev_attr_fan3_min);
+ device_create_file(&new_client->dev,
+ &dev_attr_fan3_div);
+ device_create_file(&new_client->dev,
+ &dev_attr_fan3_status);
+ }
if (FAN_CONFIG_CONTROL(data->fan_conf, 2))
device_create_file(&new_client->dev, &dev_attr_pwm3);
diff -urN linux/drivers/i2c/chips/via686a.c linux/drivers/i2c/chips/via686a.c
--- linux/drivers/i2c/chips/via686a.c 2005/01/25 04:28:14 1.18
+++ linux/drivers/i2c/chips/via686a.c 2005/02/13 20:16:22 1.19
@@ -815,20 +815,24 @@
return -ENODEV;
}
normal_isa[0] = addr;
- s_bridge = dev;
- return i2c_add_driver(&via686a_driver);
-}
-static void __devexit via686a_pci_remove(struct pci_dev *dev)
-{
- i2c_del_driver(&via686a_driver);
+ s_bridge = pci_dev_get(dev);
+ if (i2c_add_driver(&via686a_driver)) {
+ pci_dev_put(s_bridge);
+ s_bridge = NULL;
+ }
+
+ /* Always return failure here. This is to allow other drivers to bind
+ * to this pci device. We don't really want to have control over the
+ * pci device, we only wanted to read as few register values from it.
+ */
+ return -ENODEV;
}
static struct pci_driver via686a_pci_driver = {
.name = "via686a",
.id_table = via686a_pci_ids,
.probe = via686a_pci_probe,
- .remove = __devexit_p(via686a_pci_remove),
};
static int __init sm_via686a_init(void)
@@ -838,7 +842,12 @@
static void __exit sm_via686a_exit(void)
{
- pci_unregister_driver(&via686a_pci_driver);
+ pci_unregister_driver(&via686a_pci_driver);
+ if (s_bridge != NULL) {
+ i2c_del_driver(&via686a_driver);
+ pci_dev_put(s_bridge);
+ s_bridge = NULL;
+ }
}
MODULE_AUTHOR("Kyösti Mälkki <kmalkki@cc.hut.fi>, "
diff -urN linux/drivers/i2c/chips/w83781d.c linux/drivers/i2c/chips/w83781d.c
--- linux/drivers/i2c/chips/w83781d.c 2005/01/13 14:05:59 1.20
+++ linux/drivers/i2c/chips/w83781d.c 2005/02/13 20:16:22 1.21
@@ -175,11 +175,6 @@
: (val)) / 1000, 0, 0xff))
#define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) *
1000)
-#define AS99127_TEMP_ADD_TO_REG(val) (SENSORS_LIMIT((((val) < 0 ?
(val)+0x10000*250 \
- : (val)) / 250) << 7, 0,
0xffff))
-#define AS99127_TEMP_ADD_FROM_REG(val) ((((val) & 0x8000 ? (val)-0x10000 :
(val)) \
- >> 7) * 250)
-
#define ALARMS_FROM_REG(val) (val)
#define PWM_FROM_REG(val) (val)
#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
@@ -417,13 +412,8 @@
{ \
struct w83781d_data *data = w83781d_update_device(dev); \
if (nr >= 2) { /* TEMP2 and TEMP3 */ \
- if (data->type == as99127f) { \
- return sprintf(buf,"%ld\n", \
-
(long)AS99127_TEMP_ADD_FROM_REG(data->reg##_add[nr-2])); \
- } else { \
- return sprintf(buf,"%d\n", \
- LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
- } \
+ return sprintf(buf,"%d\n", \
+ LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
} else { /* TEMP1 */ \
return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
} \
@@ -442,11 +432,7 @@
val = simple_strtol(buf, NULL, 10); \
\
if (nr >= 2) { /* TEMP2 and TEMP3 */ \
- if (data->type == as99127f) \
- data->temp_##reg##_add[nr-2] =
AS99127_TEMP_ADD_TO_REG(val); \
- else \
- data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
- \
+ data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
data->temp_##reg##_add[nr-2]); \
} else { /* TEMP1 */ \
diff -urN linux/drivers/ide/ide-disk.c linux/drivers/ide/ide-disk.c
--- linux/drivers/ide/ide-disk.c 2005/01/13 14:05:59 1.77
+++ linux/drivers/ide/ide-disk.c 2005/02/13 20:16:22 1.78
@@ -132,7 +132,7 @@
nsectors.all = (u16) rq->nr_sectors;
if (hwif->no_lba48_dma && lba48 && dma) {
- if (rq->sector + rq->nr_sectors > 1ULL << 28)
+ if (block + rq->nr_sectors > 1ULL << 28)
dma = 0;
}
@@ -253,8 +253,7 @@
/* FIXME: ->OUTBSYNC ? */
hwif->OUTB(command, IDE_COMMAND_REG);
- pre_task_out_intr(drive, rq);
- return ide_started;
+ return pre_task_out_intr(drive, rq);
}
}
EXPORT_SYMBOL_GPL(__ide_do_rw_disk);
diff -urN linux/drivers/ide/ide-dma.c linux/drivers/ide/ide-dma.c
--- linux/drivers/ide/ide-dma.c 2005/01/25 04:28:14 1.52
+++ linux/drivers/ide/ide-dma.c 2005/02/13 20:16:22 1.53
@@ -227,7 +227,9 @@
* the PRD table that the IDE layer wants to be fed. The code
* knows about the 64K wrap bug in the CS5530.
*
- * Returns 0 if all went okay, returns 1 otherwise.
+ * Returns the number of built PRD entries if all went okay,
+ * returns 0 otherwise.
+ *
* May also be invoked from trm290.c
*/
@@ -631,7 +633,7 @@
EXPORT_SYMBOL(__ide_dma_end);
/* returns 1 if dma irq issued, 0 otherwise */
-int __ide_dma_test_irq (ide_drive_t *drive)
+static int __ide_dma_test_irq(ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
u8 dma_stat = hwif->INB(hwif->dma_status);
@@ -650,8 +652,6 @@
drive->name, __FUNCTION__);
return 0;
}
-
-EXPORT_SYMBOL(__ide_dma_test_irq);
#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
int __ide_dma_bad_drive (ide_drive_t *drive)
@@ -784,7 +784,7 @@
/*
* Needed for allowing full modular support of ide-driver
*/
-int ide_release_dma_engine (ide_hwif_t *hwif)
+static int ide_release_dma_engine(ide_hwif_t *hwif)
{
if (hwif->dmatable_cpu) {
pci_free_consistent(hwif->pci_dev,
@@ -796,7 +796,7 @@
return 1;
}
-int ide_release_iomio_dma (ide_hwif_t *hwif)
+static int ide_release_iomio_dma(ide_hwif_t *hwif)
{
if ((hwif->dma_extra) && (hwif->channel == 0))
release_region((hwif->dma_base + 16), hwif->dma_extra);
@@ -820,7 +820,7 @@
return ide_release_iomio_dma(hwif);
}
-int ide_allocate_dma_engine (ide_hwif_t *hwif)
+static int ide_allocate_dma_engine(ide_hwif_t *hwif)
{
hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
PRD_ENTRIES * PRD_BYTES,
@@ -830,14 +830,13 @@
return 0;
printk(KERN_ERR "%s: -- Error, unable to allocate%s DMA table(s).\n",
- (hwif->dmatable_cpu == NULL) ? " CPU" : "",
- hwif->cds->name);
+ hwif->cds->name, !hwif->dmatable_cpu ? " CPU" : "");
ide_release_dma_engine(hwif);
return 1;
}
-int ide_mapped_mmio_dma (ide_hwif_t *hwif, unsigned long base, unsigned int
ports)
+static int ide_mapped_mmio_dma(ide_hwif_t *hwif, unsigned long base, unsigned
int ports)
{
printk(KERN_INFO " %s: MMIO-DMA ", hwif->name);
@@ -852,7 +851,7 @@
return 0;
}
-int ide_iomio_dma (ide_hwif_t *hwif, unsigned long base, unsigned int ports)
+static int ide_iomio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int
ports)
{
printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx",
hwif->name, base, base + ports - 1);
@@ -881,10 +880,7 @@
return 0;
}
-/*
- *
- */
-int ide_dma_iobase (ide_hwif_t *hwif, unsigned long base, unsigned int ports)
+static int ide_dma_iobase(ide_hwif_t *hwif, unsigned long base, unsigned int
ports)
{
if (hwif->mmio == 2)
return ide_mapped_mmio_dma(hwif, base,ports);
diff -urN linux/drivers/ide/ide-floppy.c linux/drivers/ide/ide-floppy.c
--- linux/drivers/ide/ide-floppy.c 2005/01/13 14:05:59 1.58
+++ linux/drivers/ide/ide-floppy.c 2005/02/13 20:16:22 1.59
@@ -585,7 +585,7 @@
count = min(bvec->bv_len, bcount);
data = bvec_kmap_irq(bvec, &flags);
- atapi_input_bytes(drive, data, count);
+ drive->hwif->atapi_input_bytes(drive, data, count);
bvec_kunmap_irq(data, &flags);
bcount -= count;
@@ -619,7 +619,7 @@
count = min(bvec->bv_len, bcount);
data = bvec_kmap_irq(bvec, &flags);
- atapi_output_bytes(drive, data, count);
+ drive->hwif->atapi_output_bytes(drive, data, count);
bvec_kunmap_irq(data, &flags);
bcount -= count;
diff -urN linux/drivers/ide/ide-io.c linux/drivers/ide/ide-io.c
--- linux/drivers/ide/ide-io.c 2005/01/25 04:28:14 1.29
+++ linux/drivers/ide/ide-io.c 2005/02/13 20:16:22 1.30
@@ -555,7 +555,7 @@
err = ide_dump_status(drive, msg, stat);
- if (drive == NULL || (rq = HWGROUP(drive)->rq) == NULL)
+ if ((rq = HWGROUP(drive)->rq) == NULL)
return ide_stopped;
/* retry only "normal" I/O: */
@@ -933,6 +933,7 @@
if (timeout > WAIT_WORSTCASE)
timeout = WAIT_WORSTCASE;
drive->sleep = timeout + jiffies;
+ drive->sleeping = 1;
}
EXPORT_SYMBOL(ide_stall_queue);
@@ -972,18 +973,18 @@
}
do {
- if ((!drive->sleep || time_after_eq(jiffies, drive->sleep))
+ if ((!drive->sleeping || time_after_eq(jiffies, drive->sleep))
&& !elv_queue_empty(drive->queue)) {
if (!best
- || (drive->sleep && (!best->sleep || 0 < (signed
long)(best->sleep - drive->sleep)))
- || (!best->sleep && 0 < (signed long)(WAKEUP(best) -
WAKEUP(drive))))
+ || (drive->sleeping && (!best->sleeping ||
time_before(drive->sleep, best->sleep)))
+ || (!best->sleeping && time_before(WAKEUP(drive),
WAKEUP(best))))
{
if (!blk_queue_plugged(drive->queue))
best = drive;
}
}
} while ((drive = drive->next) != hwgroup->drive);
- if (best && best->nice1 && !best->sleep && best != hwgroup->drive &&
best->service_time > WAIT_MIN_SLEEP) {
+ if (best && best->nice1 && !best->sleeping && best != hwgroup->drive &&
best->service_time > WAIT_MIN_SLEEP) {
long t = (signed long)(WAKEUP(best) - jiffies);
if (t >= WAIT_MIN_SLEEP) {
/*
@@ -992,10 +993,9 @@
*/
drive = best->next;
do {
- if (!drive->sleep
- /* FIXME: use time_before */
- && 0 < (signed long)(WAKEUP(drive) - (jiffies
- best->service_time))
- && 0 < (signed long)((jiffies + t) -
WAKEUP(drive)))
+ if (!drive->sleeping
+ && time_before(jiffies - best->service_time,
WAKEUP(drive))
+ && time_before(WAKEUP(drive), jiffies + t))
{
ide_stall_queue(best, min_t(long, t, 10
* WAIT_MIN_SLEEP));
goto repeat;
@@ -1058,14 +1058,17 @@
hwgroup->busy = 1;
drive = choose_drive(hwgroup);
if (drive == NULL) {
- unsigned long sleep = 0;
+ int sleeping = 0;
+ unsigned long sleep = 0; /* shut up, gcc */
hwgroup->rq = NULL;
drive = hwgroup->drive;
do {
- if (drive->sleep && (!sleep || 0 < (signed
long)(sleep - drive->sleep)))
+ if (drive->sleeping && (!sleeping ||
time_before(drive->sleep, sleep))) {
+ sleeping = 1;
sleep = drive->sleep;
+ }
} while ((drive = drive->next) != hwgroup->drive);
- if (sleep) {
+ if (sleeping) {
/*
* Take a short snooze, and then wake up this hwgroup again.
* This gives other hwgroups on the same a chance to
@@ -1105,7 +1108,7 @@
}
hwgroup->hwif = hwif;
hwgroup->drive = drive;
- drive->sleep = 0;
+ drive->sleeping = 0;
drive->service_start = jiffies;
if (blk_queue_plugged(drive->queue)) {
@@ -1311,7 +1314,7 @@
/* local CPU only,
* as if we were handling an interrupt */
local_irq_disable();
- if (hwgroup->poll_timeout != 0) {
+ if (hwgroup->polling) {
startstop = handler(drive);
} else if (drive_is_ready(drive)) {
if (drive->waiting_for_dma)
@@ -1439,8 +1442,7 @@
return IRQ_NONE;
}
- if ((handler = hwgroup->handler) == NULL ||
- hwgroup->poll_timeout != 0) {
+ if ((handler = hwgroup->handler) == NULL || hwgroup->polling) {
/*
* Not expecting an interrupt from this drive.
* That means this could be:
diff -urN linux/drivers/ide/ide-iops.c linux/drivers/ide/ide-iops.c
--- linux/drivers/ide/ide-iops.c 2005/01/13 14:05:59 1.18
+++ linux/drivers/ide/ide-iops.c 2005/02/13 20:16:22 1.19
@@ -184,16 +184,6 @@
EXPORT_SYMBOL(default_hwif_mmiops);
-void default_hwif_transport (ide_hwif_t *hwif)
-{
- hwif->ata_input_data = ata_input_data;
- hwif->ata_output_data = ata_output_data;
- hwif->atapi_input_bytes = atapi_input_bytes;
- hwif->atapi_output_bytes = atapi_output_bytes;
-}
-
-EXPORT_SYMBOL(default_hwif_transport);
-
u32 ide_read_24 (ide_drive_t *drive)
{
u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
@@ -202,8 +192,6 @@
return (hcyl<<16)|(lcyl<<8)|sect;
}
-EXPORT_SYMBOL(ide_read_24);
-
void SELECT_DRIVE (ide_drive_t *drive)
{
if (HWIF(drive)->selectproc)
@@ -240,7 +228,7 @@
* of the sector count register location, with interrupts disabled
* to ensure that the reads all happen together.
*/
-void ata_vlb_sync (ide_drive_t *drive, unsigned long port)
+static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
{
(void) HWIF(drive)->INB(port);
(void) HWIF(drive)->INB(port);
@@ -250,7 +238,7 @@
/*
* This is used for most PIO data transfers *from* the IDE interface
*/
-void ata_input_data (ide_drive_t *drive, void *buffer, u32 wcount)
+static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
{
ide_hwif_t *hwif = HWIF(drive);
u8 io_32bit = drive->io_32bit;
@@ -272,7 +260,7 @@
/*
* This is used for most PIO data transfers *to* the IDE interface
*/
-void ata_output_data (ide_drive_t *drive, void *buffer, u32 wcount)
+static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
{
ide_hwif_t *hwif = HWIF(drive);
u8 io_32bit = drive->io_32bit;
@@ -299,7 +287,7 @@
* extra byte allocated for the buffer.
*/
-void atapi_input_bytes (ide_drive_t *drive, void *buffer, u32 bytecount)
+static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
{
ide_hwif_t *hwif = HWIF(drive);
@@ -316,9 +304,7 @@
hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
}
-EXPORT_SYMBOL(atapi_input_bytes);
-
-void atapi_output_bytes (ide_drive_t *drive, void *buffer, u32 bytecount)
+static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
{
ide_hwif_t *hwif = HWIF(drive);
@@ -335,7 +321,15 @@
hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
}
-EXPORT_SYMBOL(atapi_output_bytes);
+void default_hwif_transport(ide_hwif_t *hwif)
+{
+ hwif->ata_input_data = ata_input_data;
+ hwif->ata_output_data = ata_output_data;
+ hwif->atapi_input_bytes = atapi_input_bytes;
+ hwif->atapi_output_bytes = atapi_output_bytes;
+}
+
+EXPORT_SYMBOL(default_hwif_transport);
/*
* Beginning of Taskfile OPCODE Library and feature sets.
@@ -437,6 +431,7 @@
#endif
}
+/* FIXME: exported for use by the USB storage (isd200.c) code only */
EXPORT_SYMBOL(ide_fix_driveid);
void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
@@ -1028,14 +1023,14 @@
return ide_started;
}
/* end of polling */
- hwgroup->poll_timeout = 0;
+ hwgroup->polling = 0;
printk("%s: ATAPI reset timed-out, status=0x%02x\n",
drive->name, stat);
/* do it the old fashioned way */
return do_reset1(drive, 1);
}
/* done polling */
- hwgroup->poll_timeout = 0;
+ hwgroup->polling = 0;
return ide_stopped;
}
@@ -1095,7 +1090,7 @@
printk("\n");
}
}
- hwgroup->poll_timeout = 0; /* done polling */
+ hwgroup->polling = 0; /* done polling */
return ide_stopped;
}
@@ -1112,7 +1107,7 @@
#endif
}
-void pre_reset (ide_drive_t *drive)
+static void pre_reset(ide_drive_t *drive)
{
DRIVER(drive)->pre_reset(drive);
@@ -1170,6 +1165,7 @@
udelay (20);
hwif->OUTB(WIN_SRST, IDE_COMMAND_REG);
hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
+ hwgroup->polling = 1;
__ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
spin_unlock_irqrestore(&ide_lock, flags);
return ide_started;
@@ -1210,6 +1206,7 @@
/* more than enough time */
udelay(10);
hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
+ hwgroup->polling = 1;
__ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
/*
diff -urN linux/drivers/ide/ide-lib.c linux/drivers/ide/ide-lib.c
--- linux/drivers/ide/ide-lib.c 2005/01/25 04:28:14 1.16
+++ linux/drivers/ide/ide-lib.c 2005/02/13 20:16:22 1.17
@@ -570,6 +570,7 @@
atapi_error_t error;
status.all = stat;
+ error.all = 0;
local_irq_set(flags);
printk("%s: %s: status=0x%02x { ", drive->name, msg, stat);
if (status.b.bsy)
@@ -584,7 +585,7 @@
if (status.b.check) printk("Error ");
}
printk("}\n");
- if ((status.all & (status.b.bsy|status.b.check)) == status.b.check) {
+ if (status.b.check && !status.b.bsy) {
error.all = HWIF(drive)->INB(IDE_ERROR_REG);
printk("%s: %s: error=0x%02x { ", drive->name, msg, error.all);
if (error.b.ili) printk("IllegalLengthIndication ");
diff -urN linux/drivers/ide/ide-pnp.c linux/drivers/ide/ide-pnp.c
--- linux/drivers/ide/ide-pnp.c 2004/06/16 12:09:36 1.19
+++ linux/drivers/ide/ide-pnp.c 2005/02/13 20:16:22 1.20
@@ -21,7 +21,7 @@
#include <linux/ide.h>
/* Add your devices here :)) */
-struct pnp_device_id idepnp_devices[] = {
+static struct pnp_device_id idepnp_devices[] = {
/* Generic ESDI/IDE/ATA compatible hard disk controller */
{.id = "PNP0600", .driver_data = 0},
{.id = ""}
diff -urN linux/drivers/ide/ide-probe.c linux/drivers/ide/ide-probe.c
--- linux/drivers/ide/ide-probe.c 2005/01/25 04:28:14 1.75
+++ linux/drivers/ide/ide-probe.c 2005/02/13 20:16:22 1.76
@@ -841,7 +841,11 @@
if (fixup)
fixup(hwif);
- hwif_init(hwif);
+ if (!hwif_init(hwif)) {
+ printk(KERN_INFO "%s: failed to initialize IDE interface\n",
+ hwif->name);
+ return -1;
+ }
if (hwif->present) {
u16 unit = 0;
@@ -1244,8 +1248,9 @@
{
int old_irq, unit;
+ /* Return success if no device is connected */
if (!hwif->present)
- return 0;
+ return 1;
if (!hwif->irq) {
if (!(hwif->irq =
ide_default_irq(hwif->io_ports[IDE_DATA_OFFSET])))
diff -urN linux/drivers/ide/ide-tape.c linux/drivers/ide/ide-tape.c
--- linux/drivers/ide/ide-tape.c 2004/10/25 20:44:24 1.62
+++ linux/drivers/ide/ide-tape.c 2005/02/13 20:16:22 1.63
@@ -2439,7 +2439,7 @@
tape->dsc_polling_start = jiffies;
tape->dsc_polling_frequency =
tape->best_dsc_rw_frequency;
tape->dsc_timeout = jiffies + IDETAPE_DSC_RW_TIMEOUT;
- } else if ((signed long) (jiffies - tape->dsc_timeout) > 0) {
+ } else if (time_after(jiffies, tape->dsc_timeout)) {
printk(KERN_ERR "ide-tape: %s: DSC timeout\n",
tape->name);
if (rq->cmd[0] & REQ_IDETAPE_PC2) {
diff -urN linux/drivers/ide/ide-taskfile.c linux/drivers/ide/ide-taskfile.c
--- linux/drivers/ide/ide-taskfile.c 2005/01/13 14:05:59 1.50
+++ linux/drivers/ide/ide-taskfile.c 2005/02/13 20:16:22 1.51
@@ -851,8 +851,8 @@
hwif->OUTB(taskfile->high_cylinder, IDE_HCYL_REG);
/*
- * (ks) In the flagged taskfile approch, we will used all specified
- * registers and the register value will not be changed. Except the
+ * (ks) In the flagged taskfile approch, we will use all specified
+ * registers and the register value will not be changed, except the
* select bit (master/slave) in the drive_head register. We must make
* sure that the desired drive is selected.
*/
diff -urN linux/drivers/ide/ide.c linux/drivers/ide/ide.c
--- linux/drivers/ide/ide.c 2005/02/02 18:59:00 1.111
+++ linux/drivers/ide/ide.c 2005/02/13 20:16:22 1.112
@@ -333,7 +333,7 @@
* Returns a guessed speed in MHz.
*/
-int ide_system_bus_speed (void)
+static int ide_system_bus_speed(void)
{
static struct pci_device_id pci_default[] = {
{ PCI_DEVICE(PCI_ANY_ID, PCI_ANY_ID) },
@@ -414,7 +414,7 @@
#ifdef CONFIG_PROC_FS
struct proc_dir_entry *proc_ide_root;
-ide_proc_entry_t generic_subdriver_entries[] = {
+static ide_proc_entry_t generic_subdriver_entries[] = {
{ "capacity", S_IFREG|S_IRUGO, proc_ide_read_capacity, NULL },
{ NULL, 0, NULL, NULL }
};
@@ -1675,7 +1675,7 @@
*
* Remember to update Documentation/ide.txt if you change something here.
*/
-int __init ide_setup (char *s)
+static int __init ide_setup(char *s)
{
int i, vals[3];
ide_hwif_t *hwif;
@@ -2267,7 +2267,7 @@
/*
* This is gets invoked once during initialization, to set *everything* up
*/
-int __init ide_init (void)
+static int __init ide_init(void)
{
printk(KERN_INFO "Uniform Multi-Platform E-IDE driver " REVISION "\n");
devfs_mk_dir("ide");
@@ -2314,7 +2314,7 @@
}
#ifdef MODULE
-char *options = NULL;
+static char *options = NULL;
module_param(options, charp, 0);
MODULE_LICENSE("GPL");
diff -urN linux/drivers/ide/legacy/ide-cs.c linux/drivers/ide/legacy/ide-cs.c
--- linux/drivers/ide/legacy/ide-cs.c 2005/01/25 04:28:15 1.19
+++ linux/drivers/ide/legacy/ide-cs.c 2005/02/13 20:16:22 1.20
@@ -209,7 +209,7 @@
#define CS_CHECK(fn, ret) \
do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
-void ide_config(dev_link_t *link)
+static void ide_config(dev_link_t *link)
{
client_handle_t handle = link->handle;
ide_info_t *info = link->priv;
diff -urN linux/drivers/ide/pci/Makefile linux/drivers/ide/pci/Makefile
--- linux/drivers/ide/pci/Makefile 2004/04/12 20:23:30 1.12
+++ linux/drivers/ide/pci/Makefile 2005/02/13 20:16:22 1.13
@@ -1,5 +1,4 @@
-obj-$(CONFIG_BLK_DEV_ADMA100) += adma100.o
obj-$(CONFIG_BLK_DEV_AEC62XX) += aec62xx.o
obj-$(CONFIG_BLK_DEV_ALI15X3) += alim15x3.o
obj-$(CONFIG_BLK_DEV_AMD74XX) += amd74xx.o
diff -urN linux/drivers/ide/pci/aec62xx.c linux/drivers/ide/pci/aec62xx.c
--- linux/drivers/ide/pci/aec62xx.c 2005/01/13 14:06:00 1.20
+++ linux/drivers/ide/pci/aec62xx.c 2005/02/13 20:16:22 1.21
@@ -16,7 +16,54 @@
#include <asm/io.h>
-#include "aec62xx.h"
+struct chipset_bus_clock_list_entry {
+ u8 xfer_speed;
+ u8 chipset_settings;
+ u8 ultra_settings;
+};
+
+static struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
+ { XFER_UDMA_6, 0x31, 0x07 },
+ { XFER_UDMA_5, 0x31, 0x06 },
+ { XFER_UDMA_4, 0x31, 0x05 },
+ { XFER_UDMA_3, 0x31, 0x04 },
+ { XFER_UDMA_2, 0x31, 0x03 },
+ { XFER_UDMA_1, 0x31, 0x02 },
+ { XFER_UDMA_0, 0x31, 0x01 },
+
+ { XFER_MW_DMA_2, 0x31, 0x00 },
+ { XFER_MW_DMA_1, 0x31, 0x00 },
+ { XFER_MW_DMA_0, 0x0a, 0x00 },
+ { XFER_PIO_4, 0x31, 0x00 },
+ { XFER_PIO_3, 0x33, 0x00 },
+ { XFER_PIO_2, 0x08, 0x00 },
+ { XFER_PIO_1, 0x0a, 0x00 },
+ { XFER_PIO_0, 0x00, 0x00 },
+ { 0, 0x00, 0x00 }
+};
+
+static struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
+ { XFER_UDMA_6, 0x41, 0x06 },
+ { XFER_UDMA_5, 0x41, 0x05 },
+ { XFER_UDMA_4, 0x41, 0x04 },
+ { XFER_UDMA_3, 0x41, 0x03 },
+ { XFER_UDMA_2, 0x41, 0x02 },
+ { XFER_UDMA_1, 0x41, 0x01 },
+ { XFER_UDMA_0, 0x41, 0x01 },
+
+ { XFER_MW_DMA_2, 0x41, 0x00 },
+ { XFER_MW_DMA_1, 0x42, 0x00 },
+ { XFER_MW_DMA_0, 0x7a, 0x00 },
+ { XFER_PIO_4, 0x41, 0x00 },
+ { XFER_PIO_3, 0x43, 0x00 },
+ { XFER_PIO_2, 0x78, 0x00 },
+ { XFER_PIO_1, 0x7a, 0x00 },
+ { XFER_PIO_0, 0x70, 0x00 },
+ { 0, 0x00, 0x00 }
+};
+
+#define BUSCLOCK(D) \
+ ((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D)))
#if 0
if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
@@ -101,8 +148,7 @@
/* 0x40|(2*drive->dn): Active, 0x41|(2*drive->dn): Recovery */
pci_read_config_word(dev, 0x40|(2*drive->dn), &d_conf);
tmp0 = pci_bus_clock_list(speed, BUSCLOCK(dev));
- SPLIT_BYTE(tmp0,tmp1,tmp2);
- MAKE_WORD(d_conf,tmp1,tmp2);
+ d_conf = ((tmp0 & 0xf0) << 4) | (tmp0 & 0xf);
pci_write_config_word(dev, 0x40|(2*drive->dn), d_conf);
tmp1 = 0x00;
@@ -343,6 +389,58 @@
return ide_setup_pci_device(dev, d);
}
+static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "AEC6210",
+ .init_setup = init_setup_aec62xx,
+ .init_chipset = init_chipset_aec62xx,
+ .init_hwif = init_hwif_aec62xx,
+ .init_dma = init_dma_aec62xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
+ .bootable = OFF_BOARD,
+ },{ /* 1 */
+ .name = "AEC6260",
+ .init_setup = init_setup_aec62xx,
+ .init_chipset = init_chipset_aec62xx,
+ .init_hwif = init_hwif_aec62xx,
+ .init_dma = init_dma_aec62xx,
+ .channels = 2,
+ .autodma = NOAUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 2 */
+ .name = "AEC6260R",
+ .init_setup = init_setup_aec62xx,
+ .init_chipset = init_chipset_aec62xx,
+ .init_hwif = init_hwif_aec62xx,
+ .init_dma = init_dma_aec62xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
+ .bootable = NEVER_BOARD,
+ },{ /* 3 */
+ .name = "AEC6X80",
+ .init_setup = init_setup_aec6x80,
+ .init_chipset = init_chipset_aec62xx,
+ .init_hwif = init_hwif_aec62xx,
+ .init_dma = init_dma_aec62xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 4 */
+ .name = "AEC6X80R",
+ .init_setup = init_setup_aec6x80,
+ .init_chipset = init_chipset_aec62xx,
+ .init_hwif = init_hwif_aec62xx,
+ .init_dma = init_dma_aec62xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
+ .bootable = OFF_BOARD,
+ }
+};
+
/**
* aec62xx_init_one - called when a AEC is found
* @dev: the aec62xx device
diff -urN linux/drivers/ide/pci/cmd64x.c linux/drivers/ide/pci/cmd64x.c
--- linux/drivers/ide/pci/cmd64x.c 2005/01/13 14:06:00 1.20
+++ linux/drivers/ide/pci/cmd64x.c 2005/02/13 20:16:23 1.21
@@ -25,7 +25,56 @@
#include <asm/io.h>
-#include "cmd64x.h"
+#define DISPLAY_CMD64X_TIMINGS
+
+#define CMD_DEBUG 0
+
+#if CMD_DEBUG
+#define cmdprintk(x...) printk(x)
+#else
+#define cmdprintk(x...)
+#endif
+
+/*
+ * CMD64x specific registers definition.
+ */
+#define CFR 0x50
+#define CFR_INTR_CH0 0x02
+#define CNTRL 0x51
+#define CNTRL_DIS_RA0 0x40
+#define CNTRL_DIS_RA1 0x80
+#define CNTRL_ENA_2ND 0x08
+
+#define CMDTIM 0x52
+#define ARTTIM0 0x53
+#define DRWTIM0 0x54
+#define ARTTIM1 0x55
+#define DRWTIM1 0x56
+#define ARTTIM23 0x57
+#define ARTTIM23_DIS_RA2 0x04
+#define ARTTIM23_DIS_RA3 0x08
+#define ARTTIM23_INTR_CH1 0x10
+#define ARTTIM2 0x57
+#define ARTTIM3 0x57
+#define DRWTIM23 0x58
+#define DRWTIM2 0x58
+#define BRST 0x59
+#define DRWTIM3 0x5b
+
+#define BMIDECR0 0x70
+#define MRDMODE 0x71
+#define MRDMODE_INTR_CH0 0x04
+#define MRDMODE_INTR_CH1 0x08
+#define MRDMODE_BLK_CH0 0x10
+#define MRDMODE_BLK_CH1 0x20
+#define BMIDESR0 0x72
+#define UDIDETCR0 0x73
+#define DTPR0 0x74
+#define BMIDECR1 0x78
+#define BMIDECSR 0x79
+#define BMIDESR1 0x7A
+#define UDIDETCR1 0x7B
+#define DTPR1 0x7C
#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS)
#include <linux/stat.h>
@@ -707,6 +756,39 @@
hwif->drives[1].autodma = hwif->autodma;
}
+static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "CMD643",
+ .init_chipset = init_chipset_cmd64x,
+ .init_hwif = init_hwif_cmd64x,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 1 */
+ .name = "CMD646",
+ .init_chipset = init_chipset_cmd64x,
+ .init_hwif = init_hwif_cmd64x,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .enablebits = {{0x00,0x00,0x00}, {0x51,0x80,0x80}},
+ .bootable = ON_BOARD,
+ },{ /* 2 */
+ .name = "CMD648",
+ .init_chipset = init_chipset_cmd64x,
+ .init_hwif = init_hwif_cmd64x,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 3 */
+ .name = "CMD649",
+ .init_chipset = init_chipset_cmd64x,
+ .init_hwif = init_hwif_cmd64x,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = ON_BOARD,
+ }
+};
+
static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct
pci_device_id *id)
{
return ide_setup_pci_device(dev, &cmd64x_chipsets[id->driver_data]);
diff -urN linux/drivers/ide/pci/cy82c693.c linux/drivers/ide/pci/cy82c693.c
--- linux/drivers/ide/pci/cy82c693.c 2005/01/13 14:06:00 1.16
+++ linux/drivers/ide/pci/cy82c693.c 2005/02/13 20:16:23 1.17
@@ -54,7 +54,64 @@
#include <asm/io.h>
-#include "cy82c693.h"
+/* the current version */
+#define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs
(akrebs@altavista.net)"
+
+/*
+ * The following are used to debug the driver.
+ */
+#define CY82C693_DEBUG_LOGS 0
+#define CY82C693_DEBUG_INFO 0
+
+/* define CY82C693_SETDMA_CLOCK to set DMA Controller Clock Speed to ATCLK */
+#undef CY82C693_SETDMA_CLOCK
+
+/*
+ * NOTE: the value for busmaster timeout is tricky and I got it by
+ * trial and error! By using a to low value will cause DMA timeouts
+ * and drop IDE performance, and by using a to high value will cause
+ * audio playback to scatter.
+ * If you know a better value or how to calc it, please let me know.
+ */
+
+/* twice the value written in cy82c693ub datasheet */
+#define BUSMASTER_TIMEOUT 0x50
+/*
+ * the value above was tested on my machine and it seems to work okay
+ */
+
+/* here are the offset definitions for the registers */
+#define CY82_IDE_CMDREG 0x04
+#define CY82_IDE_ADDRSETUP 0x48
+#define CY82_IDE_MASTER_IOR 0x4C
+#define CY82_IDE_MASTER_IOW 0x4D
+#define CY82_IDE_SLAVE_IOR 0x4E
+#define CY82_IDE_SLAVE_IOW 0x4F
+#define CY82_IDE_MASTER_8BIT 0x50
+#define CY82_IDE_SLAVE_8BIT 0x51
+
+#define CY82_INDEX_PORT 0x22
+#define CY82_DATA_PORT 0x23
+
+#define CY82_INDEX_CTRLREG1 0x01
+#define CY82_INDEX_CHANNEL0 0x30
+#define CY82_INDEX_CHANNEL1 0x31
+#define CY82_INDEX_TIMEOUT 0x32
+
+/* the max PIO mode - from datasheet */
+#define CY82C693_MAX_PIO 4
+
+/* the min and max PCI bus speed in MHz - from datasheet */
+#define CY82C963_MIN_BUS_SPEED 25
+#define CY82C963_MAX_BUS_SPEED 33
+
+/* the struct for the PIO mode timings */
+typedef struct pio_clocks_s {
+ u8 address_time; /* Address setup (clocks) */
+ u8 time_16r; /* clocks for 16bit IOR (0xF0=Active/data,
0x0F=Recovery) */
+ u8 time_16w; /* clocks for 16bit IOW (0xF0=Active/data,
0x0F=Recovery) */
+ u8 time_8; /* clocks for 8bit (0xF0=Active/data,
0x0F=Recovery) */
+} pio_clocks_t;
/*
* calc clocks using bus_speed
@@ -422,6 +479,18 @@
}
}
+static ide_pci_device_t cy82c693_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "CY82C693",
+ .init_chipset = init_chipset_cy82c693,
+ .init_iops = init_iops_cy82c693,
+ .init_hwif = init_hwif_cy82c693,
+ .channels = 1,
+ .autodma = AUTODMA,
+ .bootable = ON_BOARD,
+ }
+};
+
static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct
pci_device_id *id)
{
ide_pci_device_t *d = &cy82c693_chipsets[id->driver_data];
diff -urN linux/drivers/ide/pci/generic.c linux/drivers/ide/pci/generic.c
--- linux/drivers/ide/pci/generic.c 2005/01/13 14:06:00 1.18
+++ linux/drivers/ide/pci/generic.c 2005/02/13 20:16:23 1.19
@@ -39,13 +39,6 @@
#include <asm/io.h>
-#include "generic.h"
-
-static unsigned int __devinit init_chipset_generic (struct pci_dev *dev, const
char *name)
-{
- return 0;
-}
-
static void __devinit init_hwif_generic (ide_hwif_t *hwif)
{
switch(hwif->pci_dev->device) {
@@ -83,6 +76,89 @@
return 0;
#endif
+static ide_pci_device_t generic_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "NS87410",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}},
+ .bootable = ON_BOARD,
+ },{ /* 1 */
+ .name = "SAMURAI",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 2 */
+ .name = "HT6565",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 3 */
+ .name = "UM8673F",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = NODMA,
+ .bootable = ON_BOARD,
+ },{ /* 4 */
+ .name = "UM8886A",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = NODMA,
+ .bootable = ON_BOARD,
+ },{ /* 5 */
+ .name = "UM8886BF",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = NODMA,
+ .bootable = ON_BOARD,
+ },{ /* 6 */
+ .name = "HINT_IDE",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 7 */
+ .name = "VIA_IDE",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = NOAUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 8 */
+ .name = "OPTI621V",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = NOAUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 9 */
+ .name = "VIA8237SATA",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 10 */
+ .name = "Piccolo0102",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = NOAUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 11 */
+ .name = "Piccolo0103",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = NOAUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 12 */
+ .name = "Piccolo0105",
+ .init_hwif = init_hwif_generic,
+ .channels = 2,
+ .autodma = NOAUTODMA,
+ .bootable = ON_BOARD,
+ }
+};
+
/**
* generic_init_one - called when a PIIX is found
* @dev: the generic device
diff -urN linux/drivers/ide/pci/hpt366.c linux/drivers/ide/pci/hpt366.c
--- linux/drivers/ide/pci/hpt366.c 2005/01/13 14:06:00 1.29
+++ linux/drivers/ide/pci/hpt366.c 2005/02/13 20:16:23 1.30
@@ -70,9 +70,384 @@
#include <asm/io.h>
#include <asm/irq.h>
-#include "hpt366.h"
+/* various tuning parameters */
+#define HPT_RESET_STATE_ENGINE
+#undef HPT_DELAY_INTERRUPT
+#undef HPT_SERIALIZE_IO
+
+static const char *quirk_drives[] = {
+ "QUANTUM FIREBALLlct08 08",
+ "QUANTUM FIREBALLP KA6.4",
+ "QUANTUM FIREBALLP LM20.4",
+ "QUANTUM FIREBALLP LM20.5",
+ NULL
+};
+
+static const char *bad_ata100_5[] = {
+ "IBM-DTLA-307075",
+ "IBM-DTLA-307060",
+ "IBM-DTLA-307045",
+ "IBM-DTLA-307030",
+ "IBM-DTLA-307020",
+ "IBM-DTLA-307015",
+ "IBM-DTLA-305040",
+ "IBM-DTLA-305030",
+ "IBM-DTLA-305020",
+ "IC35L010AVER07-0",
+ "IC35L020AVER07-0",
+ "IC35L030AVER07-0",
+ "IC35L040AVER07-0",
+ "IC35L060AVER07-0",
+ "WDC AC310200R",
+ NULL
+};
+
+static const char *bad_ata66_4[] = {
+ "IBM-DTLA-307075",
+ "IBM-DTLA-307060",
+ "IBM-DTLA-307045",
+ "IBM-DTLA-307030",
+ "IBM-DTLA-307020",
+ "IBM-DTLA-307015",
+ "IBM-DTLA-305040",
+ "IBM-DTLA-305030",
+ "IBM-DTLA-305020",
+ "IC35L010AVER07-0",
+ "IC35L020AVER07-0",
+ "IC35L030AVER07-0",
+ "IC35L040AVER07-0",
+ "IC35L060AVER07-0",
+ "WDC AC310200R",
+ NULL
+};
+
+static const char *bad_ata66_3[] = {
+ "WDC AC310200R",
+ NULL
+};
+
+static const char *bad_ata33[] = {
+ "Maxtor 92720U8", "Maxtor 92040U6", "Maxtor 91360U4", "Maxtor 91020U3",
"Maxtor 90845U3", "Maxtor 90650U2",
+ "Maxtor 91360D8", "Maxtor 91190D7", "Maxtor 91020D6", "Maxtor 90845D5",
"Maxtor 90680D4", "Maxtor 90510D3", "Maxtor 90340D2",
+ "Maxtor 91152D8", "Maxtor 91008D7", "Maxtor 90845D6", "Maxtor 90840D6",
"Maxtor 90720D5", "Maxtor 90648D5", "Maxtor 90576D4",
+ "Maxtor 90510D4",
+ "Maxtor 90432D3", "Maxtor 90288D2", "Maxtor 90256D2",
+ "Maxtor 91000D8", "Maxtor 90910D8", "Maxtor 90875D7", "Maxtor 90840D7",
"Maxtor 90750D6", "Maxtor 90625D5", "Maxtor 90500D4",
+ "Maxtor 91728D8", "Maxtor 91512D7", "Maxtor 91303D6", "Maxtor 91080D5",
"Maxtor 90845D4", "Maxtor 90680D4", "Maxtor 90648D3", "Maxtor 90432D2",
+ NULL
+};
+
+struct chipset_bus_clock_list_entry {
+ u8 xfer_speed;
+ unsigned int chipset_settings;
+};
+
+/* key for bus clock timings
+ * bit
+ * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW
+ * DMA. cycles = value + 1
+ * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW
+ * DMA. cycles = value + 1
+ * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file
+ * register access.
+ * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file
+ * register access.
+ * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer.
+ * during task file register access.
+ * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA
+ * xfer.
+ * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task
+ * register access.
+ * 28 UDMA enable
+ * 29 DMA enable
+ * 30 PIO_MST enable. if set, the chip is in bus master mode during
+ * PIO.
+ * 31 FIFO enable.
+ */
+static struct chipset_bus_clock_list_entry forty_base_hpt366[] = {
+ { XFER_UDMA_4, 0x900fd943 },
+ { XFER_UDMA_3, 0x900ad943 },
+ { XFER_UDMA_2, 0x900bd943 },
+ { XFER_UDMA_1, 0x9008d943 },
+ { XFER_UDMA_0, 0x9008d943 },
+
+ { XFER_MW_DMA_2, 0xa008d943 },
+ { XFER_MW_DMA_1, 0xa010d955 },
+ { XFER_MW_DMA_0, 0xa010d9fc },
+
+ { XFER_PIO_4, 0xc008d963 },
+ { XFER_PIO_3, 0xc010d974 },
+ { XFER_PIO_2, 0xc010d997 },
+ { XFER_PIO_1, 0xc010d9c7 },
+ { XFER_PIO_0, 0xc018d9d9 },
+ { 0, 0x0120d9d9 }
+};
+
+static struct chipset_bus_clock_list_entry thirty_three_base_hpt366[] = {
+ { XFER_UDMA_4, 0x90c9a731 },
+ { XFER_UDMA_3, 0x90cfa731 },
+ { XFER_UDMA_2, 0x90caa731 },
+ { XFER_UDMA_1, 0x90cba731 },
+ { XFER_UDMA_0, 0x90c8a731 },
+
+ { XFER_MW_DMA_2, 0xa0c8a731 },
+ { XFER_MW_DMA_1, 0xa0c8a732 }, /* 0xa0c8a733 */
+ { XFER_MW_DMA_0, 0xa0c8a797 },
+
+ { XFER_PIO_4, 0xc0c8a731 },
+ { XFER_PIO_3, 0xc0c8a742 },
+ { XFER_PIO_2, 0xc0d0a753 },
+ { XFER_PIO_1, 0xc0d0a7a3 }, /* 0xc0d0a793 */
+ { XFER_PIO_0, 0xc0d0a7aa }, /* 0xc0d0a7a7 */
+ { 0, 0x0120a7a7 }
+};
+
+static struct chipset_bus_clock_list_entry twenty_five_base_hpt366[] = {
+ { XFER_UDMA_4, 0x90c98521 },
+ { XFER_UDMA_3, 0x90cf8521 },
+ { XFER_UDMA_2, 0x90cf8521 },
+ { XFER_UDMA_1, 0x90cb8521 },
+ { XFER_UDMA_0, 0x90cb8521 },
+
+ { XFER_MW_DMA_2, 0xa0ca8521 },
+ { XFER_MW_DMA_1, 0xa0ca8532 },
+ { XFER_MW_DMA_0, 0xa0ca8575 },
+
+ { XFER_PIO_4, 0xc0ca8521 },
+ { XFER_PIO_3, 0xc0ca8532 },
+ { XFER_PIO_2, 0xc0ca8542 },
+ { XFER_PIO_1, 0xc0d08572 },
+ { XFER_PIO_0, 0xc0d08585 },
+ { 0, 0x01208585 }
+};
+
+/* from highpoint documentation. these are old values */
+static struct chipset_bus_clock_list_entry thirty_three_base_hpt370[] = {
+/* { XFER_UDMA_5, 0x1A85F442, 0x16454e31 }, */
+ { XFER_UDMA_5, 0x16454e31 },
+ { XFER_UDMA_4, 0x16454e31 },
+ { XFER_UDMA_3, 0x166d4e31 },
+ { XFER_UDMA_2, 0x16494e31 },
+ { XFER_UDMA_1, 0x164d4e31 },
+ { XFER_UDMA_0, 0x16514e31 },
+
+ { XFER_MW_DMA_2, 0x26514e21 },
+ { XFER_MW_DMA_1, 0x26514e33 },
+ { XFER_MW_DMA_0, 0x26514e97 },
+
+ { XFER_PIO_4, 0x06514e21 },
+ { XFER_PIO_3, 0x06514e22 },
+ { XFER_PIO_2, 0x06514e33 },
+ { XFER_PIO_1, 0x06914e43 },
+ { XFER_PIO_0, 0x06914e57 },
+ { 0, 0x06514e57 }
+};
+
+static struct chipset_bus_clock_list_entry sixty_six_base_hpt370[] = {
+ { XFER_UDMA_5, 0x14846231 },
+ { XFER_UDMA_4, 0x14886231 },
+ { XFER_UDMA_3, 0x148c6231 },
+ { XFER_UDMA_2, 0x148c6231 },
+ { XFER_UDMA_1, 0x14906231 },
+ { XFER_UDMA_0, 0x14986231 },
+
+ { XFER_MW_DMA_2, 0x26514e21 },
+ { XFER_MW_DMA_1, 0x26514e33 },
+ { XFER_MW_DMA_0, 0x26514e97 },
+
+ { XFER_PIO_4, 0x06514e21 },
+ { XFER_PIO_3, 0x06514e22 },
+ { XFER_PIO_2, 0x06514e33 },
+ { XFER_PIO_1, 0x06914e43 },
+ { XFER_PIO_0, 0x06914e57 },
+ { 0, 0x06514e57 }
+};
+
+/* these are the current (4 sep 2001) timings from highpoint */
+static struct chipset_bus_clock_list_entry thirty_three_base_hpt370a[] = {
+ { XFER_UDMA_5, 0x12446231 },
+ { XFER_UDMA_4, 0x12446231 },
+ { XFER_UDMA_3, 0x126c6231 },
+ { XFER_UDMA_2, 0x12486231 },
+ { XFER_UDMA_1, 0x124c6233 },
+ { XFER_UDMA_0, 0x12506297 },
+
+ { XFER_MW_DMA_2, 0x22406c31 },
+ { XFER_MW_DMA_1, 0x22406c33 },
+ { XFER_MW_DMA_0, 0x22406c97 },
+
+ { XFER_PIO_4, 0x06414e31 },
+ { XFER_PIO_3, 0x06414e42 },
+ { XFER_PIO_2, 0x06414e53 },
+ { XFER_PIO_1, 0x06814e93 },
+ { XFER_PIO_0, 0x06814ea7 },
+ { 0, 0x06814ea7 }
+};
+
+/* 2x 33MHz timings */
+static struct chipset_bus_clock_list_entry sixty_six_base_hpt370a[] = {
+ { XFER_UDMA_5, 0x1488e673 },
+ { XFER_UDMA_4, 0x1488e673 },
+ { XFER_UDMA_3, 0x1498e673 },
+ { XFER_UDMA_2, 0x1490e673 },
+ { XFER_UDMA_1, 0x1498e677 },
+ { XFER_UDMA_0, 0x14a0e73f },
+
+ { XFER_MW_DMA_2, 0x2480fa73 },
+ { XFER_MW_DMA_1, 0x2480fa77 },
+ { XFER_MW_DMA_0, 0x2480fb3f },
+
+ { XFER_PIO_4, 0x0c82be73 },
+ { XFER_PIO_3, 0x0c82be95 },
+ { XFER_PIO_2, 0x0c82beb7 },
+ { XFER_PIO_1, 0x0d02bf37 },
+ { XFER_PIO_0, 0x0d02bf5f },
+ { 0, 0x0d02bf5f }
+};
+
+static struct chipset_bus_clock_list_entry fifty_base_hpt370a[] = {
+ { XFER_UDMA_5, 0x12848242 },
+ { XFER_UDMA_4, 0x12ac8242 },
+ { XFER_UDMA_3, 0x128c8242 },
+ { XFER_UDMA_2, 0x120c8242 },
+ { XFER_UDMA_1, 0x12148254 },
+ { XFER_UDMA_0, 0x121882ea },
+
+ { XFER_MW_DMA_2, 0x22808242 },
+ { XFER_MW_DMA_1, 0x22808254 },
+ { XFER_MW_DMA_0, 0x228082ea },
+
+ { XFER_PIO_4, 0x0a81f442 },
+ { XFER_PIO_3, 0x0a81f443 },
+ { XFER_PIO_2, 0x0a81f454 },
+ { XFER_PIO_1, 0x0ac1f465 },
+ { XFER_PIO_0, 0x0ac1f48a },
+ { 0, 0x0ac1f48a }
+};
+
+static struct chipset_bus_clock_list_entry thirty_three_base_hpt372[] = {
+ { XFER_UDMA_6, 0x1c81dc62 },
+ { XFER_UDMA_5, 0x1c6ddc62 },
+ { XFER_UDMA_4, 0x1c8ddc62 },
+ { XFER_UDMA_3, 0x1c8edc62 }, /* checkme */
+ { XFER_UDMA_2, 0x1c91dc62 },
+ { XFER_UDMA_1, 0x1c9adc62 }, /* checkme */
+ { XFER_UDMA_0, 0x1c82dc62 }, /* checkme */
+
+ { XFER_MW_DMA_2, 0x2c829262 },
+ { XFER_MW_DMA_1, 0x2c829266 }, /* checkme */
+ { XFER_MW_DMA_0, 0x2c82922e }, /* checkme */
+
+ { XFER_PIO_4, 0x0c829c62 },
+ { XFER_PIO_3, 0x0c829c84 },
+ { XFER_PIO_2, 0x0c829ca6 },
+ { XFER_PIO_1, 0x0d029d26 },
+ { XFER_PIO_0, 0x0d029d5e },
+ { 0, 0x0d029d5e }
+};
+
+static struct chipset_bus_clock_list_entry fifty_base_hpt372[] = {
+ { XFER_UDMA_5, 0x12848242 },
+ { XFER_UDMA_4, 0x12ac8242 },
+ { XFER_UDMA_3, 0x128c8242 },
+ { XFER_UDMA_2, 0x120c8242 },
+ { XFER_UDMA_1, 0x12148254 },
+ { XFER_UDMA_0, 0x121882ea },
+
+ { XFER_MW_DMA_2, 0x22808242 },
+ { XFER_MW_DMA_1, 0x22808254 },
+ { XFER_MW_DMA_0, 0x228082ea },
+
+ { XFER_PIO_4, 0x0a81f442 },
+ { XFER_PIO_3, 0x0a81f443 },
+ { XFER_PIO_2, 0x0a81f454 },
+ { XFER_PIO_1, 0x0ac1f465 },
+ { XFER_PIO_0, 0x0ac1f48a },
+ { 0, 0x0a81f443 }
+};
+
+static struct chipset_bus_clock_list_entry sixty_six_base_hpt372[] = {
+ { XFER_UDMA_6, 0x1c869c62 },
+ { XFER_UDMA_5, 0x1cae9c62 },
+ { XFER_UDMA_4, 0x1c8a9c62 },
+ { XFER_UDMA_3, 0x1c8e9c62 },
+ { XFER_UDMA_2, 0x1c929c62 },
+ { XFER_UDMA_1, 0x1c9a9c62 },
+ { XFER_UDMA_0, 0x1c829c62 },
+
+ { XFER_MW_DMA_2, 0x2c829c62 },
+ { XFER_MW_DMA_1, 0x2c829c66 },
+ { XFER_MW_DMA_0, 0x2c829d2e },
+
+ { XFER_PIO_4, 0x0c829c62 },
+ { XFER_PIO_3, 0x0c829c84 },
+ { XFER_PIO_2, 0x0c829ca6 },
+ { XFER_PIO_1, 0x0d029d26 },
+ { XFER_PIO_0, 0x0d029d5e },
+ { 0, 0x0d029d26 }
+};
+
+static struct chipset_bus_clock_list_entry thirty_three_base_hpt374[] = {
+ { XFER_UDMA_6, 0x12808242 },
+ { XFER_UDMA_5, 0x12848242 },
+ { XFER_UDMA_4, 0x12ac8242 },
+ { XFER_UDMA_3, 0x128c8242 },
+ { XFER_UDMA_2, 0x120c8242 },
+ { XFER_UDMA_1, 0x12148254 },
+ { XFER_UDMA_0, 0x121882ea },
+
+ { XFER_MW_DMA_2, 0x22808242 },
+ { XFER_MW_DMA_1, 0x22808254 },
+ { XFER_MW_DMA_0, 0x228082ea },
+
+ { XFER_PIO_4, 0x0a81f442 },
+ { XFER_PIO_3, 0x0a81f443 },
+ { XFER_PIO_2, 0x0a81f454 },
+ { XFER_PIO_1, 0x0ac1f465 },
+ { XFER_PIO_0, 0x0ac1f48a },
+ { 0, 0x06814e93 }
+};
+
+/* FIXME: 50MHz timings for HPT374 */
#if 0
+static struct chipset_bus_clock_list_entry sixty_six_base_hpt374[] = {
+ { XFER_UDMA_6, 0x12406231 }, /* checkme */
+ { XFER_UDMA_5, 0x12446231 }, /* 0x14846231 */
+ { XFER_UDMA_4, 0x16814ea7 }, /* 0x14886231 */
+ { XFER_UDMA_3, 0x16814ea7 }, /* 0x148c6231 */
+ { XFER_UDMA_2, 0x16814ea7 }, /* 0x148c6231 */
+ { XFER_UDMA_1, 0x16814ea7 }, /* 0x14906231 */
+ { XFER_UDMA_0, 0x16814ea7 }, /* 0x14986231 */
+ { XFER_MW_DMA_2, 0x16814ea7 }, /* 0x26514e21 */
+ { XFER_MW_DMA_1, 0x16814ea7 }, /* 0x26514e97 */
+ { XFER_MW_DMA_0, 0x16814ea7 }, /* 0x26514e97 */
+ { XFER_PIO_4, 0x06814ea7 }, /* 0x06514e21 */
+ { XFER_PIO_3, 0x06814ea7 }, /* 0x06514e22 */
+ { XFER_PIO_2, 0x06814ea7 }, /* 0x06514e33 */
+ { XFER_PIO_1, 0x06814ea7 }, /* 0x06914e43 */
+ { XFER_PIO_0, 0x06814ea7 }, /* 0x06914e57 */
+ { 0, 0x06814ea7 }
+};
+#endif
+
+#define HPT366_DEBUG_DRIVE_INFO 0
+#define HPT374_ALLOW_ATA133_6 0
+#define HPT371_ALLOW_ATA133_6 0
+#define HPT302_ALLOW_ATA133_6 0
+#define HPT372_ALLOW_ATA133_6 1
+#define HPT370_ALLOW_ATA100_5 1
+#define HPT366_ALLOW_ATA66_4 1
+#define HPT366_ALLOW_ATA66_3 1
+#define HPT366_MAX_DEVS 8
+
+#define F_LOW_PCI_33 0x23
+#define F_LOW_PCI_40 0x29
+#define F_LOW_PCI_50 0x2d
+#define F_LOW_PCI_66 0x42
+
+/* FIXME: compare with driver's code before removing */
+#if 0
if (hpt_minimum_revision(dev, 3)) {
u8 cbl;
cbl = inb(iobase + 0x7b);
@@ -1273,6 +1648,64 @@
return ide_setup_pci_device(dev, d);
}
+static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "HPT366",
+ .init_setup = init_setup_hpt366,
+ .init_chipset = init_chipset_hpt366,
+ .init_hwif = init_hwif_hpt366,
+ .init_dma = init_dma_hpt366,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ .extra = 240
+ },{ /* 1 */
+ .name = "HPT372A",
+ .init_setup = init_setup_hpt37x,
+ .init_chipset = init_chipset_hpt366,
+ .init_hwif = init_hwif_hpt366,
+ .init_dma = init_dma_hpt366,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 2 */
+ .name = "HPT302",
+ .init_setup = init_setup_hpt37x,
+ .init_chipset = init_chipset_hpt366,
+ .init_hwif = init_hwif_hpt366,
+ .init_dma = init_dma_hpt366,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 3 */
+ .name = "HPT371",
+ .init_setup = init_setup_hpt37x,
+ .init_chipset = init_chipset_hpt366,
+ .init_hwif = init_hwif_hpt366,
+ .init_dma = init_dma_hpt366,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 4 */
+ .name = "HPT374",
+ .init_setup = init_setup_hpt374,
+ .init_chipset = init_chipset_hpt366,
+ .init_hwif = init_hwif_hpt366,
+ .init_dma = init_dma_hpt366,
+ .channels = 2, /* 4 */
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 5 */
+ .name = "HPT372N",
+ .init_setup = init_setup_hpt37x,
+ .init_chipset = init_chipset_hpt366,
+ .init_hwif = init_hwif_hpt366,
+ .init_dma = init_dma_hpt366,
+ .channels = 2, /* 4 */
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ }
+};
/**
* hpt366_init_one - called when an HPT366 is found
diff -urN linux/drivers/ide/pci/it8172.c linux/drivers/ide/pci/it8172.c
--- linux/drivers/ide/pci/it8172.c 2005/01/13 14:06:00 1.17
+++ linux/drivers/ide/pci/it8172.c 2005/02/13 20:16:23 1.18
@@ -42,8 +42,6 @@
#include <asm/io.h>
#include <asm/it8172/it8172_int.h>
-#include "it8172.h"
-
/*
* Prototypes
*/
@@ -56,7 +54,7 @@
{
ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *dev = hwif->pci_dev;
- int is_slave = (hwif->drives[1] == drive);
+ int is_slave = (&hwif->drives[1] == drive);
unsigned long flags;
u16 drive_enables;
u32 drive_timing;
@@ -94,7 +92,7 @@
}
pci_write_config_word(dev, 0x40, drive_enables);
- spin_unlock_irqrestore(&ide_lock, flags)
+ spin_unlock_irqrestore(&ide_lock, flags);
}
static u8 it8172_dma_2_pio (u8 xfer_rate)
@@ -266,6 +264,18 @@
hwif->drives[1].autodma = hwif->autodma;
}
+static ide_pci_device_t it8172_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "IT8172G",
+ .init_chipset = init_chipset_it8172,
+ .init_hwif = init_hwif_it8172,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .enablebits = {{0x00,0x00,0x00}, {0x40,0x00,0x01}},
+ .bootable = ON_BOARD,
+ }
+};
+
static int __devinit it8172_init_one(struct pci_dev *dev, const struct
pci_device_id *id)
{
if ((!(PCI_FUNC(dev->devfn) & 1) ||
diff -urN linux/drivers/ide/pci/opti621.c linux/drivers/ide/pci/opti621.c
--- linux/drivers/ide/pci/opti621.c 2005/01/13 14:06:00 1.16
+++ linux/drivers/ide/pci/opti621.c 2005/02/13 20:16:23 1.17
@@ -104,8 +104,6 @@
#include <asm/io.h>
-#include "opti621.h"
-
#define OPTI621_MAX_PIO 3
/* In fact, I do not have any PIO 4 drive
* (address: 25 ns, data: 70 ns, recovery: 35 ns),
@@ -348,10 +346,23 @@
hwif->drives[1].autodma = hwif->autodma;
}
-static int __init init_setup_opti621 (struct pci_dev *dev, ide_pci_device_t *d)
-{
- return ide_setup_pci_device(dev, d);
-}
+static ide_pci_device_t opti621_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "OPTI621",
+ .init_hwif = init_hwif_opti621,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
+ .bootable = ON_BOARD,
+ },{ /* 1 */
+ .name = "OPTI621X",
+ .init_hwif = init_hwif_opti621,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
+ .bootable = ON_BOARD,
+ }
+};
static int __devinit opti621_init_one(struct pci_dev *dev, const struct
pci_device_id *id)
{
diff -urN linux/drivers/ide/pci/pdc202xx_new.c
linux/drivers/ide/pci/pdc202xx_new.c
--- linux/drivers/ide/pci/pdc202xx_new.c 2005/01/13 14:06:00 1.26
+++ linux/drivers/ide/pci/pdc202xx_new.c 2005/02/13 20:16:23 1.27
@@ -37,10 +37,46 @@
#include <asm/pci-bridge.h>
#endif
-#include "pdc202xx_new.h"
-
#define PDC202_DEBUG_CABLE 0
+const static char *pdc_quirk_drives[] = {
+ "QUANTUM FIREBALLlct08 08",
+ "QUANTUM FIREBALLP KA6.4",
+ "QUANTUM FIREBALLP KA9.1",
+ "QUANTUM FIREBALLP LM20.4",
+ "QUANTUM FIREBALLP KX13.6",
+ "QUANTUM FIREBALLP KX20.5",
+ "QUANTUM FIREBALLP KX27.3",
+ "QUANTUM FIREBALLP LM20.5",
+ NULL
+};
+
+#define set_2regs(a, b) \
+ do { \
+ hwif->OUTB((a + adj), indexreg); \
+ hwif->OUTB(b, datareg); \
+ } while(0)
+
+#define set_ultra(a, b, c) \
+ do { \
+ set_2regs(0x10,(a)); \
+ set_2regs(0x11,(b)); \
+ set_2regs(0x12,(c)); \
+ } while(0)
+
+#define set_ata2(a, b) \
+ do { \
+ set_2regs(0x0e,(a)); \
+ set_2regs(0x0f,(b)); \
+ } while(0)
+
+#define set_pio(a, b, c) \
+ do { \
+ set_2regs(0x0c,(a)); \
+ set_2regs(0x0d,(b)); \
+ set_2regs(0x13,(c)); \
+ } while(0)
+
static u8 pdcnew_ratemask (ide_drive_t *drive)
{
u8 mode;
@@ -360,6 +396,72 @@
return ide_setup_pci_device(dev, d);
}
+static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "PDC20268",
+ .init_setup = init_setup_pdcnew,
+ .init_chipset = init_chipset_pdcnew,
+ .init_hwif = init_hwif_pdc202new,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 1 */
+ .name = "PDC20269",
+ .init_setup = init_setup_pdcnew,
+ .init_chipset = init_chipset_pdcnew,
+ .init_hwif = init_hwif_pdc202new,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 2 */
+ .name = "PDC20270",
+ .init_setup = init_setup_pdc20270,
+ .init_chipset = init_chipset_pdcnew,
+ .init_hwif = init_hwif_pdc202new,
+ .channels = 2,
+ .autodma = AUTODMA,
+#ifndef CONFIG_PDC202XX_FORCE
+ .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
+#endif
+ .bootable = OFF_BOARD,
+ },{ /* 3 */
+ .name = "PDC20271",
+ .init_setup = init_setup_pdcnew,
+ .init_chipset = init_chipset_pdcnew,
+ .init_hwif = init_hwif_pdc202new,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 4 */
+ .name = "PDC20275",
+ .init_setup = init_setup_pdcnew,
+ .init_chipset = init_chipset_pdcnew,
+ .init_hwif = init_hwif_pdc202new,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 5 */
+ .name = "PDC20276",
+ .init_setup = init_setup_pdc20276,
+ .init_chipset = init_chipset_pdcnew,
+ .init_hwif = init_hwif_pdc202new,
+ .channels = 2,
+ .autodma = AUTODMA,
+#ifndef CONFIG_PDC202XX_FORCE
+ .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
+#endif
+ .bootable = OFF_BOARD,
+ },{ /* 6 */
+ .name = "PDC20277",
+ .init_setup = init_setup_pdcnew,
+ .init_chipset = init_chipset_pdcnew,
+ .init_hwif = init_hwif_pdc202new,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ }
+};
+
/**
* pdc202new_init_one - called when a pdc202xx is found
* @dev: the pdc202new device
diff -urN linux/drivers/ide/pci/pdc202xx_old.c
linux/drivers/ide/pci/pdc202xx_old.c
--- linux/drivers/ide/pci/pdc202xx_old.c 2005/01/13 14:06:00 1.27
+++ linux/drivers/ide/pci/pdc202xx_old.c 2005/02/13 20:16:23 1.28
@@ -46,9 +46,60 @@
#include <asm/io.h>
#include <asm/irq.h>
-#include "pdc202xx_old.h"
+#define PDC202_DEBUG_CABLE 0
+#define PDC202XX_DEBUG_DRIVE_INFO 0
-#define PDC202_DEBUG_CABLE 0
+static const char *pdc_quirk_drives[] = {
+ "QUANTUM FIREBALLlct08 08",
+ "QUANTUM FIREBALLP KA6.4",
+ "QUANTUM FIREBALLP KA9.1",
+ "QUANTUM FIREBALLP LM20.4",
+ "QUANTUM FIREBALLP KX13.6",
+ "QUANTUM FIREBALLP KX20.5",
+ "QUANTUM FIREBALLP KX27.3",
+ "QUANTUM FIREBALLP LM20.5",
+ NULL
+};
+
+/* A Register */
+#define SYNC_ERRDY_EN 0xC0
+
+#define SYNC_IN 0x80 /* control bit, different for master
vs. slave drives */
+#define ERRDY_EN 0x40 /* control bit, different for master
vs. slave drives */
+#define IORDY_EN 0x20 /* PIO: IOREADY */
+#define PREFETCH_EN 0x10 /* PIO: PREFETCH */
+
+#define PA3 0x08 /* PIO"A" timing */
+#define PA2 0x04 /* PIO"A" timing */
+#define PA1 0x02 /* PIO"A" timing */
+#define PA0 0x01 /* PIO"A" timing */
+
+/* B Register */
+
+#define MB2 0x80 /* DMA"B" timing */
+#define MB1 0x40 /* DMA"B" timing */
+#define MB0 0x20 /* DMA"B" timing */
+
+#define PB4 0x10 /* PIO_FORCE 1:0 */
+
+#define PB3 0x08 /* PIO"B" timing */ /* PIO flow
Control mode */
+#define PB2 0x04 /* PIO"B" timing */ /* PIO 4 */
+#define PB1 0x02 /* PIO"B" timing */ /* PIO 3 half */
+#define PB0 0x01 /* PIO"B" timing */ /* PIO 3 other
half */
+
+/* C Register */
+#define IORDYp_NO_SPEED 0x4F
+#define SPEED_DIS 0x0F
+
+#define DMARQp 0x80
+#define IORDYp 0x40
+#define DMAR_EN 0x20
+#define DMAW_EN 0x10
+
+#define MC3 0x08 /* DMA"C" timing */
+#define MC2 0x04 /* DMA"C" timing */
+#define MC1 0x02 /* DMA"C" timing */
+#define MC0 0x01 /* DMA"C" timing */
#if 0
unsigned long bibma = pci_resource_start(dev, 4);
@@ -69,7 +120,8 @@
((sc1c & 0x02) == 0x02) ? "8" :
((sc1c & 0x01) == 0x01) ? "6" :
((sc1c & 0x00) == 0x00) ? "4" : "??");
- SPLIT_BYTE(sc1e, hi, lo);
+ hi = sc1e >> 4;
+ lo = sc1e & 0xf;
p += sprintf(p, "Status Polling Period : %d\n", hi);
p += sprintf(p, "Interrupt Check Status Polling Delay : %d\n", lo);
#endif
@@ -725,6 +777,77 @@
return ide_setup_pci_device(dev, d);
}
+static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "PDC20246",
+ .init_setup = init_setup_pdc202ata4,
+ .init_chipset = init_chipset_pdc202xx,
+ .init_hwif = init_hwif_pdc202xx,
+ .init_dma = init_dma_pdc202xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+#ifndef CONFIG_PDC202XX_FORCE
+ .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
+#endif
+ .bootable = OFF_BOARD,
+ .extra = 16,
+ },{ /* 1 */
+ .name = "PDC20262",
+ .init_setup = init_setup_pdc202ata4,
+ .init_chipset = init_chipset_pdc202xx,
+ .init_hwif = init_hwif_pdc202xx,
+ .init_dma = init_dma_pdc202xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+#ifndef CONFIG_PDC202XX_FORCE
+ .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
+#endif
+ .bootable = OFF_BOARD,
+ .extra = 48,
+ .flags = IDEPCI_FLAG_FORCE_PDC,
+ },{ /* 2 */
+ .name = "PDC20263",
+ .init_setup = init_setup_pdc202ata4,
+ .init_chipset = init_chipset_pdc202xx,
+ .init_hwif = init_hwif_pdc202xx,
+ .init_dma = init_dma_pdc202xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+#ifndef CONFIG_PDC202XX_FORCE
+ .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
+#endif
+ .bootable = OFF_BOARD,
+ .extra = 48,
+ },{ /* 3 */
+ .name = "PDC20265",
+ .init_setup = init_setup_pdc20265,
+ .init_chipset = init_chipset_pdc202xx,
+ .init_hwif = init_hwif_pdc202xx,
+ .init_dma = init_dma_pdc202xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+#ifndef CONFIG_PDC202XX_FORCE
+ .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
+#endif
+ .bootable = OFF_BOARD,
+ .extra = 48,
+ .flags = IDEPCI_FLAG_FORCE_PDC,
+ },{ /* 4 */
+ .name = "PDC20267",
+ .init_setup = init_setup_pdc202xx,
+ .init_chipset = init_chipset_pdc202xx,
+ .init_hwif = init_hwif_pdc202xx,
+ .init_dma = init_dma_pdc202xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+#ifndef CONFIG_PDC202XX_FORCE
+ .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
+#endif
+ .bootable = OFF_BOARD,
+ .extra = 48,
+ }
+};
+
/**
* pdc202xx_init_one - called when a PDC202xx is found
* @dev: the pdc202xx device
diff -urN linux/drivers/ide/pci/piix.c linux/drivers/ide/pci/piix.c
--- linux/drivers/ide/pci/piix.c 2005/01/25 04:28:15 1.27
+++ linux/drivers/ide/pci/piix.c 2005/02/13 20:16:23 1.28
@@ -103,8 +103,6 @@
#include <asm/io.h>
-#include "piix.h"
-
static int no_piix_dma;
/**
@@ -530,19 +528,51 @@
hwif->drives[0].autodma = hwif->autodma;
}
-/**
- * init_setup_piix - callback for IDE initialize
- * @dev: PIIX PCI device
- * @d: IDE pci info
- *
- * Enable the xp fixup for the PIIX controller and then perform
- * a standard ide PCI setup
- */
-
-static int __devinit init_setup_piix(struct pci_dev *dev, ide_pci_device_t *d)
-{
- return ide_setup_pci_device(dev, d);
-}
+#define DECLARE_PIIX_DEV(name_str) \
+ { \
+ .name = name_str, \
+ .init_chipset = init_chipset_piix, \
+ .init_hwif = init_hwif_piix, \
+ .channels = 2, \
+ .autodma = AUTODMA, \
+ .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
+ .bootable = ON_BOARD, \
+ }
+
+static ide_pci_device_t piix_pci_info[] __devinitdata = {
+ /* 0 */ DECLARE_PIIX_DEV("PIIXa"),
+ /* 1 */ DECLARE_PIIX_DEV("PIIXb"),
+
+ { /* 2 */
+ .name = "MPIIX",
+ .init_hwif = init_hwif_piix,
+ .channels = 2,
+ .autodma = NODMA,
+ .enablebits = {{0x6D,0x80,0x80}, {0x6F,0x80,0x80}},
+ .bootable = ON_BOARD,
+ },
+
+ /* 3 */ DECLARE_PIIX_DEV("PIIX3"),
+ /* 4 */ DECLARE_PIIX_DEV("PIIX4"),
+ /* 5 */ DECLARE_PIIX_DEV("ICH0"),
+ /* 6 */ DECLARE_PIIX_DEV("PIIX4"),
+ /* 7 */ DECLARE_PIIX_DEV("ICH"),
+ /* 8 */ DECLARE_PIIX_DEV("PIIX4"),
+ /* 9 */ DECLARE_PIIX_DEV("PIIX4"),
+ /* 10 */ DECLARE_PIIX_DEV("ICH2"),
+ /* 11 */ DECLARE_PIIX_DEV("ICH2M"),
+ /* 12 */ DECLARE_PIIX_DEV("ICH3M"),
+ /* 13 */ DECLARE_PIIX_DEV("ICH3"),
+ /* 14 */ DECLARE_PIIX_DEV("ICH4"),
+ /* 15 */ DECLARE_PIIX_DEV("ICH5"),
+ /* 16 */ DECLARE_PIIX_DEV("C-ICH"),
+ /* 17 */ DECLARE_PIIX_DEV("ICH4"),
+ /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA"),
+ /* 19 */ DECLARE_PIIX_DEV("ICH5"),
+ /* 20 */ DECLARE_PIIX_DEV("ICH6"),
+ /* 21 */ DECLARE_PIIX_DEV("ICH7"),
+ /* 22 */ DECLARE_PIIX_DEV("ICH4"),
+};
/**
* piix_init_one - called when a PIIX is found
@@ -557,7 +587,7 @@
{
ide_pci_device_t *d = &piix_pci_info[id->driver_data];
- return d->init_setup(dev, d);
+ return ide_setup_pci_device(dev, d);
}
/**
diff -urN linux/drivers/ide/pci/serverworks.c
linux/drivers/ide/pci/serverworks.c
--- linux/drivers/ide/pci/serverworks.c 2005/01/13 14:06:00 1.22
+++ linux/drivers/ide/pci/serverworks.c 2005/02/13 20:16:23 1.23
@@ -39,7 +39,18 @@
#include <asm/io.h>
-#include "serverworks.h"
+#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5
(A2.0) */
+#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
+
+/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
+ * can overrun their FIFOs when used with the CSB5 */
+static const char *svwks_bad_ata100[] = {
+ "ST320011A",
+ "ST340016A",
+ "ST360021A",
+ "ST380021A",
+ NULL
+};
static u8 svwks_revision = 0;
static struct pci_dev *isa_dev;
@@ -582,6 +593,44 @@
return ide_setup_pci_device(dev, d);
}
+static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "SvrWks OSB4",
+ .init_setup = init_setup_svwks,
+ .init_chipset = init_chipset_svwks,
+ .init_hwif = init_hwif_svwks,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 1 */
+ .name = "SvrWks CSB5",
+ .init_setup = init_setup_svwks,
+ .init_chipset = init_chipset_svwks,
+ .init_hwif = init_hwif_svwks,
+ .init_dma = init_dma_svwks,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 2 */
+ .name = "SvrWks CSB6",
+ .init_setup = init_setup_csb6,
+ .init_chipset = init_chipset_svwks,
+ .init_hwif = init_hwif_svwks,
+ .init_dma = init_dma_svwks,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = ON_BOARD,
+ },{ /* 3 */
+ .name = "SvrWks CSB6",
+ .init_setup = init_setup_csb6,
+ .init_chipset = init_chipset_svwks,
+ .init_hwif = init_hwif_svwks,
+ .init_dma = init_dma_svwks,
+ .channels = 1, /* 2 */
+ .autodma = AUTODMA,
+ .bootable = ON_BOARD,
+ }
+};
/**
* svwks_init_one - called when a OSB/CSB is found
diff -urN linux/drivers/ide/pci/sgiioc4.c linux/drivers/ide/pci/sgiioc4.c
--- linux/drivers/ide/pci/sgiioc4.c 2005/01/13 14:06:00 1.12
+++ linux/drivers/ide/pci/sgiioc4.c 2005/02/13 20:16:23 1.13
@@ -669,7 +669,8 @@
printk(KERN_INFO "%s: %s Bus-Master DMA disabled\n",
hwif->name, d->name);
- probe_hwif_init(hwif);
+ if (probe_hwif_init(hwif))
+ return -EIO;
/* Create /proc/ide entries */
create_proc_ide_interfaces();
diff -urN linux/drivers/ide/pci/siimage.c linux/drivers/ide/pci/siimage.c
--- linux/drivers/ide/pci/siimage.c 2005/01/13 14:06:00 1.26
+++ linux/drivers/ide/pci/siimage.c 2005/02/13 20:16:23 1.27
@@ -590,7 +590,7 @@
if ((hwif->INL(SATA_STATUS_REG) & 0x03) != 0x03) {
printk(KERN_WARNING "%s: reset phy dead,
status=0x%08x\n",
hwif->name, hwif->INL(SATA_STATUS_REG));
- HWGROUP(drive)->poll_timeout = 0;
+ HWGROUP(drive)->polling = 0;
return ide_started;
}
return 0;
diff -urN linux/drivers/ide/pci/via82cxxx.c linux/drivers/ide/pci/via82cxxx.c
--- linux/drivers/ide/pci/via82cxxx.c 2005/02/07 02:54:45 1.21
+++ linux/drivers/ide/pci/via82cxxx.c 2005/02/13 20:16:23 1.22
@@ -589,7 +589,7 @@
hwif->speedproc = &via_set_drive;
-#ifdef CONFIG_PPC_MULTIPLATFORM
+#if defined(CONFIG_PPC_MULTIPLATFORM) && defined(CONFIG_PPC32)
if(_machine == _MACH_chrp && _chrp_type == _CHRP_Pegasos) {
hwif->irq = hwif->channel ? 15 : 14;
}
diff -urN linux/drivers/ide/pci/adma100.c linux/drivers/ide/pci/adma100.c
--- linux/drivers/ide/pci/Attic/adma100.c Sun Feb 13 20:16:23 2005
1.3
+++ linux/drivers/ide/pci/Attic/adma100.c 1970/01/01 00:00:002002
@@ -1,30 +0,0 @@
-/*
- * linux/drivers/ide/pci/adma100.c -- basic support for Pacific Digital
ADMA-100 boards
- *
- * Created 09 Apr 2002 by Mark Lord
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive for
- * more details.
- */
-
-#include <linux/mm.h>
-#include <linux/blkdev.h>
-#include <linux/hdreg.h>
-#include <linux/ide.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <asm/io.h>
-
-void __init ide_init_adma100 (ide_hwif_t *hwif)
-{
- unsigned long phy_admctl = pci_resource_start(hwif->pci_dev, 4) + 0x80
+ (hwif->channel * 0x20);
- void *v_admctl;
-
- hwif->autodma = 0; // not compatible with normal IDE DMA
transfers
- hwif->dma_base = 0; // disable DMA completely
- hwif->io_ports[IDE_CONTROL_OFFSET] += 4; // chip needs offset of
6 instead of 2
- v_admctl = ioremap_nocache(phy_admctl, 1024); // map config regs, so
we can turn on drive IRQs
- *((unsigned short *)v_admctl) &= 3; // enable aIEN;
preserve PIO mode
- iounmap(v_admctl); // all done; unmap
config regs
-}
diff -urN linux/drivers/ide/pci/adma100.h linux/drivers/ide/pci/adma100.h
--- linux/drivers/ide/pci/Attic/adma100.h Sun Feb 13 20:16:23 2005
1.4
+++ linux/drivers/ide/pci/Attic/adma100.h 1970/01/01 00:00:002002
@@ -1,28 +0,0 @@
-#ifndef ADMA_100_H
-#define ADMA_100_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-extern void init_setup_pdcadma(struct pci_dev *, ide_pci_device_t *);
-extern unsigned int init_chipset_pdcadma(struct pci_dev *, const char *);
-extern void init_hwif_pdcadma(ide_hwif_t *);
-extern void init_dma_pdcadma(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t pdcadma_chipsets[] __devinitdata = {
- {
- .vendor = PCI_VENDOR_ID_PDC,
- .device = PCI_DEVICE_ID_PDC_1841,
- .name = "ADMA100",
- .init_setup = init_setup_pdcadma,
- .init_chipset = init_chipset_pdcadma,
- .init_hwif = init_hwif_pdcadma,
- .init_dma = init_dma_pdcadma,
- .channels = 2,
- .autodma = NODMA,
- .bootable = OFF_BOARD,
- }
-}
-
-#endif /* ADMA_100_H */
diff -urN linux/drivers/ide/pci/aec62xx.h linux/drivers/ide/pci/aec62xx.h
--- linux/drivers/ide/pci/Attic/aec62xx.h Sun Feb 13 20:16:23 2005
1.13
+++ linux/drivers/ide/pci/Attic/aec62xx.h 1970/01/01 00:00:002002
@@ -1,122 +0,0 @@
-#ifndef AEC62XX_H
-#define AEC62XX_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-struct chipset_bus_clock_list_entry {
- byte xfer_speed;
- byte chipset_settings;
- byte ultra_settings;
-};
-
-static struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
- { XFER_UDMA_6, 0x31, 0x07 },
- { XFER_UDMA_5, 0x31, 0x06 },
- { XFER_UDMA_4, 0x31, 0x05 },
- { XFER_UDMA_3, 0x31, 0x04 },
- { XFER_UDMA_2, 0x31, 0x03 },
- { XFER_UDMA_1, 0x31, 0x02 },
- { XFER_UDMA_0, 0x31, 0x01 },
-
- { XFER_MW_DMA_2, 0x31, 0x00 },
- { XFER_MW_DMA_1, 0x31, 0x00 },
- { XFER_MW_DMA_0, 0x0a, 0x00 },
- { XFER_PIO_4, 0x31, 0x00 },
- { XFER_PIO_3, 0x33, 0x00 },
- { XFER_PIO_2, 0x08, 0x00 },
- { XFER_PIO_1, 0x0a, 0x00 },
- { XFER_PIO_0, 0x00, 0x00 },
- { 0, 0x00, 0x00 }
-};
-
-static struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
- { XFER_UDMA_6, 0x41, 0x06 },
- { XFER_UDMA_5, 0x41, 0x05 },
- { XFER_UDMA_4, 0x41, 0x04 },
- { XFER_UDMA_3, 0x41, 0x03 },
- { XFER_UDMA_2, 0x41, 0x02 },
- { XFER_UDMA_1, 0x41, 0x01 },
- { XFER_UDMA_0, 0x41, 0x01 },
-
- { XFER_MW_DMA_2, 0x41, 0x00 },
- { XFER_MW_DMA_1, 0x42, 0x00 },
- { XFER_MW_DMA_0, 0x7a, 0x00 },
- { XFER_PIO_4, 0x41, 0x00 },
- { XFER_PIO_3, 0x43, 0x00 },
- { XFER_PIO_2, 0x78, 0x00 },
- { XFER_PIO_1, 0x7a, 0x00 },
- { XFER_PIO_0, 0x70, 0x00 },
- { 0, 0x00, 0x00 }
-};
-
-#ifndef SPLIT_BYTE
-#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
-#endif
-#ifndef MAKE_WORD
-#define MAKE_WORD(W,HB,LB) ((W)=((HB<<8)+LB))
-#endif
-
-#define BUSCLOCK(D) \
- ((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D)))
-
-static int init_setup_aec6x80(struct pci_dev *, ide_pci_device_t *);
-static int init_setup_aec62xx(struct pci_dev *, ide_pci_device_t *);
-static unsigned int init_chipset_aec62xx(struct pci_dev *, const char *);
-static void init_hwif_aec62xx(ide_hwif_t *);
-static void init_dma_aec62xx(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "AEC6210",
- .init_setup = init_setup_aec62xx,
- .init_chipset = init_chipset_aec62xx,
- .init_hwif = init_hwif_aec62xx,
- .init_dma = init_dma_aec62xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
- .bootable = OFF_BOARD,
- },{ /* 1 */
- .name = "AEC6260",
- .init_setup = init_setup_aec62xx,
- .init_chipset = init_chipset_aec62xx,
- .init_hwif = init_hwif_aec62xx,
- .init_dma = init_dma_aec62xx,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 2 */
- .name = "AEC6260R",
- .init_setup = init_setup_aec62xx,
- .init_chipset = init_chipset_aec62xx,
- .init_hwif = init_hwif_aec62xx,
- .init_dma = init_dma_aec62xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
- .bootable = NEVER_BOARD,
- },{ /* 3 */
- .name = "AEC6X80",
- .init_setup = init_setup_aec6x80,
- .init_chipset = init_chipset_aec62xx,
- .init_hwif = init_hwif_aec62xx,
- .init_dma = init_dma_aec62xx,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 4 */
- .name = "AEC6X80R",
- .init_setup = init_setup_aec6x80,
- .init_chipset = init_chipset_aec62xx,
- .init_hwif = init_hwif_aec62xx,
- .init_dma = init_dma_aec62xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
- .bootable = OFF_BOARD,
- }
-};
-
-#endif /* AEC62XX_H */
diff -urN linux/drivers/ide/pci/cmd64x.h linux/drivers/ide/pci/cmd64x.h
--- linux/drivers/ide/pci/Attic/cmd64x.h Sun Feb 13 20:16:23 2005
1.10
+++ linux/drivers/ide/pci/Attic/cmd64x.h 1970/01/01 00:00:002002
@@ -1,95 +0,0 @@
-#ifndef CMD64X_H
-#define CMD64X_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define DISPLAY_CMD64X_TIMINGS
-
-#define CMD_DEBUG 0
-
-#if CMD_DEBUG
-#define cmdprintk(x...) printk(x)
-#else
-#define cmdprintk(x...)
-#endif
-
-/*
- * CMD64x specific registers definition.
- */
-#define CFR 0x50
-#define CFR_INTR_CH0 0x02
-#define CNTRL 0x51
-#define CNTRL_DIS_RA0 0x40
-#define CNTRL_DIS_RA1 0x80
-#define CNTRL_ENA_2ND 0x08
-
-#define CMDTIM 0x52
-#define ARTTIM0 0x53
-#define DRWTIM0 0x54
-#define ARTTIM1 0x55
-#define DRWTIM1 0x56
-#define ARTTIM23 0x57
-#define ARTTIM23_DIS_RA2 0x04
-#define ARTTIM23_DIS_RA3 0x08
-#define ARTTIM23_INTR_CH1 0x10
-#define ARTTIM2 0x57
-#define ARTTIM3 0x57
-#define DRWTIM23 0x58
-#define DRWTIM2 0x58
-#define BRST 0x59
-#define DRWTIM3 0x5b
-
-#define BMIDECR0 0x70
-#define MRDMODE 0x71
-#define MRDMODE_INTR_CH0 0x04
-#define MRDMODE_INTR_CH1 0x08
-#define MRDMODE_BLK_CH0 0x10
-#define MRDMODE_BLK_CH1 0x20
-#define BMIDESR0 0x72
-#define UDIDETCR0 0x73
-#define DTPR0 0x74
-#define BMIDECR1 0x78
-#define BMIDECSR 0x79
-#define BMIDESR1 0x7A
-#define UDIDETCR1 0x7B
-#define DTPR1 0x7C
-
-static unsigned int init_chipset_cmd64x(struct pci_dev *, const char *);
-static void init_hwif_cmd64x(ide_hwif_t *);
-
-static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "CMD643",
- .init_chipset = init_chipset_cmd64x,
- .init_hwif = init_hwif_cmd64x,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 1 */
- .name = "CMD646",
- .init_chipset = init_chipset_cmd64x,
- .init_hwif = init_hwif_cmd64x,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x51,0x80,0x80}},
- .bootable = ON_BOARD,
- },{ /* 2 */
- .name = "CMD648",
- .init_chipset = init_chipset_cmd64x,
- .init_hwif = init_hwif_cmd64x,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{
- .name = "CMD649",
- .init_chipset = init_chipset_cmd64x,
- .init_hwif = init_hwif_cmd64x,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- }
-};
-
-#endif /* CMD64X_H */
diff -urN linux/drivers/ide/pci/cy82c693.h linux/drivers/ide/pci/cy82c693.h
--- linux/drivers/ide/pci/Attic/cy82c693.h Sun Feb 13 20:16:23 2005
1.8
+++ linux/drivers/ide/pci/Attic/cy82c693.h 1970/01/01 00:00:002002
@@ -1,83 +0,0 @@
-#ifndef CY82C693_H
-#define CY82C693_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-/* the current version */
-#define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs
(akrebs@altavista.net)"
-
-/*
- * The following are used to debug the driver.
- */
-#define CY82C693_DEBUG_LOGS 0
-#define CY82C693_DEBUG_INFO 0
-
-/* define CY82C693_SETDMA_CLOCK to set DMA Controller Clock Speed to ATCLK */
-#undef CY82C693_SETDMA_CLOCK
-
-/*
- * NOTE: the value for busmaster timeout is tricky and I got it by
- * trial and error! By using a to low value will cause DMA timeouts
- * and drop IDE performance, and by using a to high value will cause
- * audio playback to scatter.
- * If you know a better value or how to calc it, please let me know.
- */
-
-/* twice the value written in cy82c693ub datasheet */
-#define BUSMASTER_TIMEOUT 0x50
-/*
- * the value above was tested on my machine and it seems to work okay
- */
-
-/* here are the offset definitions for the registers */
-#define CY82_IDE_CMDREG 0x04
-#define CY82_IDE_ADDRSETUP 0x48
-#define CY82_IDE_MASTER_IOR 0x4C
-#define CY82_IDE_MASTER_IOW 0x4D
-#define CY82_IDE_SLAVE_IOR 0x4E
-#define CY82_IDE_SLAVE_IOW 0x4F
-#define CY82_IDE_MASTER_8BIT 0x50
-#define CY82_IDE_SLAVE_8BIT 0x51
-
-#define CY82_INDEX_PORT 0x22
-#define CY82_DATA_PORT 0x23
-
-#define CY82_INDEX_CTRLREG1 0x01
-#define CY82_INDEX_CHANNEL0 0x30
-#define CY82_INDEX_CHANNEL1 0x31
-#define CY82_INDEX_TIMEOUT 0x32
-
-/* the max PIO mode - from datasheet */
-#define CY82C693_MAX_PIO 4
-
-/* the min and max PCI bus speed in MHz - from datasheet */
-#define CY82C963_MIN_BUS_SPEED 25
-#define CY82C963_MAX_BUS_SPEED 33
-
-/* the struct for the PIO mode timings */
-typedef struct pio_clocks_s {
- u8 address_time; /* Address setup (clocks) */
- u8 time_16r; /* clocks for 16bit IOR (0xF0=Active/data,
0x0F=Recovery) */
- u8 time_16w; /* clocks for 16bit IOW (0xF0=Active/data,
0x0F=Recovery) */
- u8 time_8; /* clocks for 8bit (0xF0=Active/data,
0x0F=Recovery) */
-} pio_clocks_t;
-
-static unsigned int init_chipset_cy82c693(struct pci_dev *, const char *);
-static void init_hwif_cy82c693(ide_hwif_t *);
-static void init_iops_cy82c693(ide_hwif_t *);
-
-static ide_pci_device_t cy82c693_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "CY82C693",
- .init_chipset = init_chipset_cy82c693,
- .init_iops = init_iops_cy82c693,
- .init_hwif = init_hwif_cy82c693,
- .channels = 1,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- }
-};
-
-#endif /* CY82C693_H */
diff -urN linux/drivers/ide/pci/generic.h linux/drivers/ide/pci/generic.h
--- linux/drivers/ide/pci/Attic/generic.h Sun Feb 13 20:16:23 2005
1.10
+++ linux/drivers/ide/pci/Attic/generic.h 1970/01/01 00:00:002002
@@ -1,120 +0,0 @@
-#ifndef IDE_GENERIC_H
-#define IDE_GENERIC_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static unsigned int init_chipset_generic(struct pci_dev *, const char *);
-static void init_hwif_generic(ide_hwif_t *);
-
-static ide_pci_device_t generic_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "NS87410",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}},
- .bootable = ON_BOARD,
- },{ /* 1 */
- .name = "SAMURAI",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 2 */
- .name = "HT6565",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 3 */
- .name = "UM8673F",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NODMA,
- .bootable = ON_BOARD,
- },{ /* 4 */
- .name = "UM8886A",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NODMA,
- .bootable = ON_BOARD,
- },{ /* 5 */
- .name = "UM8886BF",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NODMA,
- .bootable = ON_BOARD,
- },{ /* 6 */
- .name = "HINT_IDE",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 7 */
- .name = "VIA_IDE",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = ON_BOARD,
- },{ /* 8 */
- .name = "OPTI621V",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = ON_BOARD,
- },{ /* 9 */
- .name = "VIA8237SATA",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 10 */
- .name = "Piccolo0102",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = ON_BOARD,
- },{ /* 11 */
- .name = "Piccolo0103",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = ON_BOARD,
- },{ /* 12 */
- .name = "Piccolo0105",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = ON_BOARD,
- }
-};
-
-#if 0
-static ide_pci_device_t unknown_chipset[] __devinitdata = {
- { /* 0 */
- .name = "PCI_IDE",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- }
-};
-#endif
-
-#endif /* IDE_GENERIC_H */
diff -urN linux/drivers/ide/pci/hpt366.h linux/drivers/ide/pci/hpt366.h
--- linux/drivers/ide/pci/Attic/hpt366.h Sun Feb 13 20:16:23 2005
1.12
+++ linux/drivers/ide/pci/Attic/hpt366.h 1970/01/01 00:00:002002
@@ -1,483 +0,0 @@
-#ifndef HPT366_H
-#define HPT366_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-/* various tuning parameters */
-#define HPT_RESET_STATE_ENGINE
-#undef HPT_DELAY_INTERRUPT
-#undef HPT_SERIALIZE_IO
-
-static const char *quirk_drives[] = {
- "QUANTUM FIREBALLlct08 08",
- "QUANTUM FIREBALLP KA6.4",
- "QUANTUM FIREBALLP LM20.4",
- "QUANTUM FIREBALLP LM20.5",
- NULL
-};
-
-static const char *bad_ata100_5[] = {
- "IBM-DTLA-307075",
- "IBM-DTLA-307060",
- "IBM-DTLA-307045",
- "IBM-DTLA-307030",
- "IBM-DTLA-307020",
- "IBM-DTLA-307015",
- "IBM-DTLA-305040",
- "IBM-DTLA-305030",
- "IBM-DTLA-305020",
- "IC35L010AVER07-0",
- "IC35L020AVER07-0",
- "IC35L030AVER07-0",
- "IC35L040AVER07-0",
- "IC35L060AVER07-0",
- "WDC AC310200R",
- NULL
-};
-
-static const char *bad_ata66_4[] = {
- "IBM-DTLA-307075",
- "IBM-DTLA-307060",
- "IBM-DTLA-307045",
- "IBM-DTLA-307030",
- "IBM-DTLA-307020",
- "IBM-DTLA-307015",
- "IBM-DTLA-305040",
- "IBM-DTLA-305030",
- "IBM-DTLA-305020",
- "IC35L010AVER07-0",
- "IC35L020AVER07-0",
- "IC35L030AVER07-0",
- "IC35L040AVER07-0",
- "IC35L060AVER07-0",
- "WDC AC310200R",
- NULL
-};
-
-static const char *bad_ata66_3[] = {
- "WDC AC310200R",
- NULL
-};
-
-static const char *bad_ata33[] = {
- "Maxtor 92720U8", "Maxtor 92040U6", "Maxtor 91360U4", "Maxtor 91020U3",
"Maxtor 90845U3", "Maxtor 90650U2",
- "Maxtor 91360D8", "Maxtor 91190D7", "Maxtor 91020D6", "Maxtor 90845D5",
"Maxtor 90680D4", "Maxtor 90510D3", "Maxtor 90340D2",
- "Maxtor 91152D8", "Maxtor 91008D7", "Maxtor 90845D6", "Maxtor 90840D6",
"Maxtor 90720D5", "Maxtor 90648D5", "Maxtor 90576D4",
- "Maxtor 90510D4",
- "Maxtor 90432D3", "Maxtor 90288D2", "Maxtor 90256D2",
- "Maxtor 91000D8", "Maxtor 90910D8", "Maxtor 90875D7", "Maxtor 90840D7",
"Maxtor 90750D6", "Maxtor 90625D5", "Maxtor 90500D4",
- "Maxtor 91728D8", "Maxtor 91512D7", "Maxtor 91303D6", "Maxtor 91080D5",
"Maxtor 90845D4", "Maxtor 90680D4", "Maxtor 90648D3", "Maxtor 90432D2",
- NULL
-};
-
-struct chipset_bus_clock_list_entry {
- byte xfer_speed;
- unsigned int chipset_settings;
-};
-
-/* key for bus clock timings
- * bit
- * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW
- * DMA. cycles = value + 1
- * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW
- * DMA. cycles = value + 1
- * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file
- * register access.
- * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file
- * register access.
- * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer.
- * during task file register access.
- * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA
- * xfer.
- * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task
- * register access.
- * 28 UDMA enable
- * 29 DMA enable
- * 30 PIO_MST enable. if set, the chip is in bus master mode during
- * PIO.
- * 31 FIFO enable.
- */
-static struct chipset_bus_clock_list_entry forty_base_hpt366[] = {
- { XFER_UDMA_4, 0x900fd943 },
- { XFER_UDMA_3, 0x900ad943 },
- { XFER_UDMA_2, 0x900bd943 },
- { XFER_UDMA_1, 0x9008d943 },
- { XFER_UDMA_0, 0x9008d943 },
-
- { XFER_MW_DMA_2, 0xa008d943 },
- { XFER_MW_DMA_1, 0xa010d955 },
- { XFER_MW_DMA_0, 0xa010d9fc },
-
- { XFER_PIO_4, 0xc008d963 },
- { XFER_PIO_3, 0xc010d974 },
- { XFER_PIO_2, 0xc010d997 },
- { XFER_PIO_1, 0xc010d9c7 },
- { XFER_PIO_0, 0xc018d9d9 },
- { 0, 0x0120d9d9 }
-};
-
-static struct chipset_bus_clock_list_entry thirty_three_base_hpt366[] = {
- { XFER_UDMA_4, 0x90c9a731 },
- { XFER_UDMA_3, 0x90cfa731 },
- { XFER_UDMA_2, 0x90caa731 },
- { XFER_UDMA_1, 0x90cba731 },
- { XFER_UDMA_0, 0x90c8a731 },
-
- { XFER_MW_DMA_2, 0xa0c8a731 },
- { XFER_MW_DMA_1, 0xa0c8a732 }, /* 0xa0c8a733 */
- { XFER_MW_DMA_0, 0xa0c8a797 },
-
- { XFER_PIO_4, 0xc0c8a731 },
- { XFER_PIO_3, 0xc0c8a742 },
- { XFER_PIO_2, 0xc0d0a753 },
- { XFER_PIO_1, 0xc0d0a7a3 }, /* 0xc0d0a793 */
- { XFER_PIO_0, 0xc0d0a7aa }, /* 0xc0d0a7a7 */
- { 0, 0x0120a7a7 }
-};
-
-static struct chipset_bus_clock_list_entry twenty_five_base_hpt366[] = {
-
- { XFER_UDMA_4, 0x90c98521 },
- { XFER_UDMA_3, 0x90cf8521 },
- { XFER_UDMA_2, 0x90cf8521 },
- { XFER_UDMA_1, 0x90cb8521 },
- { XFER_UDMA_0, 0x90cb8521 },
-
- { XFER_MW_DMA_2, 0xa0ca8521 },
- { XFER_MW_DMA_1, 0xa0ca8532 },
- { XFER_MW_DMA_0, 0xa0ca8575 },
-
- { XFER_PIO_4, 0xc0ca8521 },
- { XFER_PIO_3, 0xc0ca8532 },
- { XFER_PIO_2, 0xc0ca8542 },
- { XFER_PIO_1, 0xc0d08572 },
- { XFER_PIO_0, 0xc0d08585 },
- { 0, 0x01208585 }
-};
-
-/* from highpoint documentation. these are old values */
-static struct chipset_bus_clock_list_entry thirty_three_base_hpt370[] = {
-/* { XFER_UDMA_5, 0x1A85F442, 0x16454e31 }, */
- { XFER_UDMA_5, 0x16454e31 },
- { XFER_UDMA_4, 0x16454e31 },
- { XFER_UDMA_3, 0x166d4e31 },
- { XFER_UDMA_2, 0x16494e31 },
- { XFER_UDMA_1, 0x164d4e31 },
- { XFER_UDMA_0, 0x16514e31 },
-
- { XFER_MW_DMA_2, 0x26514e21 },
- { XFER_MW_DMA_1, 0x26514e33 },
- { XFER_MW_DMA_0, 0x26514e97 },
-
- { XFER_PIO_4, 0x06514e21 },
- { XFER_PIO_3, 0x06514e22 },
- { XFER_PIO_2, 0x06514e33 },
- { XFER_PIO_1, 0x06914e43 },
- { XFER_PIO_0, 0x06914e57 },
- { 0, 0x06514e57 }
-};
-
-static struct chipset_bus_clock_list_entry sixty_six_base_hpt370[] = {
- { XFER_UDMA_5, 0x14846231 },
- { XFER_UDMA_4, 0x14886231 },
- { XFER_UDMA_3, 0x148c6231 },
- { XFER_UDMA_2, 0x148c6231 },
- { XFER_UDMA_1, 0x14906231 },
- { XFER_UDMA_0, 0x14986231 },
-
- { XFER_MW_DMA_2, 0x26514e21 },
- { XFER_MW_DMA_1, 0x26514e33 },
- { XFER_MW_DMA_0, 0x26514e97 },
-
- { XFER_PIO_4, 0x06514e21 },
- { XFER_PIO_3, 0x06514e22 },
- { XFER_PIO_2, 0x06514e33 },
- { XFER_PIO_1, 0x06914e43 },
- { XFER_PIO_0, 0x06914e57 },
- { 0, 0x06514e57 }
-};
-
-/* these are the current (4 sep 2001) timings from highpoint */
-static struct chipset_bus_clock_list_entry thirty_three_base_hpt370a[] = {
- { XFER_UDMA_5, 0x12446231 },
- { XFER_UDMA_4, 0x12446231 },
- { XFER_UDMA_3, 0x126c6231 },
- { XFER_UDMA_2, 0x12486231 },
- { XFER_UDMA_1, 0x124c6233 },
- { XFER_UDMA_0, 0x12506297 },
-
- { XFER_MW_DMA_2, 0x22406c31 },
- { XFER_MW_DMA_1, 0x22406c33 },
- { XFER_MW_DMA_0, 0x22406c97 },
-
- { XFER_PIO_4, 0x06414e31 },
- { XFER_PIO_3, 0x06414e42 },
- { XFER_PIO_2, 0x06414e53 },
- { XFER_PIO_1, 0x06814e93 },
- { XFER_PIO_0, 0x06814ea7 },
- { 0, 0x06814ea7 }
-};
-
-/* 2x 33MHz timings */
-static struct chipset_bus_clock_list_entry sixty_six_base_hpt370a[] = {
- { XFER_UDMA_5, 0x1488e673 },
- { XFER_UDMA_4, 0x1488e673 },
- { XFER_UDMA_3, 0x1498e673 },
- { XFER_UDMA_2, 0x1490e673 },
- { XFER_UDMA_1, 0x1498e677 },
- { XFER_UDMA_0, 0x14a0e73f },
-
- { XFER_MW_DMA_2, 0x2480fa73 },
- { XFER_MW_DMA_1, 0x2480fa77 },
- { XFER_MW_DMA_0, 0x2480fb3f },
-
- { XFER_PIO_4, 0x0c82be73 },
- { XFER_PIO_3, 0x0c82be95 },
- { XFER_PIO_2, 0x0c82beb7 },
- { XFER_PIO_1, 0x0d02bf37 },
- { XFER_PIO_0, 0x0d02bf5f },
- { 0, 0x0d02bf5f }
-};
-
-static struct chipset_bus_clock_list_entry fifty_base_hpt370a[] = {
- { XFER_UDMA_5, 0x12848242 },
- { XFER_UDMA_4, 0x12ac8242 },
- { XFER_UDMA_3, 0x128c8242 },
- { XFER_UDMA_2, 0x120c8242 },
- { XFER_UDMA_1, 0x12148254 },
- { XFER_UDMA_0, 0x121882ea },
-
- { XFER_MW_DMA_2, 0x22808242 },
- { XFER_MW_DMA_1, 0x22808254 },
- { XFER_MW_DMA_0, 0x228082ea },
-
- { XFER_PIO_4, 0x0a81f442 },
- { XFER_PIO_3, 0x0a81f443 },
- { XFER_PIO_2, 0x0a81f454 },
- { XFER_PIO_1, 0x0ac1f465 },
- { XFER_PIO_0, 0x0ac1f48a },
- { 0, 0x0ac1f48a }
-};
-
-static struct chipset_bus_clock_list_entry thirty_three_base_hpt372[] = {
- { XFER_UDMA_6, 0x1c81dc62 },
- { XFER_UDMA_5, 0x1c6ddc62 },
- { XFER_UDMA_4, 0x1c8ddc62 },
- { XFER_UDMA_3, 0x1c8edc62 }, /* checkme */
- { XFER_UDMA_2, 0x1c91dc62 },
- { XFER_UDMA_1, 0x1c9adc62 }, /* checkme */
- { XFER_UDMA_0, 0x1c82dc62 }, /* checkme */
-
- { XFER_MW_DMA_2, 0x2c829262 },
- { XFER_MW_DMA_1, 0x2c829266 }, /* checkme */
- { XFER_MW_DMA_0, 0x2c82922e }, /* checkme */
-
- { XFER_PIO_4, 0x0c829c62 },
- { XFER_PIO_3, 0x0c829c84 },
- { XFER_PIO_2, 0x0c829ca6 },
- { XFER_PIO_1, 0x0d029d26 },
- { XFER_PIO_0, 0x0d029d5e },
- { 0, 0x0d029d5e }
-};
-
-static struct chipset_bus_clock_list_entry fifty_base_hpt372[] = {
- { XFER_UDMA_5, 0x12848242 },
- { XFER_UDMA_4, 0x12ac8242 },
- { XFER_UDMA_3, 0x128c8242 },
- { XFER_UDMA_2, 0x120c8242 },
- { XFER_UDMA_1, 0x12148254 },
- { XFER_UDMA_0, 0x121882ea },
-
- { XFER_MW_DMA_2, 0x22808242 },
- { XFER_MW_DMA_1, 0x22808254 },
- { XFER_MW_DMA_0, 0x228082ea },
-
- { XFER_PIO_4, 0x0a81f442 },
- { XFER_PIO_3, 0x0a81f443 },
- { XFER_PIO_2, 0x0a81f454 },
- { XFER_PIO_1, 0x0ac1f465 },
- { XFER_PIO_0, 0x0ac1f48a },
- { 0, 0x0a81f443 }
-};
-
-static struct chipset_bus_clock_list_entry sixty_six_base_hpt372[] = {
- { XFER_UDMA_6, 0x1c869c62 },
- { XFER_UDMA_5, 0x1cae9c62 },
- { XFER_UDMA_4, 0x1c8a9c62 },
- { XFER_UDMA_3, 0x1c8e9c62 },
- { XFER_UDMA_2, 0x1c929c62 },
- { XFER_UDMA_1, 0x1c9a9c62 },
- { XFER_UDMA_0, 0x1c829c62 },
-
- { XFER_MW_DMA_2, 0x2c829c62 },
- { XFER_MW_DMA_1, 0x2c829c66 },
- { XFER_MW_DMA_0, 0x2c829d2e },
-
- { XFER_PIO_4, 0x0c829c62 },
- { XFER_PIO_3, 0x0c829c84 },
- { XFER_PIO_2, 0x0c829ca6 },
- { XFER_PIO_1, 0x0d029d26 },
- { XFER_PIO_0, 0x0d029d5e },
- { 0, 0x0d029d26 }
-};
-
-static struct chipset_bus_clock_list_entry thirty_three_base_hpt374[] = {
- { XFER_UDMA_6, 0x12808242 },
- { XFER_UDMA_5, 0x12848242 },
- { XFER_UDMA_4, 0x12ac8242 },
- { XFER_UDMA_3, 0x128c8242 },
- { XFER_UDMA_2, 0x120c8242 },
- { XFER_UDMA_1, 0x12148254 },
- { XFER_UDMA_0, 0x121882ea },
-
- { XFER_MW_DMA_2, 0x22808242 },
- { XFER_MW_DMA_1, 0x22808254 },
- { XFER_MW_DMA_0, 0x228082ea },
-
- { XFER_PIO_4, 0x0a81f442 },
- { XFER_PIO_3, 0x0a81f443 },
- { XFER_PIO_2, 0x0a81f454 },
- { XFER_PIO_1, 0x0ac1f465 },
- { XFER_PIO_0, 0x0ac1f48a },
- { 0, 0x06814e93 }
-};
-
-#if 0
-static struct chipset_bus_clock_list_entry fifty_base_hpt374[] = {
- { XFER_UDMA_6, },
- { XFER_UDMA_5, },
- { XFER_UDMA_4, },
- { XFER_UDMA_3, },
- { XFER_UDMA_2, },
- { XFER_UDMA_1, },
- { XFER_UDMA_0, },
- { XFER_MW_DMA_2, },
- { XFER_MW_DMA_1, },
- { XFER_MW_DMA_0, },
- { XFER_PIO_4, },
- { XFER_PIO_3, },
- { XFER_PIO_2, },
- { XFER_PIO_1, },
- { XFER_PIO_0, },
- { 0, }
-};
-#endif
-#if 0
-static struct chipset_bus_clock_list_entry sixty_six_base_hpt374[] = {
- { XFER_UDMA_6, 0x12406231 }, /* checkme */
- { XFER_UDMA_5, 0x12446231 },
- 0x14846231
- { XFER_UDMA_4, 0x16814ea7 },
- 0x14886231
- { XFER_UDMA_3, 0x16814ea7 },
- 0x148c6231
- { XFER_UDMA_2, 0x16814ea7 },
- 0x148c6231
- { XFER_UDMA_1, 0x16814ea7 },
- 0x14906231
- { XFER_UDMA_0, 0x16814ea7 },
- 0x14986231
- { XFER_MW_DMA_2, 0x16814ea7 },
- 0x26514e21
- { XFER_MW_DMA_1, 0x16814ea7 },
- 0x26514e97
- { XFER_MW_DMA_0, 0x16814ea7 },
- 0x26514e97
- { XFER_PIO_4, 0x06814ea7 },
- 0x06514e21
- { XFER_PIO_3, 0x06814ea7 },
- 0x06514e22
- { XFER_PIO_2, 0x06814ea7 },
- 0x06514e33
- { XFER_PIO_1, 0x06814ea7 },
- 0x06914e43
- { XFER_PIO_0, 0x06814ea7 },
- 0x06914e57
- { 0, 0x06814ea7 }
-};
-#endif
-
-#define HPT366_DEBUG_DRIVE_INFO 0
-#define HPT374_ALLOW_ATA133_6 0
-#define HPT371_ALLOW_ATA133_6 0
-#define HPT302_ALLOW_ATA133_6 0
-#define HPT372_ALLOW_ATA133_6 1
-#define HPT370_ALLOW_ATA100_5 1
-#define HPT366_ALLOW_ATA66_4 1
-#define HPT366_ALLOW_ATA66_3 1
-#define HPT366_MAX_DEVS 8
-
-#define F_LOW_PCI_33 0x23
-#define F_LOW_PCI_40 0x29
-#define F_LOW_PCI_50 0x2d
-#define F_LOW_PCI_66 0x42
-
-static int init_setup_hpt366(struct pci_dev *, ide_pci_device_t *);
-static int init_setup_hpt37x(struct pci_dev *, ide_pci_device_t *);
-static int init_setup_hpt374(struct pci_dev *, ide_pci_device_t *);
-static unsigned int init_chipset_hpt366(struct pci_dev *, const char *);
-static void init_hwif_hpt366(ide_hwif_t *);
-static void init_dma_hpt366(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "HPT366",
- .init_setup = init_setup_hpt366,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- .extra = 240
- },{ /* 1 */
- .name = "HPT372A",
- .init_setup = init_setup_hpt37x,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 2 */
- .name = "HPT302",
- .init_setup = init_setup_hpt37x,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 3 */
- .name = "HPT371",
- .init_setup = init_setup_hpt37x,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 4 */
- .name = "HPT374",
- .init_setup = init_setup_hpt374,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2, /* 4 */
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 5 */
- .name = "HPT372N",
- .init_setup = init_setup_hpt37x,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2, /* 4 */
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- }
-};
-
-#endif /* HPT366_H */
diff -urN linux/drivers/ide/pci/it8172.h linux/drivers/ide/pci/it8172.h
--- linux/drivers/ide/pci/Attic/it8172.h Sun Feb 13 20:16:23 2005
1.7
+++ linux/drivers/ide/pci/Attic/it8172.h 1970/01/01 00:00:002002
@@ -1,34 +0,0 @@
-#ifndef ITE8172G_H
-#define ITE8172G_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static u8 it8172_ratemask(ide_drive_t *drive);
-static u8 it8172_ratefilter(ide_drive_t *drive, u8 speed);
-static void it8172_tune_drive(ide_drive_t *drive, u8 pio);
-static u8 it8172_dma_2_pio(u8 xfer_rate);
-static int it8172_tune_chipset(ide_drive_t *drive, u8 xferspeed);
-#ifdef CONFIG_BLK_DEV_IDEDMA
-static int it8172_config_chipset_for_dma(ide_drive_t *drive);
-#endif
-
-static void init_setup_it8172(struct pci_dev *, ide_pci_device_t *);
-static unsigned int init_chipset_it8172(struct pci_dev *, const char *);
-static void init_hwif_it8172(ide_hwif_t *);
-
-static ide_pci_device_t it8172_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "IT8172G",
- .init_setup = init_setup_it8172,
- .init_chipset = init_chipset_it8172,
- .init_hwif = init_hwif_it8172,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x40,0x00,0x01}},
- .bootable = ON_BOARD,
- }
-};
-
-#endif /* ITE8172G_H */
diff -urN linux/drivers/ide/pci/opti621.h linux/drivers/ide/pci/opti621.h
--- linux/drivers/ide/pci/Attic/opti621.h Sun Feb 13 20:16:23 2005
1.8
+++ linux/drivers/ide/pci/Attic/opti621.h 1970/01/01 00:00:002002
@@ -1,31 +0,0 @@
-#ifndef OPTI621_H
-#define OPTI621_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static int init_setup_opti621(struct pci_dev *, ide_pci_device_t *);
-static void init_hwif_opti621(ide_hwif_t *);
-
-static ide_pci_device_t opti621_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "OPTI621",
- .init_setup = init_setup_opti621,
- .init_hwif = init_hwif_opti621,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
- .bootable = ON_BOARD,
- },{ /* 1 */
- .name = "OPTI621X",
- .init_setup = init_setup_opti621,
- .init_hwif = init_hwif_opti621,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
- .bootable = ON_BOARD,
- }
-};
-
-#endif /* OPTI621_H */
diff -urN linux/drivers/ide/pci/pdc202xx_new.h
linux/drivers/ide/pci/pdc202xx_new.h
--- linux/drivers/ide/pci/Attic/pdc202xx_new.h Sun Feb 13 20:16:23 2005
1.13
+++ linux/drivers/ide/pci/Attic/pdc202xx_new.h 1970/01/01 00:00:002002
@@ -1,118 +0,0 @@
-#ifndef PDC202XX_H
-#define PDC202XX_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-const static char *pdc_quirk_drives[] = {
- "QUANTUM FIREBALLlct08 08",
- "QUANTUM FIREBALLP KA6.4",
- "QUANTUM FIREBALLP KA9.1",
- "QUANTUM FIREBALLP LM20.4",
- "QUANTUM FIREBALLP KX13.6",
- "QUANTUM FIREBALLP KX20.5",
- "QUANTUM FIREBALLP KX27.3",
- "QUANTUM FIREBALLP LM20.5",
- NULL
-};
-
-#define set_2regs(a, b) \
- do { \
- hwif->OUTB((a + adj), indexreg); \
- hwif->OUTB(b, datareg); \
- } while(0)
-
-#define set_ultra(a, b, c) \
- do { \
- set_2regs(0x10,(a)); \
- set_2regs(0x11,(b)); \
- set_2regs(0x12,(c)); \
- } while(0)
-
-#define set_ata2(a, b) \
- do { \
- set_2regs(0x0e,(a)); \
- set_2regs(0x0f,(b)); \
- } while(0)
-
-#define set_pio(a, b, c) \
- do { \
- set_2regs(0x0c,(a)); \
- set_2regs(0x0d,(b)); \
- set_2regs(0x13,(c)); \
- } while(0)
-
-static int init_setup_pdcnew(struct pci_dev *, ide_pci_device_t *);
-static int init_setup_pdc20270(struct pci_dev *, ide_pci_device_t *);
-static int init_setup_pdc20276(struct pci_dev *dev, ide_pci_device_t *d);
-static unsigned int init_chipset_pdcnew(struct pci_dev *, const char *);
-static void init_hwif_pdc202new(ide_hwif_t *);
-
-static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "PDC20268",
- .init_setup = init_setup_pdcnew,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 1 */
- .name = "PDC20269",
- .init_setup = init_setup_pdcnew,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 2 */
- .name = "PDC20270",
- .init_setup = init_setup_pdc20270,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- },{ /* 3 */
- .name = "PDC20271",
- .init_setup = init_setup_pdcnew,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 4 */
- .name = "PDC20275",
- .init_setup = init_setup_pdcnew,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 5 */
- .name = "PDC20276",
- .init_setup = init_setup_pdc20276,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- },{ /* 6 */
- .name = "PDC20277",
- .init_setup = init_setup_pdcnew,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- }
-};
-
-#endif /* PDC202XX_H */
diff -urN linux/drivers/ide/pci/pdc202xx_old.h
linux/drivers/ide/pci/pdc202xx_old.h
--- linux/drivers/ide/pci/Attic/pdc202xx_old.h Sun Feb 13 20:16:23 2005
1.12
+++ linux/drivers/ide/pci/Attic/pdc202xx_old.h 1970/01/01 00:00:002002
@@ -1,144 +0,0 @@
-#ifndef PDC202XX_H
-#define PDC202XX_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#ifndef SPLIT_BYTE
-#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
-#endif
-
-#define PDC202XX_DEBUG_DRIVE_INFO 0
-
-static const char *pdc_quirk_drives[] = {
- "QUANTUM FIREBALLlct08 08",
- "QUANTUM FIREBALLP KA6.4",
- "QUANTUM FIREBALLP KA9.1",
- "QUANTUM FIREBALLP LM20.4",
- "QUANTUM FIREBALLP KX13.6",
- "QUANTUM FIREBALLP KX20.5",
- "QUANTUM FIREBALLP KX27.3",
- "QUANTUM FIREBALLP LM20.5",
- NULL
-};
-
-/* A Register */
-#define SYNC_ERRDY_EN 0xC0
-
-#define SYNC_IN 0x80 /* control bit, different for master
vs. slave drives */
-#define ERRDY_EN 0x40 /* control bit, different for master
vs. slave drives */
-#define IORDY_EN 0x20 /* PIO: IOREADY */
-#define PREFETCH_EN 0x10 /* PIO: PREFETCH */
-
-#define PA3 0x08 /* PIO"A" timing */
-#define PA2 0x04 /* PIO"A" timing */
-#define PA1 0x02 /* PIO"A" timing */
-#define PA0 0x01 /* PIO"A" timing */
-
-/* B Register */
-
-#define MB2 0x80 /* DMA"B" timing */
-#define MB1 0x40 /* DMA"B" timing */
-#define MB0 0x20 /* DMA"B" timing */
-
-#define PB4 0x10 /* PIO_FORCE 1:0 */
-
-#define PB3 0x08 /* PIO"B" timing */ /* PIO flow
Control mode */
-#define PB2 0x04 /* PIO"B" timing */ /* PIO 4 */
-#define PB1 0x02 /* PIO"B" timing */ /* PIO 3 half */
-#define PB0 0x01 /* PIO"B" timing */ /* PIO 3 other
half */
-
-/* C Register */
-#define IORDYp_NO_SPEED 0x4F
-#define SPEED_DIS 0x0F
-
-#define DMARQp 0x80
-#define IORDYp 0x40
-#define DMAR_EN 0x20
-#define DMAW_EN 0x10
-
-#define MC3 0x08 /* DMA"C" timing */
-#define MC2 0x04 /* DMA"C" timing */
-#define MC1 0x02 /* DMA"C" timing */
-#define MC0 0x01 /* DMA"C" timing */
-
-static int init_setup_pdc202ata4(struct pci_dev *dev, ide_pci_device_t *d);
-static int init_setup_pdc20265(struct pci_dev *, ide_pci_device_t *);
-static int init_setup_pdc202xx(struct pci_dev *, ide_pci_device_t *);
-static unsigned int init_chipset_pdc202xx(struct pci_dev *, const char *);
-static void init_hwif_pdc202xx(ide_hwif_t *);
-static void init_dma_pdc202xx(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "PDC20246",
- .init_setup = init_setup_pdc202ata4,
- .init_chipset = init_chipset_pdc202xx,
- .init_hwif = init_hwif_pdc202xx,
- .init_dma = init_dma_pdc202xx,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- .extra = 16,
- },{ /* 1 */
- .name = "PDC20262",
- .init_setup = init_setup_pdc202ata4,
- .init_chipset = init_chipset_pdc202xx,
- .init_hwif = init_hwif_pdc202xx,
- .init_dma = init_dma_pdc202xx,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- .extra = 48,
- .flags = IDEPCI_FLAG_FORCE_PDC,
- },{ /* 2 */
- .name = "PDC20263",
- .init_setup = init_setup_pdc202ata4,
- .init_chipset = init_chipset_pdc202xx,
- .init_hwif = init_hwif_pdc202xx,
- .init_dma = init_dma_pdc202xx,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- .extra = 48,
- },{ /* 3 */
- .name = "PDC20265",
- .init_setup = init_setup_pdc20265,
- .init_chipset = init_chipset_pdc202xx,
- .init_hwif = init_hwif_pdc202xx,
- .init_dma = init_dma_pdc202xx,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- .extra = 48,
- .flags = IDEPCI_FLAG_FORCE_PDC,
- },{ /* 4 */
- .name = "PDC20267",
- .init_setup = init_setup_pdc202xx,
- .init_chipset = init_chipset_pdc202xx,
- .init_hwif = init_hwif_pdc202xx,
- .init_dma = init_dma_pdc202xx,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- .extra = 48,
- }
-};
-
-#endif /* PDC202XX_H */
diff -urN linux/drivers/ide/pci/piix.h linux/drivers/ide/pci/piix.h
--- linux/drivers/ide/pci/Attic/piix.h Sun Feb 13 20:16:23 2005 1.14
+++ linux/drivers/ide/pci/Attic/piix.h 1970/01/01 00:00:002002
@@ -1,65 +0,0 @@
-#ifndef PIIX_H
-#define PIIX_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static int init_setup_piix(struct pci_dev *, ide_pci_device_t *);
-static unsigned int __devinit init_chipset_piix(struct pci_dev *, const char
*);
-static void init_hwif_piix(ide_hwif_t *);
-
-#define DECLARE_PIIX_DEV(name_str) \
- { \
- .name = name_str, \
- .init_setup = init_setup_piix, \
- .init_chipset = init_chipset_piix, \
- .init_hwif = init_hwif_piix, \
- .channels = 2, \
- .autodma = AUTODMA, \
- .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
- .bootable = ON_BOARD, \
- }
-
-/*
- * Table of the various PIIX capability blocks
- *
- */
-
-static ide_pci_device_t piix_pci_info[] __devinitdata = {
- /* 0 */ DECLARE_PIIX_DEV("PIIXa"),
- /* 1 */ DECLARE_PIIX_DEV("PIIXb"),
-
- { /* 2 */
- .name = "MPIIX",
- .init_setup = init_setup_piix,
- .init_hwif = init_hwif_piix,
- .channels = 2,
- .autodma = NODMA,
- .enablebits = {{0x6D,0x80,0x80}, {0x6F,0x80,0x80}},
- .bootable = ON_BOARD,
- },
-
- /* 3 */ DECLARE_PIIX_DEV("PIIX3"),
- /* 4 */ DECLARE_PIIX_DEV("PIIX4"),
- /* 5 */ DECLARE_PIIX_DEV("ICH0"),
- /* 6 */ DECLARE_PIIX_DEV("PIIX4"),
- /* 7 */ DECLARE_PIIX_DEV("ICH"),
- /* 8 */ DECLARE_PIIX_DEV("PIIX4"),
- /* 9 */ DECLARE_PIIX_DEV("PIIX4"),
- /* 10 */ DECLARE_PIIX_DEV("ICH2"),
- /* 11 */ DECLARE_PIIX_DEV("ICH2M"),
- /* 12 */ DECLARE_PIIX_DEV("ICH3M"),
- /* 13 */ DECLARE_PIIX_DEV("ICH3"),
- /* 14 */ DECLARE_PIIX_DEV("ICH4"),
- /* 15 */ DECLARE_PIIX_DEV("ICH5"),
- /* 16 */ DECLARE_PIIX_DEV("C-ICH"),
- /* 17 */ DECLARE_PIIX_DEV("ICH4"),
- /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA"),
- /* 19 */ DECLARE_PIIX_DEV("ICH5"),
- /* 20 */ DECLARE_PIIX_DEV("ICH6"),
- /* 21 */ DECLARE_PIIX_DEV("ICH7"),
- /* 22 */ DECLARE_PIIX_DEV("ICH4"),
-};
-
-#endif /* PIIX_H */
diff -urN linux/drivers/ide/pci/serverworks.h
linux/drivers/ide/pci/serverworks.h
--- linux/drivers/ide/pci/Attic/serverworks.h Sun Feb 13 20:16:23 2005
1.12
+++ linux/drivers/ide/pci/Attic/serverworks.h 1970/01/01 00:00:002002
@@ -1,69 +0,0 @@
-
-#ifndef SERVERWORKS_H
-#define SERVERWORKS_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#undef SVWKS_DEBUG_DRIVE_INFO
-
-#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5
(A2.0) */
-#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
-
-/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
- * can overrun their FIFOs when used with the CSB5 */
-static const char *svwks_bad_ata100[] = {
- "ST320011A",
- "ST340016A",
- "ST360021A",
- "ST380021A",
- NULL
-};
-
-static int init_setup_svwks(struct pci_dev *, ide_pci_device_t *);
-static int init_setup_csb6(struct pci_dev *, ide_pci_device_t *);
-static unsigned int init_chipset_svwks(struct pci_dev *, const char *);
-static void init_hwif_svwks(ide_hwif_t *);
-static void init_dma_svwks(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "SvrWks OSB4",
- .init_setup = init_setup_svwks,
- .init_chipset = init_chipset_svwks,
- .init_hwif = init_hwif_svwks,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 1 */
- .name = "SvrWks CSB5",
- .init_setup = init_setup_svwks,
- .init_chipset = init_chipset_svwks,
- .init_hwif = init_hwif_svwks,
- .init_dma = init_dma_svwks,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 2 */
- .name = "SvrWks CSB6",
- .init_setup = init_setup_csb6,
- .init_chipset = init_chipset_svwks,
- .init_hwif = init_hwif_svwks,
- .init_dma = init_dma_svwks,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 3 */
- .name = "SvrWks CSB6",
- .init_setup = init_setup_csb6,
- .init_chipset = init_chipset_svwks,
- .init_hwif = init_hwif_svwks,
- .init_dma = init_dma_svwks,
- .channels = 1, /* 2 */
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- }
-};
-
-#endif /* SERVERWORKS_H */
diff -urN linux/drivers/infiniband/hw/mthca/mthca_cq.c
linux/drivers/infiniband/hw/mthca/mthca_cq.c
--- linux/drivers/infiniband/hw/mthca/mthca_cq.c 2005/01/25 04:28:16
1.2
+++ linux/drivers/infiniband/hw/mthca/mthca_cq.c 2005/02/13 20:16:23
1.3
@@ -422,8 +422,6 @@
*freed = 0;
}
spin_unlock(&(*cur_qp)->lock);
- if (atomic_dec_and_test(&(*cur_qp)->refcount))
- wake_up(&(*cur_qp)->wait);
}
spin_lock(&dev->qp_table.lock);
diff -urN linux/drivers/infiniband/hw/mthca/mthca_qp.c
linux/drivers/infiniband/hw/mthca/mthca_qp.c
--- linux/drivers/infiniband/hw/mthca/mthca_qp.c 2005/01/25 04:28:16
1.2
+++ linux/drivers/infiniband/hw/mthca/mthca_qp.c 2005/02/13 20:16:23
1.3
@@ -1323,6 +1323,8 @@
break;
}
+ break;
+
case UD:
((struct mthca_ud_seg *) wqe)->lkey =
cpu_to_be32(to_mah(wr->wr.ud.ah)->key);
diff -urN linux/drivers/input/mousedev.c linux/drivers/input/mousedev.c
--- linux/drivers/input/mousedev.c 2005/01/13 14:06:02 1.28
+++ linux/drivers/input/mousedev.c 2005/02/13 20:16:23 1.29
@@ -467,10 +467,10 @@
}
if (!p->dx && !p->dy && !p->dz) {
- if (list->tail != list->head)
- list->tail = (list->tail + 1) % PACKET_QUEUE_LEN;
if (list->tail == list->head)
list->ready = 0;
+ else
+ list->tail = (list->tail + 1) % PACKET_QUEUE_LEN;
}
spin_unlock_irqrestore(&list->packet_lock, flags);
diff -urN linux/drivers/isdn/hardware/eicon/capifunc.c
linux/drivers/isdn/hardware/eicon/capifunc.c
--- linux/drivers/isdn/hardware/eicon/capifunc.c 2004/12/04 18:16:03
1.12
+++ linux/drivers/isdn/hardware/eicon/capifunc.c 2005/02/13 20:16:23
1.13
@@ -1,4 +1,4 @@
-/* $Id: capifunc.c,v 1.61.4.5 2004/08/27 20:10:12 armin Exp $
+/* $Id: capifunc.c,v 1.61.4.7 2005/02/11 19:40:25 armin Exp $
*
* ISDN interface module for Eicon active cards DIVA.
* CAPI Interface common functions
@@ -64,7 +64,7 @@
*/
static void no_printf(unsigned char *, ...);
#include "debuglib.c"
-void xlog(char *x, ...)
+static void xlog(char *x, ...)
{
#ifndef DIVA_NO_DEBUGLIB
va_list ap;
@@ -157,7 +157,7 @@
while (num < MAX_DESCRIPTORS) {
a = &adapter[num];
if (!a->Id)
- break;
+ break;
num++;
}
return(num + 1);
@@ -353,7 +353,7 @@
if (k == 0) {
if (li_config_table) {
list_add((struct list_head *)li_config_table,
free_mem_q);
- li_config_table = NULL;
+ li_config_table = NULL;
}
} else {
if (a->li_base < k) {
@@ -1212,7 +1212,7 @@
void DIVA_EXIT_FUNCTION finit_capifunc(void)
{
do_api_remove_start();
- divacapi_disconnect_didd();
+ divacapi_disconnect_didd();
divacapi_remove_cards();
remove_main_structs();
diva_os_destroy_spin_lock(&api_lock, "capifunc");
diff -urN linux/drivers/isdn/hardware/eicon/dadapter.c
linux/drivers/isdn/hardware/eicon/dadapter.c
--- linux/drivers/isdn/hardware/eicon/dadapter.c 2004/07/20 20:21:19
1.4
+++ linux/drivers/isdn/hardware/eicon/dadapter.c 2005/02/13 20:16:23
1.5
@@ -106,7 +106,7 @@
return adapter handle (> 0) on success
return -1 adapter array overflow
-------------------------------------------------------------------------- */
-int diva_didd_add_descriptor (DESCRIPTOR* d) {
+static int diva_didd_add_descriptor (DESCRIPTOR* d) {
diva_os_spin_lock_magic_t irql;
int i;
if (d->type == IDI_DIMAINT) {
@@ -143,7 +143,7 @@
return adapter handle (> 0) on success
return 0 on success
-------------------------------------------------------------------------- */
-int diva_didd_remove_descriptor (IDI_CALL request) {
+static int diva_didd_remove_descriptor (IDI_CALL request) {
diva_os_spin_lock_magic_t irql;
int i;
if (request == MAdapter.request) {
@@ -171,7 +171,7 @@
Read adapter array
return 1 if not enough space to save all available adapters
--------------------------------------------------------------------------
*/
-int diva_didd_read_adapter_array (DESCRIPTOR* buffer, int length) {
+static int diva_didd_read_adapter_array (DESCRIPTOR* buffer, int length) {
diva_os_spin_lock_magic_t irql;
int src, dst;
memset (buffer, 0x00, length);
diff -urN linux/drivers/isdn/hardware/eicon/dadapter.h
linux/drivers/isdn/hardware/eicon/dadapter.h
--- linux/drivers/isdn/hardware/eicon/dadapter.h 2002/11/01 23:26:56
1.1
+++ linux/drivers/isdn/hardware/eicon/dadapter.h 2005/02/13 20:16:23
1.2
@@ -25,11 +25,10 @@
*/
#ifndef __DIVA_DIDD_DADAPTER_INC__
#define __DIVA_DIDD_DADAPTER_INC__
+
void diva_didd_load_time_init (void);
void diva_didd_load_time_finit (void);
-int diva_didd_add_descriptor (DESCRIPTOR* d);
-int diva_didd_remove_descriptor (IDI_CALL request);
-int diva_didd_read_adapter_array (DESCRIPTOR* buffer, int length);
-#define OLD_MAX_DESCRIPTORS 16
+
#define NEW_MAX_DESCRIPTORS 64
+
#endif
diff -urN linux/drivers/isdn/hardware/eicon/di.c
linux/drivers/isdn/hardware/eicon/di.c
--- linux/drivers/isdn/hardware/eicon/di.c 2004/12/04 18:16:03 1.5
+++ linux/drivers/isdn/hardware/eicon/di.c 2005/02/13 20:16:23 1.6
@@ -42,10 +42,7 @@
/*------------------------------------------------------------------*/
void pr_out(ADAPTER * a);
byte pr_dpc(ADAPTER * a);
-void scom_out(ADAPTER * a);
-byte scom_dpc(ADAPTER * a);
static byte pr_ready(ADAPTER * a);
-static byte scom_ready(ADAPTER * a);
static byte isdn_rc(ADAPTER *, byte, byte, byte, word, dword, dword);
static byte isdn_ind(ADAPTER *, byte, byte, byte, PBUFFER *, byte, word);
/* -----------------------------------------------------------------
@@ -59,11 +56,11 @@
----------------------------------------------------------------- */
#if defined(XDI_USE_XLOG)
#define XDI_A_NR(_x_) ((byte)(((ISDN_ADAPTER *)(_x_->io))->ANum))
+static void xdi_xlog (byte *msg, word code, int length);
+static byte xdi_xlog_sec = 0;
#else
#define XDI_A_NR(_x_) ((byte)0)
#endif
-byte xdi_xlog_sec = 0;
-void xdi_xlog (byte *msg, word code, int length);
static void xdi_xlog_rc_event (byte Adapter,
byte Id, byte Ch, byte Rc, byte cb, byte type);
static void xdi_xlog_request (byte Adapter, byte Id,
@@ -345,192 +342,6 @@
}
return FALSE;
}
-byte pr_test_int(ADAPTER * a)
-{
- return a->ram_in(a,(void *)0x3ffc);
-}
-void pr_clear_int(ADAPTER * a)
-{
- a->ram_out(a,(void *)0x3ffc,0);
-}
-/*------------------------------------------------------------------*/
-/* output function */
-/*------------------------------------------------------------------*/
-void scom_out(ADAPTER * a)
-{
- byte e_no;
- ENTITY * this;
- BUFFERS * X;
- word length;
- word i;
- word clength;
- byte more;
- byte Id;
- dtrc(dprintf("scom_out"));
- /* check if the adapter is ready to accept an request: */
- e_no = look_req(a);
- if(!e_no)
- {
- dtrc(dprintf("no_req"));
- return;
- }
- if(!scom_ready(a))
- {
- dtrc(dprintf("not_ready"));
- return;
- }
- this = entity_ptr(a,e_no);
- dtrc(dprintf("out:Req=%x,Id=%x,Ch=%x",this->Req,this->Id,this->ReqCh));
- next_req(a);
- /* now copy the data from the current data buffer into the */
- /* adapters request buffer */
- length = 0;
- i = this->XCurrent;
- X = PTR_X(a, this);
- while(i<this->XNum && length<270) {
- clength = MIN((word)(270-length),X[i].PLength-this->XOffset);
- a->ram_out_buffer(a,
- &RAM->XBuffer.P[length],
- PTR_P(a,this,&X[i].P[this->XOffset]),
- clength);
- length +=clength;
- this->XOffset +=clength;
- if(this->XOffset==X[i].PLength) {
- this->XCurrent = (byte)++i;
- this->XOffset = 0;
- }
- }
- a->ram_outw(a, &RAM->XBuffer.length, length);
- a->ram_out(a, &RAM->ReqId, this->Id);
- a->ram_out(a, &RAM->ReqCh, this->ReqCh);
- /* if it's a specific request (no ASSIGN) ... */
- if(this->Id &0x1f) {
- /* if buffers are left in the list of data buffers do */
- /* chaining (LL_MDATA, N_MDATA) */
- this->More++;
- if(i<this->XNum && this->MInd) {
- a->ram_out(a, &RAM->Req, this->MInd);
- more = TRUE;
- }
- else {
- this->More |=XMOREF;
- a->ram_out(a, &RAM->Req, this->Req);
- more = FALSE;
- if (a->FlowControlIdTable[this->ReqCh] == this->Id)
- a->FlowControlSkipTable[this->ReqCh] = TRUE;
- /*
- Note that remove request was sent to the card
- */
- if (this->Req == REMOVE) {
- a->misc_flags_table[e_no] |= DIVA_MISC_FLAGS_REMOVE_PENDING;
- }
- }
- if(more) {
- req_queue(a,this->No);
- }
- }
- /* else it's a ASSIGN */
- else {
- /* save the request code used for buffer chaining */
- this->MInd = 0;
- if (this->Id==BLLC_ID) this->MInd = LL_MDATA;
- if (this->Id==NL_ID ||
- this->Id==TASK_ID ||
- this->Id==MAN_ID
- ) this->MInd = N_MDATA;
- /* send the ASSIGN */
- this->More |=XMOREF;
- a->ram_out(a, &RAM->Req, this->Req);
- /* save the reference of the ASSIGN */
- assign_queue(a, this->No, 0);
- }
- /* if it is a 'unreturncoded' UREMOVE request, remove the */
- /* Id from our table after sending the request */
- if(this->Req==UREMOVE && this->Id) {
- Id = this->Id;
- e_no = a->IdTable[Id];
- free_entity(a, e_no);
- for (i = 0; i < 256; i++)
- {
- if (a->FlowControlIdTable[i] == Id)
- a->FlowControlIdTable[i] = 0;
- }
- a->IdTable[Id] = 0;
- this->Id = 0;
- }
-}
-static byte scom_ready(ADAPTER * a)
-{
- if(a->ram_in(a, &RAM->Req)) {
- if(!a->ReadyInt) {
- a->ram_inc(a, &RAM->ReadyInt);
- a->ReadyInt++;
- }
- return 0;
- }
- return 1;
-}
-/*------------------------------------------------------------------*/
-/* isdn interrupt handler */
-/*------------------------------------------------------------------*/
-byte scom_dpc(ADAPTER * a)
-{
- byte c;
- /* if a return code is available ... */
- if(a->ram_in(a, &RAM->Rc)) {
- /* call return code handler, if it is not our return code */
- /* the handler returns 2, if it's the return code to an */
- /* ASSIGN the handler returns 1 */
- c = isdn_rc(a,
- a->ram_in(a, &RAM->Rc),
- a->ram_in(a, &RAM->RcId),
- a->ram_in(a, &RAM->RcCh),
- 0,
- /*
- Scom Card does not provide extended information
- */
- 0, 0);
- switch(c) {
- case 0:
- a->ram_out(a, &RAM->Rc, 0);
- break;
- case 1:
- a->ram_out(a, &RAM->Req, 0);
- a->ram_out(a, &RAM->Rc, 0);
- break;
- case 2:
- return TRUE;
- }
- /* call output function */
- scom_out(a);
- }
- else {
- /* if an indications is available ... */
- if(a->ram_in(a, &RAM->Ind)) {
- /* call indication handler, a return value of 2 means chain */
- /* a return value of 1 means RNR */
- c = isdn_ind(a,
- a->ram_in(a, &RAM->Ind),
- a->ram_in(a, &RAM->IndId),
- a->ram_in(a, &RAM->IndCh),
- &RAM->RBuffer,
- a->ram_in(a, &RAM->MInd),
- a->ram_inw(a, &RAM->MLength));
- switch(c) {
- case 0:
- a->ram_out(a, &RAM->Ind, 0);
- break;
- case 1:
- dtrc(dprintf("RNR"));
- a->ram_out(a, &RAM->RNR, TRUE);
- break;
- case 2:
- return TRUE;
- }
- }
- }
- return FALSE;
-}
byte scom_test_int(ADAPTER * a)
{
return a->ram_in(a,(void *)0x3fe);
@@ -539,11 +350,6 @@
{
a->ram_out(a,(void *)0x3fe,0);
}
-void quadro_clear_int(ADAPTER * a)
-{
- a->ram_out(a,(void *)0x3fe,0);
- a->ram_out(a,(void *)0x401,0);
-}
/*------------------------------------------------------------------*/
/* return code handler */
/*------------------------------------------------------------------*/
@@ -914,15 +720,15 @@
}
return 2;
}
+#if defined(XDI_USE_XLOG)
/* -----------------------------------------------------------
This function works in the same way as xlog on the
active board
----------------------------------------------------------- */
-void xdi_xlog (byte *msg, word code, int length) {
-#if defined(XDI_USE_XLOG)
+static void xdi_xlog (byte *msg, word code, int length) {
xdi_dbg_xlog ("\x00\x02", msg, code, length);
-#endif
}
+#endif
/* -----------------------------------------------------------
This function writes the information about the Return Code
processing in the trace buffer. Trace ID is 221.
diff -urN linux/drivers/isdn/hardware/eicon/di.h
linux/drivers/isdn/hardware/eicon/di.h
--- linux/drivers/isdn/hardware/eicon/di.h 2002/11/01 23:26:56 1.1
+++ linux/drivers/isdn/hardware/eicon/di.h 2005/02/13 20:16:23 1.2
@@ -81,13 +81,8 @@
/*------------------------------------------------------------------*/
void pr_out(ADAPTER * a);
byte pr_dpc(ADAPTER * a);
-byte pr_test_int(ADAPTER * a);
-void pr_clear_int(ADAPTER * a);
-void scom_out(ADAPTER * a);
-byte scom_dpc(ADAPTER * a);
byte scom_test_int(ADAPTER * a);
void scom_clear_int(ADAPTER * a);
-void quadro_clear_int(ADAPTER * a);
/*------------------------------------------------------------------*/
/* OS specific functions used by IDI common code */
/*------------------------------------------------------------------*/
diff -urN linux/drivers/isdn/hardware/eicon/diva_didd.c
linux/drivers/isdn/hardware/eicon/diva_didd.c
--- linux/drivers/isdn/hardware/eicon/diva_didd.c 2004/09/19 12:30:10
1.6
+++ linux/drivers/isdn/hardware/eicon/diva_didd.c 2005/02/13 20:16:23
1.7
@@ -1,4 +1,4 @@
-/* $Id: diva_didd.c,v 1.13.6.1 2004/08/28 20:03:53 armin Exp $
+/* $Id: diva_didd.c,v 1.13.6.4 2005/02/11 19:40:25 armin Exp $
*
* DIDD Interface module for Eicon active cards.
*
@@ -23,7 +23,7 @@
#include "divasync.h"
#include "did_vers.h"
-static char *main_revision = "$Revision: 1.13.6.1 $";
+static char *main_revision = "$Revision: 1.13.6.4 $";
static char *DRIVERNAME =
"Eicon DIVA - DIDD table (http://www.melware.net)";
@@ -140,7 +140,7 @@
return (ret);
}
-void DIVA_EXIT_FUNCTION divadidd_exit(void)
+static void DIVA_EXIT_FUNCTION divadidd_exit(void)
{
diddfunc_finit();
remove_proc();
diff -urN linux/drivers/isdn/hardware/eicon/divamnt.c
linux/drivers/isdn/hardware/eicon/divamnt.c
--- linux/drivers/isdn/hardware/eicon/divamnt.c 2005/02/07 02:54:46 1.15
+++ linux/drivers/isdn/hardware/eicon/divamnt.c 2005/02/13 20:16:23 1.16
@@ -1,4 +1,4 @@
-/* $Id: divamnt.c,v 1.32.6.9 2005/01/31 12:22:20 armin Exp $
+/* $Id: divamnt.c,v 1.32.6.10 2005/02/11 19:40:25 armin Exp $
*
* Driver for Eicon DIVA Server ISDN cards.
* Maint module
@@ -25,7 +25,7 @@
#include "divasync.h"
#include "debug_if.h"
-static char *main_revision = "$Revision: 1.32.6.9 $";
+static char *main_revision = "$Revision: 1.32.6.10 $";
static int major;
@@ -34,9 +34,9 @@
MODULE_SUPPORTED_DEVICE("DIVA card driver");
MODULE_LICENSE("GPL");
-int buffer_length = 128;
+static int buffer_length = 128;
module_param(buffer_length, int, 0);
-unsigned long diva_dbg_mem = 0;
+static unsigned long diva_dbg_mem = 0;
module_param(diva_dbg_mem, ulong, 0);
static char *DRIVERNAME =
diff -urN linux/drivers/isdn/hardware/eicon/divasmain.c
linux/drivers/isdn/hardware/eicon/divasmain.c
--- linux/drivers/isdn/hardware/eicon/divasmain.c 2005/01/13 14:06:04
1.21
+++ linux/drivers/isdn/hardware/eicon/divasmain.c 2005/02/13 20:16:23
1.22
@@ -1,4 +1,4 @@
-/* $Id: divasmain.c,v 1.55.4.1 2004/05/21 12:15:00 armin Exp $
+/* $Id: divasmain.c,v 1.55.4.6 2005/02/09 19:28:20 armin Exp $
*
* Low level driver for Eicon DIVA Server ISDN cards.
*
@@ -41,7 +41,7 @@
#include "diva_dma.h"
#include "diva_pci.h"
-static char *main_revision = "$Revision: 1.55.4.1 $";
+static char *main_revision = "$Revision: 1.55.4.6 $";
static int major;
@@ -823,7 +823,7 @@
goto out;
}
- if ((ret = pci_module_init(&diva_pci_driver))) {
+ if ((ret = pci_register_driver(&diva_pci_driver))) {
#ifdef MODULE
remove_divas_proc();
divas_unregister_chrdev();
diff -urN linux/drivers/isdn/hardware/eicon/io.c
linux/drivers/isdn/hardware/eicon/io.c
--- linux/drivers/isdn/hardware/eicon/io.c 2005/02/07 02:54:46 1.6
+++ linux/drivers/isdn/hardware/eicon/io.c 2005/02/13 20:16:23 1.7
@@ -36,7 +36,7 @@
extern ADAPTER * adapter[MAX_ADAPTER];
extern PISDN_ADAPTER IoAdapters[MAX_ADAPTER];
void request (PISDN_ADAPTER, ENTITY *);
-void pcm_req (PISDN_ADAPTER, ENTITY *);
+static void pcm_req (PISDN_ADAPTER, ENTITY *);
/* --------------------------------------------------------------------------
local functions
-------------------------------------------------------------------------- */
@@ -118,7 +118,8 @@
&IoAdapter->Name[0]))
}
/*****************************************************************************/
-char *(ExceptionCauseTable[]) =
+#if defined(XDI_USE_XLOG)
+static char *(ExceptionCauseTable[]) =
{
"Interrupt",
"TLB mod /IBOUND",
@@ -153,6 +154,7 @@
"Reserved 30",
"VCED"
} ;
+#endif
void
dump_trap_frame (PISDN_ADAPTER IoAdapter, byte __iomem *exceptionFrame)
{
@@ -496,7 +498,7 @@
/* --------------------------------------------------------------------------
XLOG interface
-------------------------------------------------------------------------- */
-void
+static void
pcm_req (PISDN_ADAPTER IoAdapter, ENTITY *e)
{
diva_os_spin_lock_magic_t OldIrql ;
@@ -848,26 +850,3 @@
if ( e && e->callback )
e->callback (e) ;
}
-/* --------------------------------------------------------------------------
- routines for aligned reading and writing on RISC
- -------------------------------------------------------------------------- */
-void outp_words_from_buffer (word __iomem * adr, byte* P, dword len)
-{
- dword i = 0;
- word w;
- while (i < (len & 0xfffffffe)) {
- w = P[i++];
- w += (P[i++])<<8;
- outppw (adr, w);
- }
-}
-void inp_words_to_buffer (word __iomem * adr, byte* P, dword len)
-{
- dword i = 0;
- word w;
- while (i < (len & 0xfffffffe)) {
- w = inppw (adr);
- P[i++] = (byte)(w);
- P[i++] = (byte)(w>>8);
- }
-}
diff -urN linux/drivers/isdn/hardware/eicon/io.h
linux/drivers/isdn/hardware/eicon/io.h
--- linux/drivers/isdn/hardware/eicon/io.h 2004/12/04 18:16:03 1.5
+++ linux/drivers/isdn/hardware/eicon/io.h 2005/02/13 20:16:23 1.6
@@ -252,11 +252,6 @@
#define PR_RAM ((struct pr_ram *)0)
#define RAM ((struct dual *)0)
/* ---------------------------------------------------------------------
- Functions for port io
- --------------------------------------------------------------------- */
-void outp_words_from_buffer (word __iomem * adr, byte* P, dword len);
-void inp_words_to_buffer (word __iomem * adr, byte* P, dword len);
-/* ---------------------------------------------------------------------
platform specific conversions
--------------------------------------------------------------------- */
extern void * PTR_P(ADAPTER * a, ENTITY * e, void * P);
diff -urN linux/drivers/isdn/hardware/eicon/message.c
linux/drivers/isdn/hardware/eicon/message.c
--- linux/drivers/isdn/hardware/eicon/message.c 2004/12/04 18:16:03 1.6
+++ linux/drivers/isdn/hardware/eicon/message.c 2005/02/13 20:16:23 1.7
@@ -55,7 +55,7 @@
/* and it is not necessary to save it separate for every adapter */
/* Macrose defined here have only local meaning */
/*------------------------------------------------------------------*/
-dword diva_xdi_extended_features = 0;
+static dword diva_xdi_extended_features = 0;
#define DIVA_CAPI_USE_CMA 0x00000001
#define DIVA_CAPI_XDI_PROVIDES_SDRAM_BAR 0x00000002
@@ -72,11 +72,10 @@
/* local function prototypes */
/*------------------------------------------------------------------*/
-void group_optimization(DIVA_CAPI_ADAPTER * a, PLCI * plci);
-void set_group_ind_mask (PLCI *plci);
-void set_group_ind_mask_bit (PLCI *plci, word b);
-void clear_group_ind_mask_bit (PLCI *plci, word b);
-byte test_group_ind_mask_bit (PLCI *plci, word b);
+static void group_optimization(DIVA_CAPI_ADAPTER * a, PLCI * plci);
+static void set_group_ind_mask (PLCI *plci);
+static void clear_group_ind_mask_bit (PLCI *plci, word b);
+static byte test_group_ind_mask_bit (PLCI *plci, word b);
void AutomaticLaw(DIVA_CAPI_ADAPTER *);
word CapiRelease(word);
word CapiRegister(word);
@@ -88,7 +87,7 @@
word api_remove_start(void);
void api_remove_complete(void);
-void plci_remove(PLCI *);
+static void plci_remove(PLCI *);
static void diva_get_extended_adapter_features (DIVA_CAPI_ADAPTER * a);
static void diva_ask_for_xdi_sdram_bar (DIVA_CAPI_ADAPTER *, IDI_SYNC_REQ *);
@@ -100,9 +99,9 @@
static void sig_ind(PLCI *);
static void SendInfo(PLCI *, dword, byte * *, byte);
static void SendSetupInfo(APPL *, PLCI *, dword, byte * *, byte);
-void SendSSExtInd(APPL *, PLCI * plci, dword Id, byte * * parms);
+static void SendSSExtInd(APPL *, PLCI * plci, dword Id, byte * * parms);
-void VSwitchReqInd(PLCI *plci, dword Id, byte **parms);
+static void VSwitchReqInd(PLCI *plci, dword Id, byte **parms);
static void nl_ind(PLCI *);
@@ -254,11 +253,11 @@
-byte remove_started = FALSE;
-PLCI dummy_plci;
+static byte remove_started = FALSE;
+static PLCI dummy_plci;
-struct _ftable {
+static struct _ftable {
word command;
byte * format;
byte (* function)(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *,
API_PARSE *);
@@ -291,7 +290,7 @@
{_MANUFACTURER_I|RESPONSE, "", manufacturer_res}
};
-byte * cip_bc[29][2] = {
+static byte * cip_bc[29][2] = {
{ "", "" }, /* 0 */
{ "\x03\x80\x90\xa3", "\x03\x80\x90\xa2" }, /* 1 */
{ "\x02\x88\x90", "\x02\x88\x90" }, /* 2 */
@@ -324,7 +323,7 @@
{ "\x02\x88\x90", "\x02\x88\x90" } /* 28 */
};
-byte * cip_hlc[29] = {
+static byte * cip_hlc[29] = {
"", /* 0 */
"", /* 1 */
"", /* 2 */
@@ -716,7 +715,7 @@
/* internal command queue */
/*------------------------------------------------------------------*/
-void init_internal_command_queue (PLCI *plci)
+static void init_internal_command_queue (PLCI *plci)
{
word i;
@@ -729,7 +728,7 @@
}
-void start_internal_command (dword Id, PLCI *plci, t_std_internal_command
command_function)
+static void start_internal_command (dword Id, PLCI *plci,
t_std_internal_command command_function)
{
word i;
@@ -751,7 +750,7 @@
}
-void next_internal_command (dword Id, PLCI *plci)
+static void next_internal_command (dword Id, PLCI *plci)
{
word i;
@@ -1048,7 +1047,7 @@
}
-void plci_remove(PLCI * plci)
+static void plci_remove(PLCI * plci)
{
if(!plci) {
@@ -1094,7 +1093,7 @@
/* Application Group function helpers */
/*------------------------------------------------------------------*/
-void set_group_ind_mask (PLCI *plci)
+static void set_group_ind_mask (PLCI *plci)
{
word i;
@@ -1102,17 +1101,12 @@
plci->group_optimization_mask_table[i] = 0xffffffffL;
}
-void set_group_ind_mask_bit (PLCI *plci, word b)
-{
- plci->group_optimization_mask_table[b >> 5] |= (1L << (b & 0x1f));
-}
-
-void clear_group_ind_mask_bit (PLCI *plci, word b)
+static void clear_group_ind_mask_bit (PLCI *plci, word b)
{
plci->group_optimization_mask_table[b >> 5] &= ~(1L << (b & 0x1f));
}
-byte test_group_ind_mask_bit (PLCI *plci, word b)
+static byte test_group_ind_mask_bit (PLCI *plci, word b)
{
return ((plci->group_optimization_mask_table[b >> 5] & (1L << (b & 0x1f)))
!= 0);
}
@@ -1121,7 +1115,7 @@
/* c_ind_mask operations for arbitrary MAX_APPL */
/*------------------------------------------------------------------*/
-void clear_c_ind_mask (PLCI *plci)
+static void clear_c_ind_mask (PLCI *plci)
{
word i;
@@ -1129,7 +1123,7 @@
plci->c_ind_mask_table[i] = 0;
}
-byte c_ind_mask_empty (PLCI *plci)
+static byte c_ind_mask_empty (PLCI *plci)
{
word i;
@@ -1139,22 +1133,22 @@
return (i == C_IND_MASK_DWORDS);
}
-void set_c_ind_mask_bit (PLCI *plci, word b)
+static void set_c_ind_mask_bit (PLCI *plci, word b)
{
plci->c_ind_mask_table[b >> 5] |= (1L << (b & 0x1f));
}
-void clear_c_ind_mask_bit (PLCI *plci, word b)
+static void clear_c_ind_mask_bit (PLCI *plci, word b)
{
plci->c_ind_mask_table[b >> 5] &= ~(1L << (b & 0x1f));
}
-byte test_c_ind_mask_bit (PLCI *plci, word b)
+static byte test_c_ind_mask_bit (PLCI *plci, word b)
{
return ((plci->c_ind_mask_table[b >> 5] & (1L << (b & 0x1f))) != 0);
}
-void dump_c_ind_mask (PLCI *plci)
+static void dump_c_ind_mask (PLCI *plci)
{
static char hex_digit_table[0x10] =
{'0','1','2','3','4','5','6','7','8','9','a','b','c','d','e','f'};
@@ -6426,7 +6420,7 @@
return iesent;
}
-void SendSSExtInd(APPL * appl, PLCI * plci, dword Id, byte * * parms)
+static void SendSSExtInd(APPL * appl, PLCI * plci, dword Id, byte * *
parms)
{
word i;
/* Format of multi_ssext_parms[i][]:
@@ -14720,71 +14714,6 @@
/*------------------------------------------------------------------*/
-/* to be completed */
-void disable_adapter(byte adapter_number)
-{
- word j, ncci;
- DIVA_CAPI_ADAPTER *a;
- PLCI *plci;
- dword Id;
-
- if ((adapter_number == 0) || (adapter_number > max_adapter) ||
!adapter[adapter_number-1].request)
- {
- dbug(1,dprintf("disable adapter: number %d invalid",adapter_number));
- return;
- }
- dbug(1,dprintf("disable adapter number %d",adapter_number));
- /* Capi20 starts with Nr. 1, internal field starts with 0 */
- a = &adapter[adapter_number-1];
- a->adapter_disabled = TRUE;
- for(j=0;j<a->max_plci;j++)
- {
- if(a->plci[j].Id) /* disconnect logical links */
- {
- plci = &a->plci[j];
- if(plci->channels)
- {
- for(ncci=1;ncci<MAX_NCCI+1 && plci->channels;ncci++)
- {
- if(a->ncci_plci[ncci]==plci->Id)
- {
- Id = (((dword)ncci)<<16)|((word)plci->Id<<8)|a->Id;
- sendf(plci->appl,_DISCONNECT_B3_I,Id,0,"ws",0,"");
- plci->channels--;
- }
- }
- }
-
- if(plci->State!=LISTENING) /* disconnect physical links */
- {
- Id = ((word)plci->Id<<8)|a->Id;
- sendf(plci->appl, _DISCONNECT_I, Id, 0, "w", _L1_ERROR);
- plci_remove(plci);
- plci->Sig.Id = 0;
- plci->NL.Id = 0;
- plci_remove(plci);
- }
- }
- }
-}
-
-void enable_adapter(byte adapter_number)
-{
- DIVA_CAPI_ADAPTER *a;
-
- if ((adapter_number == 0) || (adapter_number > max_adapter) ||
!adapter[adapter_number-1].request)
- {
- dbug(1,dprintf("enable adapter: number %d invalid",adapter_number));
- return;
- }
- dbug(1,dprintf("enable adapter number %d",adapter_number));
- /* Capi20 starts with Nr. 1, internal field starts with 0 */
- a = &adapter[adapter_number-1];
- a->adapter_disabled = FALSE;
- listen_check(a);
-}
-
-
static word CPN_filter_ok(byte *cpn,DIVA_CAPI_ADAPTER * a,word offset)
{
return 1;
@@ -14800,7 +14729,7 @@
/* function must be enabled by setting "a->group_optimization_enabled" from
the */
/* OS specific part (per adapter).
*/
/**********************************************************************************/
-void group_optimization(DIVA_CAPI_ADAPTER * a, PLCI * plci)
+static void group_optimization(DIVA_CAPI_ADAPTER * a, PLCI * plci)
{
word i,j,k,busy,group_found;
dword info_mask_group[MAX_CIP_TYPES];
@@ -14967,7 +14896,7 @@
/* Functions for virtual Switching e.g. Transfer by join, Conference */
-void VSwitchReqInd(PLCI *plci, dword Id, byte **parms)
+static void VSwitchReqInd(PLCI *plci, dword Id, byte **parms)
{
word i;
/* Format of vswitch_t:
diff -urN linux/drivers/isdn/hardware/eicon/os_4bri.c
linux/drivers/isdn/hardware/eicon/os_4bri.c
--- linux/drivers/isdn/hardware/eicon/os_4bri.c 2004/12/04 18:16:03 1.6
+++ linux/drivers/isdn/hardware/eicon/os_4bri.c 2005/02/13 20:16:23 1.7
@@ -1,4 +1,4 @@
-/* $Id: os_4bri.c,v 1.28 2004/03/21 17:26:01 armin Exp $ */
+/* $Id: os_4bri.c,v 1.28.4.4 2005/02/11 19:40:25 armin Exp $ */
#include "platform.h"
#include "debuglib.h"
@@ -17,8 +17,8 @@
#include "mi_pc.h"
#include "dsrv4bri.h"
-void *diva_xdiLoadFileFile = NULL;
-dword diva_xdiLoadFileLength = 0;
+static void *diva_xdiLoadFileFile = NULL;
+static dword diva_xdiLoadFileLength = 0;
/*
** IMPORTS
@@ -416,8 +416,8 @@
if (i) {
Slave->serialNo = ((dword) (Slave->ControllerNumber <<
24)) |
a->xdi_adapter.serialNo;
- Slave->cardType = a->xdi_adapter.cardType;
- }
+ Slave->cardType = a->xdi_adapter.cardType;
+ }
}
/*
diff -urN linux/drivers/isdn/hardware/eicon/xdi_vers.h
linux/drivers/isdn/hardware/eicon/xdi_vers.h
--- linux/drivers/isdn/hardware/eicon/xdi_vers.h 2002/11/01 23:26:56
1.1
+++ linux/drivers/isdn/hardware/eicon/xdi_vers.h 2005/02/13 20:16:23
1.2
@@ -1,4 +1,3 @@
-
/*
*
Copyright (c) Eicon Networks, 2002.
diff -urN linux/drivers/isdn/hisax/avm_a1p.c linux/drivers/isdn/hisax/avm_a1p.c
--- linux/drivers/isdn/hisax/avm_a1p.c 2004/03/11 16:46:49 1.15
+++ linux/drivers/isdn/hisax/avm_a1p.c 2005/02/13 20:16:24 1.16
@@ -231,7 +231,7 @@
cs->irq = card->para[0];
- outb(cs->hw.avm.cfg_reg+ASL1_OFFSET, ASL1_W_ENABLE_S0);
+ byteout(cs->hw.avm.cfg_reg+ASL1_OFFSET, ASL1_W_ENABLE_S0);
byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00);
HZDELAY(HZ / 5 + 1);
byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,ASL0_W_RESET);
diff -urN linux/drivers/isdn/hisax/isdnhdlc.c
linux/drivers/isdn/hisax/isdnhdlc.c
--- linux/drivers/isdn/hisax/isdnhdlc.c 2004/07/20 20:21:19 1.4
+++ linux/drivers/isdn/hisax/isdnhdlc.c 2005/02/13 20:16:24 1.5
@@ -308,7 +308,7 @@
hdlc->crc = crc_ccitt_byte(hdlc->crc,
hdlc->shift_reg);
// good byte received
- if (dsize--) {
+ if (hdlc->dstpos < dsize) {
dst[hdlc->dstpos++] = hdlc->shift_reg;
} else {
// frame too long
diff -urN linux/drivers/md/dm-crypt.c linux/drivers/md/dm-crypt.c
--- linux/drivers/md/dm-crypt.c 2004/12/04 18:16:04 1.5
+++ linux/drivers/md/dm-crypt.c 2005/02/13 20:16:24 1.6
@@ -329,7 +329,7 @@
struct bio *base_bio, unsigned int *bio_vec_idx)
{
struct bio *bio;
- unsigned int nr_iovecs = dm_div_up(size, PAGE_SIZE);
+ unsigned int nr_iovecs = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
int gfp_mask = GFP_NOIO | __GFP_HIGHMEM;
unsigned long flags = current->flags;
unsigned int i;
diff -urN linux/drivers/md/dm-log.c linux/drivers/md/dm-log.c
--- linux/drivers/md/dm-log.c 2005/02/07 02:54:46 1.4
+++ linux/drivers/md/dm-log.c 2005/02/13 20:16:24 1.5
@@ -129,7 +129,7 @@
struct log_c {
struct dm_target *ti;
int touched;
- sector_t region_size;
+ uint32_t region_size;
unsigned int region_count;
region_t sync_count;
@@ -292,7 +292,7 @@
enum sync sync = DEFAULTSYNC;
struct log_c *lc;
- sector_t region_size;
+ uint32_t region_size;
unsigned int region_count;
size_t bitset_size;
@@ -313,12 +313,12 @@
}
}
- if (sscanf(argv[0], SECTOR_FORMAT, ®ion_size) != 1) {
+ if (sscanf(argv[0], "%u", ®ion_size) != 1) {
DMWARN("invalid region size string");
return -EINVAL;
}
- region_count = dm_div_up(ti->len, region_size);
+ region_count = dm_sector_div_up(ti->len, region_size);
lc = kmalloc(sizeof(*lc), GFP_KERNEL);
if (!lc) {
@@ -508,7 +508,7 @@
return write_header(lc);
}
-static sector_t core_get_region_size(struct dirty_log *log)
+static uint32_t core_get_region_size(struct dirty_log *log)
{
struct log_c *lc = (struct log_c *) log->context;
return lc->region_size;
@@ -616,7 +616,7 @@
break;
case STATUSTYPE_TABLE:
- DMEMIT("%s %u " SECTOR_FORMAT " ", log->type->name,
+ DMEMIT("%s %u %u ", log->type->name,
lc->sync == DEFAULTSYNC ? 1 : 2, lc->region_size);
DMEMIT_SYNC;
}
@@ -637,7 +637,7 @@
case STATUSTYPE_TABLE:
format_dev_t(buffer, lc->log_dev->bdev->bd_dev);
- DMEMIT("%s %u %s " SECTOR_FORMAT " ", log->type->name,
+ DMEMIT("%s %u %s %u ", log->type->name,
lc->sync == DEFAULTSYNC ? 2 : 3, buffer,
lc->region_size);
DMEMIT_SYNC;
diff -urN linux/drivers/md/dm-log.h linux/drivers/md/dm-log.h
--- linux/drivers/md/dm-log.h 2004/10/12 01:45:45 1.2
+++ linux/drivers/md/dm-log.h 2005/02/13 20:16:24 1.3
@@ -39,7 +39,7 @@
* Retrieves the smallest size of region that the log can
* deal with.
*/
- sector_t (*get_region_size)(struct dirty_log *log);
+ uint32_t (*get_region_size)(struct dirty_log *log);
/*
* A predicate to say whether a region is clean or not.
diff -urN linux/drivers/md/dm-raid1.c linux/drivers/md/dm-raid1.c
--- linux/drivers/md/dm-raid1.c 2005/02/07 02:54:46 1.4
+++ linux/drivers/md/dm-raid1.c 2005/02/13 20:16:24 1.5
@@ -67,7 +67,7 @@
struct mirror_set;
struct region_hash {
struct mirror_set *ms;
- sector_t region_size;
+ uint32_t region_size;
unsigned region_shift;
/* holds persistent region state */
@@ -135,7 +135,7 @@
#define MIN_REGIONS 64
#define MAX_RECOVERY 1
static int rh_init(struct region_hash *rh, struct mirror_set *ms,
- struct dirty_log *log, sector_t region_size,
+ struct dirty_log *log, uint32_t region_size,
region_t nr_regions)
{
unsigned int nr_buckets, max_buckets;
@@ -871,7 +871,7 @@
* Target functions
*---------------------------------------------------------------*/
static struct mirror_set *alloc_context(unsigned int nr_mirrors,
- sector_t region_size,
+ uint32_t region_size,
struct dm_target *ti,
struct dirty_log *dl)
{
@@ -894,7 +894,7 @@
ms->ti = ti;
ms->nr_mirrors = nr_mirrors;
- ms->nr_regions = dm_div_up(ti->len, region_size);
+ ms->nr_regions = dm_sector_div_up(ti->len, region_size);
ms->in_sync = 0;
if (rh_init(&ms->rh, ms, dl, region_size, ms->nr_regions)) {
@@ -916,7 +916,7 @@
kfree(ms);
}
-static inline int _check_region_size(struct dm_target *ti, sector_t size)
+static inline int _check_region_size(struct dm_target *ti, uint32_t size)
{
return !(size % (PAGE_SIZE >> 9) || (size & (size - 1)) ||
size > ti->len);
diff -urN linux/drivers/md/dm-stripe.c linux/drivers/md/dm-stripe.c
--- linux/drivers/md/dm-stripe.c 2005/02/07 02:54:46 1.12
+++ linux/drivers/md/dm-stripe.c 2005/02/13 20:16:24 1.13
@@ -21,7 +21,7 @@
uint32_t stripes;
/* The size of this target / num. stripes */
- uint32_t stripe_width;
+ sector_t stripe_width;
/* stripe chunk size */
uint32_t chunk_shift;
@@ -174,7 +174,7 @@
sector_t offset = bio->bi_sector - ti->begin;
sector_t chunk = offset >> sc->chunk_shift;
- uint32_t stripe = do_div(chunk, sc->stripes);
+ uint32_t stripe = sector_div(chunk, sc->stripes);
bio->bi_bdev = sc->stripe[stripe].dev->bdev;
bio->bi_sector = sc->stripe[stripe].physical_start +
diff -urN linux/drivers/md/dm-table.c linux/drivers/md/dm-table.c
--- linux/drivers/md/dm-table.c 2005/02/07 02:54:46 1.22
+++ linux/drivers/md/dm-table.c 2005/02/13 20:16:24 1.23
@@ -58,7 +58,7 @@
/*
* Similar to ceiling(log_size(n))
*/
-static unsigned int int_log(unsigned long n, unsigned long base)
+static unsigned int int_log(unsigned int n, unsigned int base)
{
int result = 0;
diff -urN linux/drivers/md/dm.c linux/drivers/md/dm.c
--- linux/drivers/md/dm.c 2005/02/07 02:54:46 1.27
+++ linux/drivers/md/dm.c 2005/02/13 20:16:24 1.28
@@ -331,8 +331,8 @@
*/
if (ti->split_io) {
sector_t boundary;
- boundary = dm_round_up(offset + 1, ti->split_io) - offset;
-
+ boundary = ((offset + ti->split_io) & ~(ti->split_io - 1))
+ - offset;
if (len > boundary)
len = boundary;
}
diff -urN linux/drivers/md/dm.h linux/drivers/md/dm.h
--- linux/drivers/md/dm.h 2005/02/07 02:54:46 1.15
+++ linux/drivers/md/dm.h 2005/02/13 20:16:24 1.16
@@ -143,21 +143,22 @@
}
/*
- * ceiling(n / size) * size
+ * Ceiling(n / sz)
*/
-static inline unsigned long dm_round_up(unsigned long n, unsigned long size)
-{
- unsigned long r = n % size;
- return n + (r ? (size - r) : 0);
-}
+#define dm_div_up(n, sz) (((n) + (sz) - 1) / (sz))
+
+#define dm_sector_div_up(n, sz) ( \
+{ \
+ sector_t _r = ((n) + (sz) - 1); \
+ sector_div(_r, (sz)); \
+ _r; \
+} \
+)
/*
- * Ceiling(n / size)
+ * ceiling(n / size) * size
*/
-static inline unsigned long dm_div_up(unsigned long n, unsigned long size)
-{
- return dm_round_up(n, size) / size;
-}
+#define dm_round_up(n, sz) (dm_div_up((n), (sz)) * (sz))
static inline sector_t to_sector(unsigned long n)
{
diff -urN linux/drivers/md/md.c linux/drivers/md/md.c
--- linux/drivers/md/md.c 2005/01/25 04:28:18 1.79
+++ linux/drivers/md/md.c 2005/02/13 20:16:24 1.80
@@ -336,8 +336,6 @@
struct completion event;
int ret;
- bio_get(bio);
-
rw |= (1 << BIO_RW_SYNC);
bio->bi_bdev = bdev;
@@ -937,8 +935,8 @@
max_dev = 0;
ITERATE_RDEV(mddev,rdev2,tmp)
- if (rdev2->desc_nr > max_dev)
- max_dev = rdev2->desc_nr;
+ if (rdev2->desc_nr+1 > max_dev)
+ max_dev = rdev2->desc_nr+1;
sb->max_dev = cpu_to_le32(max_dev);
for (i=0; i<max_dev;i++)
@@ -955,6 +953,7 @@
}
sb->recovery_offset = cpu_to_le64(0); /* not supported yet */
+ sb->sb_csum = calc_sb_1_csum(sb);
}
@@ -1474,10 +1473,13 @@
}
disk->major = MAJOR(dev);
disk->first_minor = unit << shift;
- if (partitioned)
+ if (partitioned) {
sprintf(disk->disk_name, "md_d%d", unit);
- else
+ sprintf(disk->devfs_name, "md/d%d", unit);
+ } else {
sprintf(disk->disk_name, "md%d", unit);
+ sprintf(disk->devfs_name, "md/%d", unit);
+ }
disk->fops = &md_fops;
disk->private_data = mddev;
disk->queue = mddev->queue;
@@ -2442,6 +2444,9 @@
{
mdk_rdev_t *rdev;
+ if (mddev->pers == NULL)
+ return -ENODEV;
+
rdev = find_rdev(mddev, dev);
if (!rdev)
return -ENODEV;
@@ -3364,10 +3369,12 @@
init_waitqueue_head(&mddev->recovery_wait);
last_check = 0;
- if (j)
+ if (j>2) {
printk(KERN_INFO
"md: resuming recovery of %s from checkpoint.\n",
mdname(mddev));
+ mddev->curr_resync = j;
+ }
while (j < max_sectors) {
int sectors;
@@ -3449,7 +3456,7 @@
if (!test_bit(MD_RECOVERY_ERR, &mddev->recovery) &&
mddev->curr_resync > 2 &&
- mddev->curr_resync > mddev->recovery_cp) {
+ mddev->curr_resync >= mddev->recovery_cp) {
if (test_bit(MD_RECOVERY_INTR, &mddev->recovery)) {
printk(KERN_INFO
"md: checkpointing recovery of %s.\n",
@@ -3657,7 +3664,7 @@
for (minor=0; minor < MAX_MD_DEVS; ++minor)
devfs_mk_bdev(MKDEV(mdp_major, minor<<MdpMinorShift),
S_IFBLK|S_IRUSR|S_IWUSR,
- "md/d%d", minor);
+ "md/mdp%d", minor);
register_reboot_notifier(&md_notifier);
diff -urN linux/drivers/md/raid5.c linux/drivers/md/raid5.c
--- linux/drivers/md/raid5.c 2005/02/07 02:54:46 1.54
+++ linux/drivers/md/raid5.c 2005/02/13 20:16:24 1.55
@@ -49,7 +49,7 @@
* This macro is used to determine the 'next' bio in the list, given the sector
* of the current stripe+device
*/
-#define r5_next_bio(bio, sect) ( ( bio->bi_sector + (bio->bi_size>>9) < sect +
STRIPE_SECTORS) ? bio->bi_next : NULL)
+#define r5_next_bio(bio, sect) ( ( (bio)->bi_sector + ((bio)->bi_size>>9) <
sect + STRIPE_SECTORS) ? (bio)->bi_next : NULL)
/*
* The following can be used to debug the driver
*/
@@ -232,6 +232,7 @@
}
static void unplug_slaves(mddev_t *mddev);
+static void raid5_unplug_device(request_queue_t *q);
static struct stripe_head *get_active_stripe(raid5_conf_t *conf, sector_t
sector,
int pd_idx, int noblock)
@@ -457,6 +458,7 @@
bio_init(&dev->req);
dev->req.bi_io_vec = &dev->vec;
dev->req.bi_vcnt++;
+ dev->req.bi_max_vecs++;
dev->vec.bv_page = dev->page;
dev->vec.bv_len = STRIPE_SIZE;
dev->vec.bv_offset = 0;
@@ -612,11 +614,10 @@
/*
- * Copy data between a page in the stripe cache, and one or more bion
- * The page could align with the middle of the bio, or there could be
- * several bion, each with several bio_vecs, which cover part of the page
- * Multiple bion are linked together on bi_next. There may be extras
- * at the end of this list. We ignore them.
+ * Copy data between a page in the stripe cache, and a bio.
+ * There are no alignment or size guarantees between the page or the
+ * bio except that there is some overlap.
+ * All iovecs in the bio must be considered.
*/
static void copy_data(int frombio, struct bio *bio,
struct page *page,
@@ -625,41 +626,38 @@
char *pa = page_address(page);
struct bio_vec *bvl;
int i;
+ int page_offset;
- for (;bio && bio->bi_sector < sector+STRIPE_SECTORS;
- bio = r5_next_bio(bio, sector) ) {
- int page_offset;
- if (bio->bi_sector >= sector)
- page_offset = (signed)(bio->bi_sector - sector) * 512;
- else
- page_offset = (signed)(sector - bio->bi_sector) * -512;
- bio_for_each_segment(bvl, bio, i) {
- int len = bio_iovec_idx(bio,i)->bv_len;
- int clen;
- int b_offset = 0;
-
- if (page_offset < 0) {
- b_offset = -page_offset;
- page_offset += b_offset;
- len -= b_offset;
- }
-
- if (len > 0 && page_offset + len > STRIPE_SIZE)
- clen = STRIPE_SIZE - page_offset;
- else clen = len;
+ if (bio->bi_sector >= sector)
+ page_offset = (signed)(bio->bi_sector - sector) * 512;
+ else
+ page_offset = (signed)(sector - bio->bi_sector) * -512;
+ bio_for_each_segment(bvl, bio, i) {
+ int len = bio_iovec_idx(bio,i)->bv_len;
+ int clen;
+ int b_offset = 0;
+
+ if (page_offset < 0) {
+ b_offset = -page_offset;
+ page_offset += b_offset;
+ len -= b_offset;
+ }
+
+ if (len > 0 && page_offset + len > STRIPE_SIZE)
+ clen = STRIPE_SIZE - page_offset;
+ else clen = len;
- if (clen > 0) {
- char *ba = __bio_kmap_atomic(bio, i, KM_USER0);
- if (frombio)
- memcpy(pa+page_offset, ba+b_offset,
clen);
- else
- memcpy(ba+b_offset, pa+page_offset,
clen);
- __bio_kunmap_atomic(ba, KM_USER0);
- }
- if (clen < len) /* hit end of page */
- break;
- page_offset += len;
+ if (clen > 0) {
+ char *ba = __bio_kmap_atomic(bio, i, KM_USER0);
+ if (frombio)
+ memcpy(pa+page_offset, ba+b_offset, clen);
+ else
+ memcpy(ba+b_offset, pa+page_offset, clen);
+ __bio_kunmap_atomic(ba, KM_USER0);
}
+ if (clen < len) /* hit end of page */
+ break;
+ page_offset += len;
}
}
@@ -725,6 +723,10 @@
ptr[count++] = page_address(sh->dev[i].page);
chosen = sh->dev[i].towrite;
sh->dev[i].towrite = NULL;
+
+ if (test_and_clear_bit(R5_Overlap,
&sh->dev[i].flags))
+ wake_up(&conf->wait_for_overlap);
+
if (sh->dev[i].written) BUG();
sh->dev[i].written = chosen;
check_xor();
@@ -737,6 +739,10 @@
if (i!=pd_idx && sh->dev[i].towrite) {
chosen = sh->dev[i].towrite;
sh->dev[i].towrite = NULL;
+
+ if (test_and_clear_bit(R5_Overlap,
&sh->dev[i].flags))
+ wake_up(&conf->wait_for_overlap);
+
if (sh->dev[i].written) BUG();
sh->dev[i].written = chosen;
}
@@ -793,7 +799,7 @@
* toread/towrite point to the first in a chain.
* The bi_next chain must be in order.
*/
-static void add_stripe_bio (struct stripe_head *sh, struct bio *bi, int
dd_idx, int forwrite)
+static int add_stripe_bio(struct stripe_head *sh, struct bio *bi, int dd_idx,
int forwrite)
{
struct bio **bip;
raid5_conf_t *conf = sh->raid_conf;
@@ -810,10 +816,13 @@
else
bip = &sh->dev[dd_idx].toread;
while (*bip && (*bip)->bi_sector < bi->bi_sector) {
- BUG_ON((*bip)->bi_sector + ((*bip)->bi_size >> 9) >
bi->bi_sector);
+ if ((*bip)->bi_sector + ((*bip)->bi_size >> 9) > bi->bi_sector)
+ goto overlap;
bip = & (*bip)->bi_next;
}
-/* FIXME do I need to worry about overlapping bion */
+ if (*bip && (*bip)->bi_sector < bi->bi_sector + ((bi->bi_size)>>9))
+ goto overlap;
+
if (*bip && bi->bi_next && (*bip) != bi->bi_next)
BUG();
if (*bip)
@@ -828,7 +837,7 @@
(unsigned long long)sh->sector, dd_idx);
if (forwrite) {
- /* check if page is coverred */
+ /* check if page is covered */
sector_t sector = sh->dev[dd_idx].sector;
for (bi=sh->dev[dd_idx].towrite;
sector < sh->dev[dd_idx].sector + STRIPE_SECTORS &&
@@ -840,6 +849,13 @@
if (sector >= sh->dev[dd_idx].sector + STRIPE_SECTORS)
set_bit(R5_OVERWRITE, &sh->dev[dd_idx].flags);
}
+ return 1;
+
+ overlap:
+ set_bit(R5_Overlap, &sh->dev[dd_idx].flags);
+ spin_unlock_irq(&conf->device_lock);
+ spin_unlock(&sh->lock);
+ return 0;
}
@@ -900,6 +916,8 @@
spin_lock_irq(&conf->device_lock);
rbi = dev->toread;
dev->toread = NULL;
+ if (test_and_clear_bit(R5_Overlap, &dev->flags))
+ wake_up(&conf->wait_for_overlap);
spin_unlock_irq(&conf->device_lock);
while (rbi && rbi->bi_sector < dev->sector +
STRIPE_SECTORS) {
copy_data(0, rbi, dev->page, dev->sector);
@@ -947,6 +965,9 @@
sh->dev[i].towrite = NULL;
if (bi) to_write--;
+ if (test_and_clear_bit(R5_Overlap, &sh->dev[i].flags))
+ wake_up(&conf->wait_for_overlap);
+
while (bi && bi->bi_sector < sh->dev[i].sector +
STRIPE_SECTORS){
struct bio *nextbi = r5_next_bio(bi,
sh->dev[i].sector);
clear_bit(BIO_UPTODATE, &bi->bi_flags);
@@ -975,6 +996,8 @@
if (!test_bit(R5_Insync, &sh->dev[i].flags)) {
bi = sh->dev[i].toread;
sh->dev[i].toread = NULL;
+ if (test_and_clear_bit(R5_Overlap,
&sh->dev[i].flags))
+ wake_up(&conf->wait_for_overlap);
if (bi) to_read--;
while (bi && bi->bi_sector < sh->dev[i].sector
+ STRIPE_SECTORS){
struct bio *nextbi = r5_next_bio(bi,
sh->dev[i].sector);
@@ -1266,6 +1289,7 @@
bi->bi_sector = sh->sector + rdev->data_offset;
bi->bi_flags = 1 << BIO_UPTODATE;
bi->bi_vcnt = 1;
+ bi->bi_max_vecs = 1;
bi->bi_idx = 0;
bi->bi_io_vec = &sh->dev[i].vec;
bi->bi_io_vec[0].bv_len = STRIPE_SIZE;
@@ -1402,6 +1426,7 @@
if ( bio_data_dir(bi) == WRITE )
md_write_start(mddev);
for (;logical_sector < last_sector; logical_sector += STRIPE_SECTORS) {
+ DEFINE_WAIT(w);
new_sector = raid5_compute_sector(logical_sector,
raid_disks, data_disks,
&dd_idx, &pd_idx, conf);
@@ -1410,17 +1435,28 @@
(unsigned long long)new_sector,
(unsigned long long)logical_sector);
+ retry:
+ prepare_to_wait(&conf->wait_for_overlap, &w,
TASK_UNINTERRUPTIBLE);
sh = get_active_stripe(conf, new_sector, pd_idx,
(bi->bi_rw&RWA_MASK));
if (sh) {
-
- add_stripe_bio(sh, bi, dd_idx, (bi->bi_rw&RW_MASK));
-
+ if (!add_stripe_bio(sh, bi, dd_idx,
(bi->bi_rw&RW_MASK))) {
+ /* Add failed due to overlap. Flush everything
+ * and wait a while
+ */
+ raid5_unplug_device(mddev->queue);
+ release_stripe(sh);
+ schedule();
+ goto retry;
+ }
+ finish_wait(&conf->wait_for_overlap, &w);
raid5_plug_device(conf);
handle_stripe(sh);
release_stripe(sh);
+
} else {
/* cannot get stripe for read-ahead, just give-up */
clear_bit(BIO_UPTODATE, &bi->bi_flags);
+ finish_wait(&conf->wait_for_overlap, &w);
break;
}
@@ -1568,6 +1604,7 @@
spin_lock_init(&conf->device_lock);
init_waitqueue_head(&conf->wait_for_stripe);
+ init_waitqueue_head(&conf->wait_for_overlap);
INIT_LIST_HEAD(&conf->handle_list);
INIT_LIST_HEAD(&conf->delayed_list);
INIT_LIST_HEAD(&conf->inactive_list);
diff -urN linux/drivers/md/raid6main.c linux/drivers/md/raid6main.c
--- linux/drivers/md/raid6main.c 2005/02/07 02:54:46 1.15
+++ linux/drivers/md/raid6main.c 2005/02/13 20:16:24 1.16
@@ -54,7 +54,7 @@
* This macro is used to determine the 'next' bio in the list, given the sector
* of the current stripe+device
*/
-#define r5_next_bio(bio, sect) ( ( bio->bi_sector + (bio->bi_size>>9) < sect +
STRIPE_SECTORS) ? bio->bi_next : NULL)
+#define r5_next_bio(bio, sect) ( ( (bio)->bi_sector + ((bio)->bi_size>>9) <
sect + STRIPE_SECTORS) ? (bio)->bi_next : NULL)
/*
* The following can be used to debug the driver
*/
@@ -478,6 +478,7 @@
bio_init(&dev->req);
dev->req.bi_io_vec = &dev->vec;
dev->req.bi_vcnt++;
+ dev->req.bi_max_vecs++;
dev->vec.bv_page = dev->page;
dev->vec.bv_len = STRIPE_SIZE;
dev->vec.bv_offset = 0;
@@ -670,41 +671,38 @@
char *pa = page_address(page);
struct bio_vec *bvl;
int i;
+ int page_offset;
- for (;bio && bio->bi_sector < sector+STRIPE_SECTORS;
- bio = r5_next_bio(bio, sector) ) {
- int page_offset;
- if (bio->bi_sector >= sector)
- page_offset = (signed)(bio->bi_sector - sector) * 512;
- else
- page_offset = (signed)(sector - bio->bi_sector) * -512;
- bio_for_each_segment(bvl, bio, i) {
- int len = bio_iovec_idx(bio,i)->bv_len;
- int clen;
- int b_offset = 0;
-
- if (page_offset < 0) {
- b_offset = -page_offset;
- page_offset += b_offset;
- len -= b_offset;
- }
-
- if (len > 0 && page_offset + len > STRIPE_SIZE)
- clen = STRIPE_SIZE - page_offset;
- else clen = len;
-
- if (clen > 0) {
- char *ba = __bio_kmap_atomic(bio, i, KM_USER0);
- if (frombio)
- memcpy(pa+page_offset, ba+b_offset,
clen);
- else
- memcpy(ba+b_offset, pa+page_offset,
clen);
- __bio_kunmap_atomic(ba, KM_USER0);
- }
- if (clen < len) /* hit end of page */
- break;
- page_offset += len;
+ if (bio->bi_sector >= sector)
+ page_offset = (signed)(bio->bi_sector - sector) * 512;
+ else
+ page_offset = (signed)(sector - bio->bi_sector) * -512;
+ bio_for_each_segment(bvl, bio, i) {
+ int len = bio_iovec_idx(bio,i)->bv_len;
+ int clen;
+ int b_offset = 0;
+
+ if (page_offset < 0) {
+ b_offset = -page_offset;
+ page_offset += b_offset;
+ len -= b_offset;
+ }
+
+ if (len > 0 && page_offset + len > STRIPE_SIZE)
+ clen = STRIPE_SIZE - page_offset;
+ else clen = len;
+
+ if (clen > 0) {
+ char *ba = __bio_kmap_atomic(bio, i, KM_USER0);
+ if (frombio)
+ memcpy(pa+page_offset, ba+b_offset, clen);
+ else
+ memcpy(ba+b_offset, pa+page_offset, clen);
+ __bio_kunmap_atomic(ba, KM_USER0);
}
+ if (clen < len) /* hit end of page */
+ break;
+ page_offset += len;
}
}
@@ -738,6 +736,10 @@
if ( i != pd_idx && i != qd_idx && sh->dev[i].towrite )
{
chosen = sh->dev[i].towrite;
sh->dev[i].towrite = NULL;
+
+ if (test_and_clear_bit(R5_Overlap,
&sh->dev[i].flags))
+ wake_up(&conf->wait_for_overlap);
+
if (sh->dev[i].written) BUG();
sh->dev[i].written = chosen;
}
@@ -900,7 +902,7 @@
* toread/towrite point to the first in a chain.
* The bi_next chain must be in order.
*/
-static void add_stripe_bio (struct stripe_head *sh, struct bio *bi, int
dd_idx, int forwrite)
+static int add_stripe_bio(struct stripe_head *sh, struct bio *bi, int dd_idx,
int forwrite)
{
struct bio **bip;
raid6_conf_t *conf = sh->raid_conf;
@@ -917,10 +919,13 @@
else
bip = &sh->dev[dd_idx].toread;
while (*bip && (*bip)->bi_sector < bi->bi_sector) {
- BUG_ON((*bip)->bi_sector + ((*bip)->bi_size >> 9) >
bi->bi_sector);
- bip = & (*bip)->bi_next;
+ if ((*bip)->bi_sector + ((*bip)->bi_size >> 9) > bi->bi_sector)
+ goto overlap;
+ bip = &(*bip)->bi_next;
}
-/* FIXME do I need to worry about overlapping bion */
+ if (*bip && (*bip)->bi_sector < bi->bi_sector + ((bi->bi_size)>>9))
+ goto overlap;
+
if (*bip && bi->bi_next && (*bip) != bi->bi_next)
BUG();
if (*bip)
@@ -935,7 +940,7 @@
(unsigned long long)sh->sector, dd_idx);
if (forwrite) {
- /* check if page is coverred */
+ /* check if page is covered */
sector_t sector = sh->dev[dd_idx].sector;
for (bi=sh->dev[dd_idx].towrite;
sector < sh->dev[dd_idx].sector + STRIPE_SECTORS &&
@@ -947,6 +952,13 @@
if (sector >= sh->dev[dd_idx].sector + STRIPE_SECTORS)
set_bit(R5_OVERWRITE, &sh->dev[dd_idx].flags);
}
+ return 1;
+
+ overlap:
+ set_bit(R5_Overlap, &sh->dev[dd_idx].flags);
+ spin_unlock_irq(&conf->device_lock);
+ spin_unlock(&sh->lock);
+ return 0;
}
@@ -1010,6 +1022,8 @@
spin_lock_irq(&conf->device_lock);
rbi = dev->toread;
dev->toread = NULL;
+ if (test_and_clear_bit(R5_Overlap, &dev->flags))
+ wake_up(&conf->wait_for_overlap);
spin_unlock_irq(&conf->device_lock);
while (rbi && rbi->bi_sector < dev->sector +
STRIPE_SECTORS) {
copy_data(0, rbi, dev->page, dev->sector);
@@ -1059,6 +1073,9 @@
sh->dev[i].towrite = NULL;
if (bi) to_write--;
+ if (test_and_clear_bit(R5_Overlap, &sh->dev[i].flags))
+ wake_up(&conf->wait_for_overlap);
+
while (bi && bi->bi_sector < sh->dev[i].sector +
STRIPE_SECTORS){
struct bio *nextbi = r5_next_bio(bi,
sh->dev[i].sector);
clear_bit(BIO_UPTODATE, &bi->bi_flags);
@@ -1087,6 +1104,8 @@
if (!test_bit(R5_Insync, &sh->dev[i].flags)) {
bi = sh->dev[i].toread;
sh->dev[i].toread = NULL;
+ if (test_and_clear_bit(R5_Overlap,
&sh->dev[i].flags))
+ wake_up(&conf->wait_for_overlap);
if (bi) to_read--;
while (bi && bi->bi_sector < sh->dev[i].sector
+ STRIPE_SECTORS){
struct bio *nextbi = r5_next_bio(bi,
sh->dev[i].sector);
@@ -1429,6 +1448,7 @@
bi->bi_sector = sh->sector + rdev->data_offset;
bi->bi_flags = 1 << BIO_UPTODATE;
bi->bi_vcnt = 1;
+ bi->bi_max_vecs = 1;
bi->bi_idx = 0;
bi->bi_io_vec = &sh->dev[i].vec;
bi->bi_io_vec[0].bv_len = STRIPE_SIZE;
@@ -1566,6 +1586,7 @@
if ( bio_data_dir(bi) == WRITE )
md_write_start(mddev);
for (;logical_sector < last_sector; logical_sector += STRIPE_SECTORS) {
+ DEFINE_WAIT(w);
new_sector = raid6_compute_sector(logical_sector,
raid_disks, data_disks,
&dd_idx, &pd_idx, conf);
@@ -1574,17 +1595,27 @@
(unsigned long long)new_sector,
(unsigned long long)logical_sector);
+ retry:
+ prepare_to_wait(&conf->wait_for_overlap, &w,
TASK_UNINTERRUPTIBLE);
sh = get_active_stripe(conf, new_sector, pd_idx,
(bi->bi_rw&RWA_MASK));
if (sh) {
-
- add_stripe_bio(sh, bi, dd_idx, (bi->bi_rw&RW_MASK));
-
+ if (!add_stripe_bio(sh, bi, dd_idx,
(bi->bi_rw&RW_MASK))) {
+ /* Add failed due to overlap. Flush everything
+ * and wait a while
+ */
+ raid6_unplug_device(mddev->queue);
+ release_stripe(sh);
+ schedule();
+ goto retry;
+ }
+ finish_wait(&conf->wait_for_overlap, &w);
raid6_plug_device(conf);
handle_stripe(sh);
release_stripe(sh);
} else {
/* cannot get stripe for read-ahead, just give-up */
clear_bit(BIO_UPTODATE, &bi->bi_flags);
+ finish_wait(&conf->wait_for_overlap, &w);
break;
}
@@ -1732,6 +1763,7 @@
spin_lock_init(&conf->device_lock);
init_waitqueue_head(&conf->wait_for_stripe);
+ init_waitqueue_head(&conf->wait_for_overlap);
INIT_LIST_HEAD(&conf->handle_list);
INIT_LIST_HEAD(&conf->delayed_list);
INIT_LIST_HEAD(&conf->inactive_list);
diff -urN linux/drivers/media/video/tda9887.c
linux/drivers/media/video/tda9887.c
--- linux/drivers/media/video/tda9887.c 2005/02/07 02:54:48 1.16
+++ linux/drivers/media/video/tda9887.c 2005/02/13 20:16:24 1.17
@@ -305,9 +305,9 @@
printk(" B5 force mute audio: %s\n",
(buf[1] & 0x20) ? "yes" : "no");
printk(" B6 output port 1 : %s\n",
- (buf[1] & 0x40) ? "high" : "low");
+ (buf[1] & 0x40) ? "high (inactive)" : "low (active)");
printk(" B7 output port 2 : %s\n",
- (buf[1] & 0x80) ? "high" : "low");
+ (buf[1] & 0x80) ? "high (inactive)" : "low (active)");
printk(PREFIX "write: byte C 0x%02x\n",buf[2]);
printk(" C0-4 top adjustment : %s dB\n", adjust[buf[2] & 0x1f]);
@@ -545,19 +545,24 @@
int rc;
memset(buf,0,sizeof(buf));
+ tda9887_set_tvnorm(t,buf);
buf[1] |= cOutputPort1Inactive;
buf[1] |= cOutputPort2Inactive;
- tda9887_set_tvnorm(t,buf);
if (UNSET != t->pinnacle_id) {
tda9887_set_pinnacle(t,buf);
}
tda9887_set_config(t,buf);
tda9887_set_insmod(t,buf);
+#if 0
+ /* This as-is breaks some cards, must be fixed in a
+ * card-specific way, probably using TDA9887_SET_CONFIG to
+ * turn on/off port2 */
if (t->std & V4L2_STD_SECAM_L) {
/* secam fixup (FIXME: move this to tvnorms array?) */
buf[1] &= ~cOutputPort2Inactive;
}
+#endif
dprintk(PREFIX "writing: b=0x%02x c=0x%02x e=0x%02x\n",
buf[1],buf[2],buf[3]);
diff -urN linux/drivers/mtd/chips/cfi_cmdset_0001.c
linux/drivers/mtd/chips/cfi_cmdset_0001.c
--- linux/drivers/mtd/chips/cfi_cmdset_0001.c 2005/01/13 14:06:08 1.17
+++ linux/drivers/mtd/chips/cfi_cmdset_0001.c 2005/02/13 20:16:24 1.18
@@ -36,10 +36,7 @@
#include <linux/mtd/cfi.h>
/* #define CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE */
-
-#ifdef CONFIG_MTD_XIP
-#define CMDSET0001_DISABLE_WRITE_SUSPEND
-#endif
+/* #define CMDSET0001_DISABLE_WRITE_SUSPEND */
// debugging, turns off buffer write mode if set to 1
#define FORCE_WORD_WRITE 0
@@ -152,7 +149,6 @@
#endif
#ifdef CMDSET0001_DISABLE_WRITE_SUSPEND
-/* The XIP config appears to have problems using write suspend at the moment
*/
static void fixup_no_write_suspend(struct mtd_info *mtd, void* param)
{
struct map_info *map = mtd->priv;
@@ -733,7 +729,7 @@
if (chip->priv) {
struct flchip_shared *shared = chip->priv;
spin_lock(&shared->lock);
- if (shared->writing == chip) {
+ if (shared->writing == chip && chip->oldstate == FL_READY) {
/* We own the ability to write, but we're done */
shared->writing = shared->erasing;
if (shared->writing && shared->writing != chip) {
@@ -745,17 +741,24 @@
put_chip(map, loaner, loaner->start);
spin_lock(chip->mutex);
spin_unlock(loaner->mutex);
- } else {
- if (chip->oldstate != FL_ERASING) {
- shared->erasing = NULL;
- if (chip->oldstate != FL_WRITING)
- shared->writing = NULL;
- }
- spin_unlock(&shared->lock);
+ wake_up(&chip->wq);
+ return;
}
- } else {
+ shared->erasing = NULL;
+ shared->writing = NULL;
+ } else if (shared->erasing == chip && shared->writing != chip) {
+ /*
+ * We own the ability to erase without the ability
+ * to write, which means the erase was suspended
+ * and some other partition is currently writing.
+ * Don't let the switch below mess things up since
+ * we don't have ownership to resume anything.
+ */
spin_unlock(&shared->lock);
+ wake_up(&chip->wq);
+ return;
}
+ spin_unlock(&shared->lock);
}
switch(chip->oldstate) {
diff -urN linux/drivers/net/ibmveth.c linux/drivers/net/ibmveth.c
--- linux/drivers/net/ibmveth.c 2004/12/27 02:15:58 1.9
+++ linux/drivers/net/ibmveth.c 2005/02/13 20:16:24 1.10
@@ -218,7 +218,8 @@
ibmveth_assert(index != IBM_VETH_INVALID_MAP);
ibmveth_assert(pool->skbuff[index] == NULL);
- dma_addr = vio_map_single(adapter->vdev, skb->data,
pool->buff_size, DMA_FROM_DEVICE);
+ dma_addr = dma_map_single(&adapter->vdev->dev, skb->data,
+ pool->buff_size, DMA_FROM_DEVICE);
pool->free_map[free_index] = IBM_VETH_INVALID_MAP;
pool->dma_addr[index] = dma_addr;
@@ -238,7 +239,9 @@
pool->free_map[free_index] = IBM_VETH_INVALID_MAP;
pool->skbuff[index] = NULL;
pool->consumer_index--;
- vio_unmap_single(adapter->vdev, pool->dma_addr[index],
pool->buff_size, DMA_FROM_DEVICE);
+ dma_unmap_single(&adapter->vdev->dev,
+ pool->dma_addr[index], pool->buff_size,
+ DMA_FROM_DEVICE);
dev_kfree_skb_any(skb);
adapter->replenish_add_buff_failure++;
break;
@@ -260,6 +263,15 @@
(atomic_read(&adapter->rx_buff_pool[2].available) <
adapter->rx_buff_pool[2].threshold));
}
+/* kick the replenish tasklet if we need replenishing and it isn't already
running */
+static inline void ibmveth_schedule_replenishing(struct ibmveth_adapter
*adapter)
+{
+ if(ibmveth_is_replenishing_needed(adapter) &&
+ (atomic_dec_if_positive(&adapter->not_replenishing) == 0)) {
+ schedule_work(&adapter->replenish_task);
+ }
+}
+
/* replenish tasklet routine */
static void ibmveth_replenish_task(struct ibmveth_adapter *adapter)
{
@@ -276,15 +288,6 @@
ibmveth_schedule_replenishing(adapter);
}
-/* kick the replenish tasklet if we need replenishing and it isn't already
running */
-static inline void ibmveth_schedule_replenishing(struct ibmveth_adapter
*adapter)
-{
- if(ibmveth_is_replenishing_needed(adapter) &&
- (atomic_dec_if_positive(&adapter->not_replenishing) == 0)) {
- schedule_work(&adapter->replenish_task);
- }
-}
-
/* empty and free ana buffer pool - also used to do cleanup in error paths */
static void ibmveth_free_buffer_pool(struct ibmveth_adapter *adapter, struct
ibmveth_buff_pool *pool)
{
@@ -299,7 +302,7 @@
for(i = 0; i < pool->size; ++i) {
struct sk_buff *skb = pool->skbuff[i];
if(skb) {
- vio_unmap_single(adapter->vdev,
+ dma_unmap_single(&adapter->vdev->dev,
pool->dma_addr[i],
pool->buff_size,
DMA_FROM_DEVICE);
@@ -337,7 +340,7 @@
adapter->rx_buff_pool[pool].skbuff[index] = NULL;
- vio_unmap_single(adapter->vdev,
+ dma_unmap_single(&adapter->vdev->dev,
adapter->rx_buff_pool[pool].dma_addr[index],
adapter->rx_buff_pool[pool].buff_size,
DMA_FROM_DEVICE);
@@ -408,7 +411,9 @@
{
if(adapter->buffer_list_addr != NULL) {
if(!dma_mapping_error(adapter->buffer_list_dma)) {
- vio_unmap_single(adapter->vdev,
adapter->buffer_list_dma, 4096, DMA_BIDIRECTIONAL);
+ dma_unmap_single(&adapter->vdev->dev,
+ adapter->buffer_list_dma, 4096,
+ DMA_BIDIRECTIONAL);
adapter->buffer_list_dma = DMA_ERROR_CODE;
}
free_page((unsigned long)adapter->buffer_list_addr);
@@ -417,7 +422,9 @@
if(adapter->filter_list_addr != NULL) {
if(!dma_mapping_error(adapter->filter_list_dma)) {
- vio_unmap_single(adapter->vdev,
adapter->filter_list_dma, 4096, DMA_BIDIRECTIONAL);
+ dma_unmap_single(&adapter->vdev->dev,
+ adapter->filter_list_dma, 4096,
+ DMA_BIDIRECTIONAL);
adapter->filter_list_dma = DMA_ERROR_CODE;
}
free_page((unsigned long)adapter->filter_list_addr);
@@ -426,7 +433,10 @@
if(adapter->rx_queue.queue_addr != NULL) {
if(!dma_mapping_error(adapter->rx_queue.queue_dma)) {
- vio_unmap_single(adapter->vdev,
adapter->rx_queue.queue_dma, adapter->rx_queue.queue_len, DMA_BIDIRECTIONAL);
+ dma_unmap_single(&adapter->vdev->dev,
+ adapter->rx_queue.queue_dma,
+ adapter->rx_queue.queue_len,
+ DMA_BIDIRECTIONAL);
adapter->rx_queue.queue_dma = DMA_ERROR_CODE;
}
kfree(adapter->rx_queue.queue_addr);
@@ -472,9 +482,13 @@
return -ENOMEM;
}
- adapter->buffer_list_dma = vio_map_single(adapter->vdev,
adapter->buffer_list_addr, 4096, DMA_BIDIRECTIONAL);
- adapter->filter_list_dma = vio_map_single(adapter->vdev,
adapter->filter_list_addr, 4096, DMA_BIDIRECTIONAL);
- adapter->rx_queue.queue_dma = vio_map_single(adapter->vdev,
adapter->rx_queue.queue_addr, adapter->rx_queue.queue_len, DMA_BIDIRECTIONAL);
+ adapter->buffer_list_dma = dma_map_single(&adapter->vdev->dev,
+ adapter->buffer_list_addr, 4096, DMA_BIDIRECTIONAL);
+ adapter->filter_list_dma = dma_map_single(&adapter->vdev->dev,
+ adapter->filter_list_addr, 4096, DMA_BIDIRECTIONAL);
+ adapter->rx_queue.queue_dma = dma_map_single(&adapter->vdev->dev,
+ adapter->rx_queue.queue_addr,
+ adapter->rx_queue.queue_len, DMA_BIDIRECTIONAL);
if((dma_mapping_error(adapter->buffer_list_dma) ) ||
(dma_mapping_error(adapter->filter_list_dma)) ||
@@ -644,7 +658,7 @@
/* map the initial fragment */
desc[0].fields.length = nfrags ? skb->len - skb->data_len : skb->len;
- desc[0].fields.address = vio_map_single(adapter->vdev, skb->data,
+ desc[0].fields.address = dma_map_single(&adapter->vdev->dev, skb->data,
desc[0].fields.length, DMA_TO_DEVICE);
desc[0].fields.valid = 1;
@@ -662,7 +676,7 @@
while(curfrag--) {
skb_frag_t *frag = &skb_shinfo(skb)->frags[curfrag];
desc[curfrag+1].fields.address
- = vio_map_single(adapter->vdev,
+ = dma_map_single(&adapter->vdev->dev,
page_address(frag->page) + frag->page_offset,
frag->size, DMA_TO_DEVICE);
desc[curfrag+1].fields.length = frag->size;
@@ -674,7 +688,7 @@
adapter->stats.tx_dropped++;
/* Free all the mappings we just created */
while(curfrag < nfrags) {
- vio_unmap_single(adapter->vdev,
+ dma_unmap_single(&adapter->vdev->dev,
desc[curfrag+1].fields.address,
desc[curfrag+1].fields.length,
DMA_TO_DEVICE);
@@ -714,7 +728,9 @@
}
do {
- vio_unmap_single(adapter->vdev, desc[nfrags].fields.address,
desc[nfrags].fields.length, DMA_TO_DEVICE);
+ dma_unmap_single(&adapter->vdev->dev,
+ desc[nfrags].fields.address,
+ desc[nfrags].fields.length, DMA_TO_DEVICE);
} while(--nfrags >= 0);
dev_kfree_skb(skb);
diff -urN linux/drivers/net/sunlance.c linux/drivers/net/sunlance.c
--- linux/drivers/net/sunlance.c 2004/10/25 20:44:28 1.45
+++ linux/drivers/net/sunlance.c 2005/02/13 20:16:24 1.46
@@ -232,7 +232,8 @@
struct lance_private {
void __iomem *lregs; /* Lance RAP/RDP regs. */
void __iomem *dregs; /* DMA controller regs. */
- struct lance_init_block *init_block;
+ struct lance_init_block __iomem *init_block_iomem;
+ struct lance_init_block *init_block_mem;
spinlock_t lock;
@@ -314,7 +315,7 @@
static void lance_init_ring_dvma(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
- struct lance_init_block *ib = lp->init_block;
+ struct lance_init_block *ib = lp->init_block_mem;
dma_addr_t aib = lp->init_block_dvma;
__u32 leptr;
int i;
@@ -371,7 +372,7 @@
static void lance_init_ring_pio(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
- struct lance_init_block *ib = lp->init_block;
+ struct lance_init_block __iomem *ib = lp->init_block_iomem;
u32 leptr;
int i;
@@ -501,7 +502,7 @@
static void lance_rx_dvma(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
- struct lance_init_block *ib = lp->init_block;
+ struct lance_init_block *ib = lp->init_block_mem;
struct lance_rx_desc *rd;
u8 bits;
int len, entry = lp->rx_new;
@@ -564,7 +565,7 @@
static void lance_tx_dvma(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
- struct lance_init_block *ib = lp->init_block;
+ struct lance_init_block *ib = lp->init_block_mem;
int i, j;
spin_lock(&lp->lock);
@@ -674,8 +675,8 @@
static void lance_rx_pio(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
- struct lance_init_block *ib = lp->init_block;
- struct lance_rx_desc *rd;
+ struct lance_init_block __iomem *ib = lp->init_block_iomem;
+ struct lance_rx_desc __iomem *rd;
unsigned char bits;
int len, entry;
struct sk_buff *skb;
@@ -736,14 +737,14 @@
static void lance_tx_pio(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
- struct lance_init_block *ib = lp->init_block;
+ struct lance_init_block __iomem *ib = lp->init_block_iomem;
int i, j;
spin_lock(&lp->lock);
j = lp->tx_old;
for (i = j; i != lp->tx_new; i = j) {
- struct lance_tx_desc *td = &ib->btx_ring [i];
+ struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
u8 bits = sbus_readb(&td->tmd1_bits);
/* If we hit a packet not owned by us, stop */
@@ -880,15 +881,13 @@
static void build_fake_packet(struct lance_private *lp)
{
struct net_device *dev = lp->dev;
- struct lance_init_block *ib = lp->init_block;
- u16 *packet;
- struct ethhdr *eth;
int i, entry;
entry = lp->tx_new & TX_RING_MOD_MASK;
- packet = (u16 *) &(ib->tx_buf[entry][0]);
- eth = (struct ethhdr *) packet;
if (lp->pio_buffer) {
+ struct lance_init_block __iomem *ib = lp->init_block_iomem;
+ u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
+ struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
sbus_writew(0, &packet[i]);
for (i = 0; i < 6; i++) {
@@ -899,6 +898,9 @@
sbus_writew(0, &ib->btx_ring[entry].misc);
sbus_writeb(LE_T1_POK|LE_T1_OWN,
&ib->btx_ring[entry].tmd1_bits);
} else {
+ struct lance_init_block *ib = lp->init_block_mem;
+ u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
+ struct ethhdr *eth = (struct ethhdr *) packet;
memset(packet, 0, ETH_ZLEN);
for (i = 0; i < 6; i++) {
eth->h_dest[i] = dev->dev_addr[i];
@@ -916,7 +918,6 @@
static int lance_open(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
- struct lance_init_block *ib = lp->init_block;
int status = 0;
last_dev = dev;
@@ -943,10 +944,12 @@
* BTW it is common bug in all lance drivers! --ANK
*/
if (lp->pio_buffer) {
+ struct lance_init_block __iomem *ib = lp->init_block_iomem;
sbus_writew(0, &ib->mode);
sbus_writel(0, &ib->filter[0]);
sbus_writel(0, &ib->filter[1]);
} else {
+ struct lance_init_block *ib = lp->init_block_mem;
ib->mode = 0;
ib->filter [0] = 0;
ib->filter [1] = 0;
@@ -1113,7 +1116,6 @@
static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
- struct lance_init_block *ib = lp->init_block;
int entry, skblen, len;
skblen = skb->len;
@@ -1126,6 +1128,7 @@
entry = lp->tx_new & TX_RING_MOD_MASK;
if (lp->pio_buffer) {
+ struct lance_init_block __iomem *ib = lp->init_block_iomem;
sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
sbus_writew(0, &ib->btx_ring[entry].misc);
lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data,
skblen);
@@ -1133,6 +1136,7 @@
lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
sbus_writeb(LE_T1_POK | LE_T1_OWN,
&ib->btx_ring[entry].tmd1_bits);
} else {
+ struct lance_init_block *ib = lp->init_block_mem;
ib->btx_ring [entry].length = (-len) | 0xf000;
ib->btx_ring [entry].misc = 0;
memcpy((char *)&ib->tx_buf [entry][0], skb->data, skblen);
@@ -1174,33 +1178,31 @@
static void lance_load_multicast(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
- struct lance_init_block *ib = lp->init_block;
- u16 *mcast_table = (u16 *) &ib->filter;
struct dev_mc_list *dmi = dev->mc_list;
char *addrs;
int i;
u32 crc;
+ u32 val;
/* set all multicast bits */
- if (dev->flags & IFF_ALLMULTI) {
- if (lp->pio_buffer) {
- sbus_writel(0xffffffff, &ib->filter[0]);
- sbus_writel(0xffffffff, &ib->filter[1]);
- } else {
- ib->filter [0] = 0xffffffff;
- ib->filter [1] = 0xffffffff;
- }
- return;
- }
- /* clear the multicast filter */
+ if (dev->flags & IFF_ALLMULTI)
+ val = ~0;
+ else
+ val = 0;
+
if (lp->pio_buffer) {
- sbus_writel(0, &ib->filter[0]);
- sbus_writel(0, &ib->filter[1]);
+ struct lance_init_block __iomem *ib = lp->init_block_iomem;
+ sbus_writel(val, &ib->filter[0]);
+ sbus_writel(val, &ib->filter[1]);
} else {
- ib->filter [0] = 0;
- ib->filter [1] = 0;
+ struct lance_init_block *ib = lp->init_block_mem;
+ ib->filter [0] = val;
+ ib->filter [1] = val;
}
+ if (dev->flags & IFF_ALLMULTI)
+ return;
+
/* Add addresses */
for (i = 0; i < dev->mc_count; i++) {
addrs = dmi->dmi_addr;
@@ -1212,10 +1214,14 @@
crc = ether_crc_le(6, addrs);
crc = crc >> 26;
if (lp->pio_buffer) {
+ struct lance_init_block __iomem *ib =
lp->init_block_iomem;
+ u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
u16 tmp = sbus_readw(&mcast_table[crc>>4]);
tmp |= 1 << (crc & 0xf);
sbus_writew(tmp, &mcast_table[crc>>4]);
} else {
+ struct lance_init_block *ib = lp->init_block_mem;
+ u16 *mcast_table = (u16 *) &ib->filter;
mcast_table [crc >> 4] |= 1 << (crc & 0xf);
}
}
@@ -1224,7 +1230,8 @@
static void lance_set_multicast(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
- struct lance_init_block *ib = lp->init_block;
+ struct lance_init_block *ib_mem = lp->init_block_mem;
+ struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
u16 mode;
if (!netif_running(dev))
@@ -1242,21 +1249,21 @@
lp->init_ring(dev);
if (lp->pio_buffer)
- mode = sbus_readw(&ib->mode);
+ mode = sbus_readw(&ib_iomem->mode);
else
- mode = ib->mode;
+ mode = ib_mem->mode;
if (dev->flags & IFF_PROMISC) {
mode |= LE_MO_PROM;
if (lp->pio_buffer)
- sbus_writew(mode, &ib->mode);
+ sbus_writew(mode, &ib_iomem->mode);
else
- ib->mode = mode;
+ ib_mem->mode = mode;
} else {
mode &= ~LE_MO_PROM;
if (lp->pio_buffer)
- sbus_writew(mode, &ib->mode);
+ sbus_writew(mode, &ib_iomem->mode);
else
- ib->mode = mode;
+ ib_mem->mode = mode;
lance_load_multicast(dev);
}
load_csrs(lp);
@@ -1275,16 +1282,14 @@
{
if (lp->lregs)
sbus_iounmap(lp->lregs, LANCE_REG_SIZE);
- if (lp->init_block != NULL) {
- if (lp->pio_buffer) {
- sbus_iounmap(lp->init_block,
- sizeof(struct lance_init_block));
- } else {
- sbus_free_consistent(lp->sdev,
- sizeof(struct lance_init_block),
- lp->init_block,
- lp->init_block_dvma);
- }
+ if (lp->init_block_iomem) {
+ sbus_iounmap(lp->init_block_iomem,
+ sizeof(struct lance_init_block));
+ } else if (lp->init_block_mem) {
+ sbus_free_consistent(lp->sdev,
+ sizeof(struct lance_init_block),
+ lp->init_block_mem,
+ lp->init_block_dvma);
}
}
@@ -1326,6 +1331,7 @@
return -ENOMEM;
lp = netdev_priv(dev);
+ memset(lp, 0, sizeof(*lp));
if (sparc_lance_debug && version_printed++ == 0)
printk (KERN_INFO "%s", version);
@@ -1342,17 +1348,22 @@
/* Get the IO region */
lp->lregs = sbus_ioremap(&sdev->resource[0], 0,
LANCE_REG_SIZE, lancestr);
- if (lp->lregs == 0UL) {
+ if (!lp->lregs) {
printk(KERN_ERR "SunLance: Cannot map registers.\n");
goto fail;
}
lp->sdev = sdev;
if (lebuffer) {
- lp->init_block =
+ /* sanity check */
+ if (lebuffer->resource[0].start & 7) {
+ printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not
on even boundary.\n");
+ goto fail;
+ }
+ lp->init_block_iomem =
sbus_ioremap(&lebuffer->resource[0], 0,
sizeof(struct lance_init_block),
"lebuffer");
- if (lp->init_block == NULL) {
+ if (!lp->init_block_iomem) {
printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
goto fail;
}
@@ -1362,11 +1373,10 @@
lp->rx = lance_rx_pio;
lp->tx = lance_tx_pio;
} else {
- lp->init_block =
+ lp->init_block_mem =
sbus_alloc_consistent(sdev, sizeof(struct
lance_init_block),
&lp->init_block_dvma);
- if (lp->init_block == NULL ||
- lp->init_block_dvma == 0) {
+ if (!lp->init_block_mem || lp->init_block_dvma == 0) {
printk(KERN_ERR "SunLance: Cannot allocate consistent
DMA memory.\n");
goto fail;
}
@@ -1449,13 +1459,7 @@
udelay(200);
sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
} else
- lp->dregs = 0;
-
- /* This should never happen. */
- if ((unsigned long)(lp->init_block->brx_ring) & 0x07) {
- printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even
boundary.\n");
- goto fail;
- }
+ lp->dregs = NULL;
lp->dev = dev;
SET_MODULE_OWNER(dev);
@@ -1499,8 +1503,7 @@
return 0;
fail:
- if (lp != NULL)
- lance_free_hwresources(lp);
+ lance_free_hwresources(lp);
free_netdev(dev);
return -ENODEV;
}
@@ -1539,7 +1542,7 @@
memset(&sdev, 0, sizeof(sdev));
sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr;
sdev.irqs[0] = 6;
- return sparc_lance_init(&sdev, 0, 0);
+ return sparc_lance_init(&sdev, NULL, NULL);
}
return -ENODEV;
}
diff -urN linux/drivers/net/tg3.c linux/drivers/net/tg3.c
--- linux/drivers/net/tg3.c 2005/02/07 02:54:49 1.54
+++ linux/drivers/net/tg3.c 2005/02/13 20:16:24 1.55
@@ -60,8 +60,8 @@
#define DRV_MODULE_NAME "tg3"
#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "3.19"
-#define DRV_MODULE_RELDATE "January 26, 2005"
+#define DRV_MODULE_VERSION "3.22"
+#define DRV_MODULE_RELDATE "February 11, 2005"
#define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0
@@ -893,7 +893,7 @@
GRC_LCLCTRL_GPIO_OUTPUT1));
udelay(100);
} else {
- int no_gpio2;
+ u32 no_gpio2;
u32 grc_local_ctrl;
if (tp_peer != tp &&
@@ -901,8 +901,8 @@
return;
/* On 5753 and variants, GPIO2 cannot be used. */
- no_gpio2 = (tp->nic_sram_data_cfg &
- NIC_SRAM_DATA_CFG_NO_GPIO2) != 0;
+ no_gpio2 = tp->nic_sram_data_cfg &
+ NIC_SRAM_DATA_CFG_NO_GPIO2;
grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 |
GRC_LCLCTRL_GPIO_OE1 |
@@ -914,29 +914,17 @@
GRC_LCLCTRL_GPIO_OUTPUT2);
}
tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl |
- grc_local_ctrl);
+ grc_local_ctrl);
udelay(100);
- grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 |
- GRC_LCLCTRL_GPIO_OE1 |
- GRC_LCLCTRL_GPIO_OE2 |
- GRC_LCLCTRL_GPIO_OUTPUT0 |
- GRC_LCLCTRL_GPIO_OUTPUT1 |
- GRC_LCLCTRL_GPIO_OUTPUT2;
- if (no_gpio2) {
- grc_local_ctrl &= ~(GRC_LCLCTRL_GPIO_OE2 |
- GRC_LCLCTRL_GPIO_OUTPUT2);
- }
+ grc_local_ctrl |= GRC_LCLCTRL_GPIO_OUTPUT0;
+
tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl |
- grc_local_ctrl);
+ grc_local_ctrl);
udelay(100);
- grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 |
- GRC_LCLCTRL_GPIO_OE1 |
- GRC_LCLCTRL_GPIO_OE2 |
- GRC_LCLCTRL_GPIO_OUTPUT0 |
- GRC_LCLCTRL_GPIO_OUTPUT1;
if (!no_gpio2) {
+ grc_local_ctrl &= ~GRC_LCLCTRL_GPIO_OUTPUT2;
tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl |
grc_local_ctrl);
udelay(100);
@@ -2146,8 +2134,9 @@
if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID)
port_a = 0;
- serdes_cfg = tr32(MAC_SERDES_CFG) &
- ((1 << 23) | (1 << 22) | (1 << 21) | (1 << 20));
+ /* preserve bits 0-11,13,14 for signal pre-emphasis */
+ /* preserve bits 20-23 for voltage regulator */
+ serdes_cfg = tr32(MAC_SERDES_CFG) & 0x00f06fff;
}
sg_dig_ctrl = tr32(SG_DIG_CTRL);
@@ -2158,9 +2147,9 @@
u32 val = serdes_cfg;
if (port_a)
- val |= 0xc010880;
+ val |= 0xc010000;
else
- val |= 0x4010880;
+ val |= 0x4010000;
tw32_f(MAC_SERDES_CFG, val);
}
tw32_f(SG_DIG_CTRL, 0x01388400);
@@ -2183,7 +2172,7 @@
if (sg_dig_ctrl != expected_sg_dig_ctrl) {
if (workaround)
- tw32_f(MAC_SERDES_CFG, serdes_cfg | 0xc011880);
+ tw32_f(MAC_SERDES_CFG, serdes_cfg | 0xc011000);
tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl | (1 << 30));
udelay(5);
tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl);
@@ -2224,9 +2213,9 @@
u32 val = serdes_cfg;
if (port_a)
- val |= 0xc010880;
+ val |= 0xc010000;
else
- val |= 0x4010880;
+ val |= 0x4010000;
tw32_f(MAC_SERDES_CFG, val);
}
@@ -2234,8 +2223,12 @@
tw32_f(SG_DIG_CTRL, 0x01388400);
udelay(40);
+ /* Link parallel detection - link is up */
+ /* only if we have PCS_SYNC and not */
+ /* receiving config code words */
mac_status = tr32(MAC_STATUS);
- if (mac_status & MAC_STATUS_PCS_SYNCED) {
+ if ((mac_status & MAC_STATUS_PCS_SYNCED) &&
+ !(mac_status & MAC_STATUS_RCVD_CFG)) {
tg3_setup_flow_control(tp, 0, 0);
current_link_up = 1;
}
@@ -5416,8 +5409,10 @@
udelay(10);
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) {
+ if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) &&
+ !(tp->tg3_flags2 & TG3_FLG2_SERDES_PREEMPHASIS)) {
/* Set drive transmission level to 1.2V */
+ /* only if the signal pre-emphasis bit is not set */
val = tr32(MAC_SERDES_CFG);
val &= 0xfffff000;
val |= 0x880;
@@ -7508,11 +7503,19 @@
tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val);
if (val == NIC_SRAM_DATA_SIG_MAGIC) {
u32 nic_cfg, led_cfg;
- u32 nic_phy_id, cfg2;
+ u32 nic_phy_id, ver, cfg2 = 0;
tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg);
tp->nic_sram_data_cfg = nic_cfg;
+ tg3_read_mem(tp, NIC_SRAM_DATA_VER, &ver);
+ ver >>= NIC_SRAM_DATA_VER_SHIFT;
+ if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700) &&
+ (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) &&
+ (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5703) &&
+ (ver > 0) && (ver < 0x100))
+ tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &cfg2);
+
eeprom_signature_found = 1;
if ((nic_cfg & NIC_SRAM_DATA_CFG_PHY_TYPE_MASK) ==
@@ -7531,8 +7534,7 @@
eeprom_phy_id = 0;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) {
- tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &led_cfg);
- led_cfg &= (NIC_SRAM_DATA_CFG_LED_MODE_MASK |
+ led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK |
SHASTA_EXT_LED_MODE_MASK);
} else
led_cfg = nic_cfg & NIC_SRAM_DATA_CFG_LED_MODE_MASK;
@@ -7590,9 +7592,13 @@
if (nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL)
tp->tg3_flags |= TG3_FLAG_SERDES_WOL_CAP;
- tg3_read_mem(tp, NIC_SRAM_DATA_PHY_ID, &cfg2);
if (cfg2 & (1 << 17))
tp->tg3_flags2 |= TG3_FLG2_CAPACITIVE_COUPLING;
+
+ /* serdes signal pre-emphasis in register 0x590 set by */
+ /* bootcode if bit 18 is set */
+ if (cfg2 & (1 << 18))
+ tp->tg3_flags2 |= TG3_FLG2_SERDES_PREEMPHASIS;
}
/* Reading the PHY ID register can conflict with ASF
diff -urN linux/drivers/net/tg3.h linux/drivers/net/tg3.h
--- linux/drivers/net/tg3.h 2005/02/07 02:54:49 1.28
+++ linux/drivers/net/tg3.h 2005/02/13 20:16:24 1.29
@@ -1452,6 +1452,9 @@
#define NIC_SRAM_DATA_CFG_FIBER_WOL 0x00004000
#define NIC_SRAM_DATA_CFG_NO_GPIO2 0x00100000
+#define NIC_SRAM_DATA_VER 0x00000b5c
+#define NIC_SRAM_DATA_VER_SHIFT 16
+
#define NIC_SRAM_DATA_PHY_ID 0x00000b74
#define NIC_SRAM_DATA_PHY_ID1_MASK 0xffff0000
#define NIC_SRAM_DATA_PHY_ID2_MASK 0x0000ffff
@@ -2106,6 +2109,7 @@
#define TG3_FLG2_CAPACITIVE_COUPLING 0x00004000
#define TG3_FLG2_FLASH 0x00008000
#define TG3_FLG2_HW_TSO 0x00010000
+#define TG3_FLG2_SERDES_PREEMPHASIS 0x00020000
u32 split_mode_max_reqs;
#define SPLIT_MODE_5704_MAX_REQ 3
diff -urN linux/drivers/pci/pci-sysfs.c linux/drivers/pci/pci-sysfs.c
--- linux/drivers/pci/pci-sysfs.c 2005/01/13 14:06:17 1.11
+++ linux/drivers/pci/pci-sysfs.c 2005/02/13 20:16:25 1.12
@@ -436,6 +436,7 @@
rom_attr = kmalloc(sizeof(*rom_attr), GFP_ATOMIC);
if (rom_attr) {
+ memset(rom_attr, 0x00, sizeof(*rom_attr));
pdev->rom_attr = rom_attr;
rom_attr->size = pci_resource_len(pdev,
PCI_ROM_RESOURCE);
rom_attr->attr.name = "rom";
diff -urN linux/drivers/pci/probe.c linux/drivers/pci/probe.c
--- linux/drivers/pci/probe.c 2005/01/25 04:28:38 1.41
+++ linux/drivers/pci/probe.c 2005/02/13 20:16:25 1.42
@@ -879,7 +879,7 @@
if (pci_find_bus(pci_domain_nr(b), bus)) {
/* If we already got to this bus through a different bridge,
ignore it */
- DBG("PCI: Bus %04:%02x already known\n", pci_domain_nr(b), bus);
+ DBG("PCI: Bus %04x:%02x already known\n", pci_domain_nr(b),
bus);
goto err_out;
}
list_add_tail(&b->node, &pci_root_buses);
diff -urN linux/drivers/pci/quirks.c linux/drivers/pci/quirks.c
--- linux/drivers/pci/quirks.c 2005/01/13 14:06:17 1.59
+++ linux/drivers/pci/quirks.c 2005/02/13 20:16:25 1.60
@@ -216,6 +216,16 @@
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_2,
quirk_natoma );
/*
+ * This chip can cause PCI parity errors if config register 0xA0 is read
+ * while DMAs are occurring.
+ */
+static void __devinit quirk_citrine(struct pci_dev *dev)
+{
+ dev->cfg_size = 0xA0;
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
quirk_citrine );
+
+/*
* S3 868 and 968 chips report region size equal to 32M, but they decode 64M.
* If it's needed, re-allocate the region.
*/
diff -urN linux/drivers/pci/hotplug/rpaphp.h linux/drivers/pci/hotplug/rpaphp.h
--- linux/drivers/pci/hotplug/rpaphp.h 2004/10/25 20:44:34 1.7
+++ linux/drivers/pci/hotplug/rpaphp.h 2005/02/13 20:16:25 1.8
@@ -109,13 +109,6 @@
extern struct list_head rpaphp_slot_head;
extern int num_slots;
-static inline int is_hotplug_capable(struct device_node *dn)
-{
- unsigned char *ptr = get_property(dn, "ibm,fw-pci-hot-plug-ctrl", NULL);
-
- return (int) (ptr != NULL);
-}
-
/* function prototypes */
/* rpaphp_pci.c */
diff -urN linux/drivers/pci/hotplug/rpaphp_core.c
linux/drivers/pci/hotplug/rpaphp_core.c
--- linux/drivers/pci/hotplug/rpaphp_core.c 2004/10/25 20:44:34 1.8
+++ linux/drivers/pci/hotplug/rpaphp_core.c 2005/02/13 20:16:25 1.9
@@ -224,7 +224,7 @@
if (!indexes || !names || !types || !domains) {
/* Slot does not have dynamically-removable children */
- return 1;
+ return -EINVAL;
}
if (drc_indexes)
*drc_indexes = indexes;
@@ -260,7 +260,7 @@
}
rc = get_children_props(dn->parent, &indexes, &names, &types, &domains);
- if (rc) {
+ if (rc < 0) {
return 1;
}
@@ -287,26 +287,43 @@
return 1;
}
-static int is_php_dn(struct device_node *dn, int **indexes, int **names, int
**types,
- int **power_domains)
+static int is_php_type(char *drc_type)
+{
+ unsigned long value;
+ char *endptr;
+
+ /* PCI Hotplug nodes have an integer for drc_type */
+ value = simple_strtoul(drc_type, &endptr, 10);
+ if (endptr == drc_type)
+ return 0;
+
+ return 1;
+}
+
+static int is_php_dn(struct device_node *dn, int **indexes, int **names,
+ int **types, int **power_domains)
{
+ int *drc_types;
int rc;
- if (!is_hotplug_capable(dn))
- return (0);
- rc = get_children_props(dn, indexes, names, types, power_domains);
- if (rc)
- return (0);
- return (1);
+ rc = get_children_props(dn, indexes, names, &drc_types, power_domains);
+ if (rc >= 0) {
+ if (is_php_type((char *) &drc_types[1])) {
+ *types = drc_types;
+ return 1;
+ }
+ }
+
+ return 0;
}
-static int is_dr_dn(struct device_node *dn, int **indexes, int **names, int
**types,
- int **power_domains, int **my_drc_index)
+static int is_dr_dn(struct device_node *dn, int **indexes, int **names,
+ int **types, int **power_domains, int **my_drc_index)
{
int rc;
*my_drc_index = (int *) get_property(dn, "ibm,my-drc-index", NULL);
- if(!*my_drc_index)
+ if(!*my_drc_index)
return (0);
if (!dn->parent)
@@ -314,7 +331,7 @@
rc = get_children_props(dn->parent, indexes, names, types,
power_domains);
- return (rc == 0);
+ return (rc >= 0);
}
static inline int is_vdevice_root(struct device_node *dn)
diff -urN linux/drivers/pci/pcie/portdrv.h linux/drivers/pci/pcie/portdrv.h
--- linux/drivers/pci/pcie/portdrv.h 2005/01/25 04:28:38 1.1
+++ linux/drivers/pci/pcie/portdrv.h 2005/02/13 20:16:25 1.2
@@ -28,14 +28,13 @@
#define get_descriptor_id(type, service) (((type - 4) << 4) | service)
extern struct bus_type pcie_port_bus_type;
-extern struct device_driver pcieport_generic_driver;
extern int pcie_port_device_probe(struct pci_dev *dev);
extern int pcie_port_device_register(struct pci_dev *dev);
#ifdef CONFIG_PM
-extern int pcie_port_device_suspend(struct pcie_device *dev, u32 state);
-extern int pcie_port_device_resume(struct pcie_device *dev);
+extern int pcie_port_device_suspend(struct pci_dev *dev, u32 state);
+extern int pcie_port_device_resume(struct pci_dev *dev);
#endif
-extern void pcie_port_device_remove(struct pcie_device *dev);
+extern void pcie_port_device_remove(struct pci_dev *dev);
extern void pcie_port_bus_register(void);
extern void pcie_port_bus_unregister(void);
diff -urN linux/drivers/pci/pcie/portdrv_bus.c
linux/drivers/pci/pcie/portdrv_bus.c
--- linux/drivers/pci/pcie/portdrv_bus.c 2005/01/25 04:28:38 1.1
+++ linux/drivers/pci/pcie/portdrv_bus.c 2005/02/13 20:16:25 1.2
@@ -14,8 +14,6 @@
#include <linux/pcieport_if.h>
-static int generic_probe (struct device *dev) { return 0;}
-static int generic_remove (struct device *dev) { return 0;}
static int pcie_port_bus_match(struct device *dev, struct device_driver *drv);
static int pcie_port_bus_suspend(struct device *dev, u32 state);
static int pcie_port_bus_resume(struct device *dev);
@@ -27,23 +25,14 @@
.resume = pcie_port_bus_resume,
};
-struct device_driver pcieport_generic_driver = {
- .name = "pcieport",
- .bus = &pcie_port_bus_type,
- .probe = generic_probe,
- .remove = generic_remove,
-};
-
static int pcie_port_bus_match(struct device *dev, struct device_driver *drv)
{
struct pcie_device *pciedev;
struct pcie_port_service_driver *driver;
- if ( drv->bus != &pcie_port_bus_type ||
- dev->bus != &pcie_port_bus_type ||
- drv == &pcieport_generic_driver) {
+ if (drv->bus != &pcie_port_bus_type || dev->bus != &pcie_port_bus_type)
return 0;
- }
+
pciedev = to_pcie_device(dev);
driver = to_service_driver(drv);
if ( (driver->id_table->vendor != PCI_ANY_ID &&
diff -urN linux/drivers/pci/pcie/portdrv_core.c
linux/drivers/pci/pcie/portdrv_core.c
--- linux/drivers/pci/pcie/portdrv_core.c 2005/01/25 04:28:38 1.1
+++ linux/drivers/pci/pcie/portdrv_core.c 2005/02/13 20:16:25 1.2
@@ -17,8 +17,6 @@
extern int pcie_mch_quirk; /* MSI-quirk Indicator */
-extern struct device_driver pcieport_generic_driver;
-
static int pcie_port_probe_service(struct device *dev)
{
struct pcie_device *pciedev;
@@ -103,6 +101,7 @@
*/
static void release_pcie_device(struct device *dev)
{
+ printk(KERN_DEBUG "Free Port Service[%s]\n", dev->bus_id);
kfree(to_pcie_device(dev));
}
@@ -217,18 +216,18 @@
return services;
}
-static void pcie_device_init(struct pcie_device *parent,
- struct pcie_device *dev,
- int port_type, int service_type)
+static void pcie_device_init(struct pci_dev *parent, struct pcie_device *dev,
+ int port_type, int service_type, int irq, int irq_mode)
{
struct device *device;
- if (parent) {
- dev->id.vendor = parent->port->vendor;
- dev->id.device = parent->port->device;
- dev->id.port_type = port_type;
- dev->id.service_type = (1 << service_type);
- }
+ dev->port = parent;
+ dev->interrupt_mode = irq_mode;
+ dev->irq = irq;
+ dev->id.vendor = parent->vendor;
+ dev->id.device = parent->device;
+ dev->id.port_type = port_type;
+ dev->id.service_type = (1 << service_type);
/* Initialize generic device interface */
device = &dev->device;
@@ -240,35 +239,23 @@
device->driver = NULL;
device->driver_data = NULL;
device->release = release_pcie_device; /* callback to free pcie dev */
- sprintf(&device->bus_id[0], "%s.%02x", parent->device.bus_id,
- get_descriptor_id(port_type, service_type));
- device->parent = ((parent == NULL) ? NULL : &parent->device);
+ sprintf(&device->bus_id[0], "pcie%02x",
+ get_descriptor_id(port_type, service_type));
+ device->parent = &parent->dev;
}
-static struct pcie_device* alloc_pcie_device(
- struct pcie_device *parent, struct pci_dev *bridge,
+static struct pcie_device* alloc_pcie_device(struct pci_dev *parent,
int port_type, int service_type, int irq, int irq_mode)
{
struct pcie_device *device;
- static int NR_PORTS = 0;
device = kmalloc(sizeof(struct pcie_device), GFP_KERNEL);
if (!device)
return NULL;
memset(device, 0, sizeof(struct pcie_device));
- device->port = bridge;
- device->interrupt_mode = irq_mode;
- device->irq = irq;
- if (!parent) {
- pcie_device_init(NULL, device, port_type, service_type);
- NR_PORTS++;
- device->device.driver = &pcieport_generic_driver;
- sprintf(&device->device.bus_id[0], "port%d", NR_PORTS);
- } else {
- pcie_device_init(parent, device, port_type, service_type);
- }
- printk(KERN_DEBUG "Allocate Port Device[%s]\n", device->device.bus_id);
+ pcie_device_init(parent, device, port_type, service_type, irq,irq_mode);
+ printk(KERN_DEBUG "Allocate Port Service[%s]\n", device->device.bus_id);
return device;
}
@@ -291,7 +278,6 @@
int pcie_port_device_register(struct pci_dev *dev)
{
- struct pcie_device *parent;
int status, type, capabilities, irq_mode, i;
int vectors[PCIE_PORT_DEVICE_MAXSERVICES];
u16 reg16;
@@ -306,27 +292,13 @@
capabilities = get_port_device_capability(dev);
irq_mode = assign_interrupt_mode(dev, vectors, capabilities);
- /* Allocate parent */
- parent = alloc_pcie_device(NULL, dev, type, 0, dev->irq, irq_mode);
- if (!parent)
- return -ENOMEM;
-
- status = device_register(&parent->device);
- if (status) {
- kfree(parent);
- return status;
- }
- get_device(&parent->device);
- pci_set_drvdata(dev, parent);
-
/* Allocate child services if any */
for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
struct pcie_device *child;
if (capabilities & (1 << i)) {
child = alloc_pcie_device(
- parent, /* parent */
- dev, /* Root/Upstream/Downstream */
+ dev, /* parent */
type, /* port type */
i, /* service type */
vectors[i], /* irq */
@@ -345,17 +317,21 @@
}
#ifdef CONFIG_PM
-int pcie_port_device_suspend(struct pcie_device *dev, u32 state)
+int pcie_port_device_suspend(struct pci_dev *dev, u32 state)
{
- struct list_head *head;
+ struct list_head *head, *tmp;
struct device *parent, *child;
struct device_driver *driver;
struct pcie_port_service_driver *service_driver;
- parent = &dev->device;
+ parent = &dev->dev;
head = &parent->children;
- while (!list_empty(head)) {
- child = container_of(head->next, struct device, node);
+ tmp = head->next;
+ while (head != tmp) {
+ child = container_of(tmp, struct device, node);
+ tmp = tmp->next;
+ if (child->bus != &pcie_port_bus_type)
+ continue;
driver = child->driver;
if (!driver)
continue;
@@ -366,17 +342,21 @@
return 0;
}
-int pcie_port_device_resume(struct pcie_device *dev)
+int pcie_port_device_resume(struct pci_dev *dev)
{
- struct list_head *head;
+ struct list_head *head, *tmp;
struct device *parent, *child;
struct device_driver *driver;
struct pcie_port_service_driver *service_driver;
- parent = &dev->device;
+ parent = &dev->dev;
head = &parent->children;
- while (!list_empty(head)) {
- child = container_of(head->next, struct device, node);
+ tmp = head->next;
+ while (head != tmp) {
+ child = container_of(tmp, struct device, node);
+ tmp = tmp->next;
+ if (child->bus != &pcie_port_bus_type)
+ continue;
driver = child->driver;
if (!driver)
continue;
@@ -389,45 +369,46 @@
}
#endif
-void pcie_port_device_remove(struct pcie_device *dev)
+void pcie_port_device_remove(struct pci_dev *dev)
{
- struct list_head *head;
+ struct list_head *head, *tmp;
struct device *parent, *child;
struct device_driver *driver;
struct pcie_port_service_driver *service_driver;
+ int interrupt_mode = PCIE_PORT_INTx_MODE;
- parent = &dev->device;
+ parent = &dev->dev;
head = &parent->children;
- while (!list_empty(head)) {
- child = container_of(head->next, struct device, node);
+ tmp = head->next;
+ while (head != tmp) {
+ child = container_of(tmp, struct device, node);
+ tmp = tmp->next;
+ if (child->bus != &pcie_port_bus_type)
+ continue;
driver = child->driver;
if (driver) {
service_driver = to_service_driver(driver);
if (service_driver->remove)
service_driver->remove(to_pcie_device(child));
}
+ interrupt_mode = (to_pcie_device(child))->interrupt_mode;
put_device(child);
device_unregister(child);
}
-
/* Switch to INTx by default if MSI enabled */
- if (dev->interrupt_mode == PCIE_PORT_MSIX_MODE)
- pci_disable_msix(dev->port);
- else if (dev->interrupt_mode == PCIE_PORT_MSI_MODE)
- pci_disable_msi(dev->port);
- put_device(parent);
- device_unregister(parent);
+ if (interrupt_mode == PCIE_PORT_MSIX_MODE)
+ pci_disable_msix(dev);
+ else if (interrupt_mode == PCIE_PORT_MSI_MODE)
+ pci_disable_msi(dev);
}
void pcie_port_bus_register(void)
{
bus_register(&pcie_port_bus_type);
- driver_register(&pcieport_generic_driver);
}
void pcie_port_bus_unregister(void)
{
- driver_unregister(&pcieport_generic_driver);
bus_unregister(&pcie_port_bus_type);
}
diff -urN linux/drivers/pci/pcie/portdrv_pci.c
linux/drivers/pci/pcie/portdrv_pci.c
--- linux/drivers/pci/pcie/portdrv_pci.c 2005/01/25 04:28:38 1.1
+++ linux/drivers/pci/pcie/portdrv_pci.c 2005/02/13 20:16:25 1.2
@@ -63,34 +63,18 @@
static void pcie_portdrv_remove (struct pci_dev *dev)
{
- struct pcie_device *pciedev;
-
- pciedev = (struct pcie_device *)pci_get_drvdata(dev);
- if (pciedev) {
- pcie_port_device_remove(pciedev);
- pci_set_drvdata(dev, NULL);
- }
+ pcie_port_device_remove(dev);
}
#ifdef CONFIG_PM
static int pcie_portdrv_suspend (struct pci_dev *dev, u32 state)
{
- struct pcie_device *pciedev;
-
- pciedev = (struct pcie_device *)pci_get_drvdata(dev);
- if (pciedev)
- pcie_port_device_suspend(pciedev, state);
- return 0;
+ return pcie_port_device_suspend(dev, state);
}
static int pcie_portdrv_resume (struct pci_dev *dev)
{
- struct pcie_device *pciedev;
-
- pciedev = (struct pcie_device *)pci_get_drvdata(dev);
- if (pciedev)
- pcie_port_device_resume(pciedev);
- return 0;
+ return pcie_port_device_resume(dev);
}
#endif
diff -urN linux/drivers/pcmcia/ds.c linux/drivers/pcmcia/ds.c
--- linux/drivers/pcmcia/ds.c 2005/01/13 14:06:18 1.41
+++ linux/drivers/pcmcia/ds.c 2005/02/13 20:16:25 1.42
@@ -660,7 +660,7 @@
p_dev = pcmcia_get_dev(p_dev);
if (!p_dev)
continue;
- if ((!p_dev->client.state & CLIENT_UNBOUND) ||
+ if (!(p_dev->client.state & CLIENT_UNBOUND) ||
(!p_dev->dev.driver)) {
pcmcia_put_dev(p_dev);
continue;
diff -urN linux/drivers/pcmcia/i82365.c linux/drivers/pcmcia/i82365.c
--- linux/drivers/pcmcia/i82365.c 2005/02/07 02:54:51 1.56
+++ linux/drivers/pcmcia/i82365.c 2005/02/13 20:16:25 1.57
@@ -208,6 +208,7 @@
#define IS_UNKNOWN 0x0400
#define IS_VG_PWR 0x0800
#define IS_DF_PWR 0x1000
+#define IS_REGISTERED 0x2000
#define IS_ALIVE 0x8000
typedef struct pcic_t {
@@ -1403,12 +1404,10 @@
socket[i].socket.resource_ops = &pccard_nonstatic_ops;
socket[i].socket.owner = THIS_MODULE;
socket[i].number = i;
- ret = pcmcia_register_socket(&socket[i].socket);
- if (ret && i--) {
- for (; i>= 0; i--)
- pcmcia_unregister_socket(&socket[i].socket);
- break;
- }
+ ret = pcmcia_register_socket(&socket[i].socket);
+ if (!ret)
+ socket[i].flags |= IS_REGISTERED;
+
#if 0 /* driver model ordering issue */
class_device_create_file(&socket[i].socket.dev,
&class_device_attr_info);
@@ -1435,7 +1434,8 @@
int i;
for (i = 0; i < sockets; i++) {
- pcmcia_unregister_socket(&socket[i].socket);
+ if (socket[i].flags & IS_REGISTERED)
+ pcmcia_unregister_socket(&socket[i].socket);
}
platform_device_unregister(&i82365_device);
if (poll_interval != 0)
diff -urN linux/drivers/pcmcia/m32r_cfc.c linux/drivers/pcmcia/m32r_cfc.c
--- linux/drivers/pcmcia/m32r_cfc.c 2005/02/07 02:54:51 1.4
+++ linux/drivers/pcmcia/m32r_cfc.c 2005/02/13 20:16:25 1.5
@@ -239,6 +239,7 @@
/*====================================================================*/
+#define IS_REGISTERED 0x2000
#define IS_ALIVE 0x8000
typedef struct pcc_t {
@@ -835,11 +836,9 @@
socket[i].socket.owner = THIS_MODULE;
socket[i].number = i;
ret = pcmcia_register_socket(&socket[i].socket);
- if (ret && i--) {
- for (; i>= 0; i--)
- pcmcia_unregister_socket(&socket[i].socket);
- break;
- }
+ if (!ret)
+ socket[i].flags |= IS_REGISTERED;
+
#if 0 /* driver model ordering issue */
class_device_create_file(&socket[i].socket.dev,
&class_device_attr_info);
@@ -865,7 +864,8 @@
int i;
for (i = 0; i < pcc_sockets; i++)
- pcmcia_unregister_socket(&socket[i].socket);
+ if (socket[i].flags & IS_REGISTERED)
+ pcmcia_unregister_socket(&socket[i].socket);
platform_device_unregister(&pcc_device);
if (poll_interval != 0)
diff -urN linux/drivers/pcmcia/m32r_pcc.c linux/drivers/pcmcia/m32r_pcc.c
--- linux/drivers/pcmcia/m32r_pcc.c 2005/02/07 02:54:51 1.4
+++ linux/drivers/pcmcia/m32r_pcc.c 2005/02/13 20:16:25 1.5
@@ -257,6 +257,7 @@
/*====================================================================*/
+#define IS_REGISTERED 0x2000
#define IS_ALIVE 0x8000
typedef struct pcc_t {
@@ -772,11 +773,9 @@
socket[i].socket.owner = THIS_MODULE;
socket[i].number = i;
ret = pcmcia_register_socket(&socket[i].socket);
- if (ret && i--) {
- for (; i>= 0; i--)
- pcmcia_unregister_socket(&socket[i].socket);
- break;
- }
+ if (!ret)
+ socket[i].flags |= IS_REGISTERED;
+
#if 0 /* driver model ordering issue */
class_device_create_file(&socket[i].socket.dev,
&class_device_attr_info);
@@ -802,7 +801,8 @@
int i;
for (i = 0; i < pcc_sockets; i++)
- pcmcia_unregister_socket(&socket[i].socket);
+ if (socket[i].flags & IS_REGISTERED)
+ pcmcia_unregister_socket(&socket[i].socket);
platform_device_unregister(&pcc_device);
if (poll_interval != 0)
diff -urN linux/drivers/pnp/pnpbios/core.c linux/drivers/pnp/pnpbios/core.c
--- linux/drivers/pnp/pnpbios/core.c 2005/02/07 02:54:51 1.25
+++ linux/drivers/pnp/pnpbios/core.c 2005/02/13 20:16:25 1.26
@@ -61,6 +61,7 @@
#include <linux/spinlock.h>
#include <linux/dmi.h>
#include <linux/delay.h>
+#include <linux/acpi.h>
#include <asm/page.h>
#include <asm/desc.h>
@@ -539,7 +540,6 @@
}
#ifdef CONFIG_PNPACPI
- extern int pnpacpi_disabled;
if (!acpi_disabled && !pnpacpi_disabled) {
pnpbios_disabled = 1;
printk(KERN_INFO "PnPBIOS: Disabled by ACPI PNP\n");
diff -urN linux/drivers/s390/block/dasd.c linux/drivers/s390/block/dasd.c
--- linux/drivers/s390/block/dasd.c 2005/01/25 04:28:40 1.54
+++ linux/drivers/s390/block/dasd.c 2005/02/13 20:16:25 1.55
@@ -7,7 +7,7 @@
* Bugreports.to..: <Linux390@de.ibm.com>
* (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999-2001
*
- * $Revision: 1.154 $
+ * $Revision: 1.156 $
*/
#include <linux/config.h>
@@ -179,7 +179,7 @@
device->debug_area = debug_register(device->cdev->dev.bus_id, 0, 2,
8 * sizeof (long));
debug_register_view(device->debug_area, &debug_sprintf_view);
- debug_set_level(device->debug_area, DBF_DEBUG);
+ debug_set_level(device->debug_area, DBF_EMERG);
DBF_DEV_EVENT(DBF_EMERG, device, "%s", "debug area created");
device->state = DASD_STATE_BASIC;
@@ -745,8 +745,9 @@
switch (rc) {
case 0:
cqr->status = DASD_CQR_IN_IO;
- DBF_DEV_EVENT(DBF_DEBUG, device, "%s",
- "start_IO: request %p started successful");
+ DBF_DEV_EVENT(DBF_DEBUG, device,
+ "start_IO: request %p started successful",
+ cqr);
break;
case -EBUSY:
DBF_DEV_EVENT(DBF_ERR, device, "%s",
@@ -1579,25 +1580,26 @@
}
/*
- * Allocate and initialize request queue.
+ * Allocate and initialize request queue and default I/O scheduler.
*/
static int
dasd_alloc_queue(struct dasd_device * device)
{
+ int rc;
+
device->request_queue = blk_init_queue(do_dasd_request,
&device->request_queue_lock);
if (device->request_queue == NULL)
return -ENOMEM;
device->request_queue->queuedata = device;
-#if 0
+
elevator_exit(device->request_queue->elevator);
- rc = elevator_init(device->request_queue, "noop");
+ rc = elevator_init(device->request_queue, "deadline");
if (rc) {
blk_cleanup_queue(device->request_queue);
return rc;
}
-#endif
return 0;
}
@@ -1963,7 +1965,7 @@
goto failed;
}
debug_register_view(dasd_debug_area, &debug_sprintf_view);
- debug_set_level(dasd_debug_area, DBF_DEBUG);
+ debug_set_level(dasd_debug_area, DBF_EMERG);
DBF_EVENT(DBF_EMERG, "%s", "debug area created");
diff -urN linux/drivers/s390/cio/cio.c linux/drivers/s390/cio/cio.c
--- linux/drivers/s390/cio/cio.c 2005/01/13 14:06:19 1.19
+++ linux/drivers/s390/cio/cio.c 2005/02/13 20:16:25 1.20
@@ -175,9 +175,10 @@
}
int
-cio_start (struct subchannel *sch, /* subchannel structure */
- struct ccw1 * cpa, /* logical channel prog addr */
- __u8 lpm) /* logical path mask */
+cio_start_key (struct subchannel *sch, /* subchannel structure */
+ struct ccw1 * cpa, /* logical channel prog addr */
+ __u8 lpm, /* logical path mask */
+ __u8 key) /* storage key */
{
char dbf_txt[15];
int ccode;
@@ -200,12 +201,12 @@
sch->orb.c64 = 1;
sch->orb.i2k = 0;
#endif
+ sch->orb.key = key >> 4;
+ /* issue "Start Subchannel" */
sch->orb.cpa = (__u32) __pa (cpa);
-
- /*
- * Issue "Start subchannel" and process condition code
- */
ccode = ssch (sch->irq, &sch->orb);
+
+ /* process condition code */
sprintf (dbf_txt, "ccode:%d", ccode);
CIO_TRACE_EVENT (4, dbf_txt);
@@ -224,6 +225,12 @@
}
}
+int
+cio_start (struct subchannel *sch, struct ccw1 *cpa, __u8 lpm)
+{
+ return cio_start_key(sch, cpa, lpm, default_storage_key);
+}
+
/*
* resume suspended I/O operation
*/
diff -urN linux/drivers/s390/cio/cio.h linux/drivers/s390/cio/cio.h
--- linux/drivers/s390/cio/cio.h 2004/08/13 07:18:54 1.7
+++ linux/drivers/s390/cio/cio.h 2005/02/13 20:16:25 1.8
@@ -122,6 +122,7 @@
extern int cio_resume (struct subchannel *);
extern int cio_halt (struct subchannel *);
extern int cio_start (struct subchannel *, struct ccw1 *, __u8);
+extern int cio_start_key (struct subchannel *, struct ccw1 *, __u8, __u8);
extern int cio_cancel (struct subchannel *);
extern int cio_set_options (struct subchannel *, int);
extern int cio_get_options (struct subchannel *);
diff -urN linux/drivers/s390/cio/device_ops.c
linux/drivers/s390/cio/device_ops.c
--- linux/drivers/s390/cio/device_ops.c 2004/08/13 07:18:54 1.13
+++ linux/drivers/s390/cio/device_ops.c 2005/02/13 20:16:25 1.14
@@ -1,7 +1,7 @@
/*
* drivers/s390/cio/device_ops.c
*
- * $Revision: 1.50 $
+ * $Revision: 1.53 $
*
* Copyright (C) 2002 IBM Deutschland Entwicklung GmbH,
* IBM Corporation
@@ -54,6 +54,7 @@
if (cdev->private->state == DEV_STATE_NOT_OPER)
return -ENODEV;
if (cdev->private->state != DEV_STATE_ONLINE &&
+ cdev->private->state != DEV_STATE_WAIT4IO &&
cdev->private->state != DEV_STATE_W4SENSE)
return -EINVAL;
sch = to_subchannel(cdev->dev.parent);
@@ -66,8 +67,9 @@
}
int
-ccw_device_start(struct ccw_device *cdev, struct ccw1 *cpa,
- unsigned long intparm, __u8 lpm, unsigned long flags)
+ccw_device_start_key(struct ccw_device *cdev, struct ccw1 *cpa,
+ unsigned long intparm, __u8 lpm, __u8 key,
+ unsigned long flags)
{
struct subchannel *sch;
int ret;
@@ -87,29 +89,49 @@
ret = cio_set_options (sch, flags);
if (ret)
return ret;
- ret = cio_start (sch, cpa, lpm);
+ ret = cio_start_key (sch, cpa, lpm, key);
if (ret == 0)
cdev->private->intparm = intparm;
return ret;
}
+
int
-ccw_device_start_timeout(struct ccw_device *cdev, struct ccw1 *cpa,
- unsigned long intparm, __u8 lpm, unsigned long flags,
- int expires)
+ccw_device_start_timeout_key(struct ccw_device *cdev, struct ccw1 *cpa,
+ unsigned long intparm, __u8 lpm, __u8 key,
+ unsigned long flags, int expires)
{
int ret;
if (!cdev)
return -ENODEV;
ccw_device_set_timeout(cdev, expires);
- ret = ccw_device_start(cdev, cpa, intparm, lpm, flags);
+ ret = ccw_device_start_key(cdev, cpa, intparm, lpm, key, flags);
if (ret != 0)
ccw_device_set_timeout(cdev, 0);
return ret;
}
int
+ccw_device_start(struct ccw_device *cdev, struct ccw1 *cpa,
+ unsigned long intparm, __u8 lpm, unsigned long flags)
+{
+ return ccw_device_start_key(cdev, cpa, intparm, lpm,
+ default_storage_key, flags);
+}
+
+int
+ccw_device_start_timeout(struct ccw_device *cdev, struct ccw1 *cpa,
+ unsigned long intparm, __u8 lpm, unsigned long flags,
+ int expires)
+{
+ return ccw_device_start_timeout_key(cdev, cpa, intparm, lpm,
+ default_storage_key, flags,
+ expires);
+}
+
+
+int
ccw_device_halt(struct ccw_device *cdev, unsigned long intparm)
{
struct subchannel *sch;
@@ -120,6 +142,7 @@
if (cdev->private->state == DEV_STATE_NOT_OPER)
return -ENODEV;
if (cdev->private->state != DEV_STATE_ONLINE &&
+ cdev->private->state != DEV_STATE_WAIT4IO &&
cdev->private->state != DEV_STATE_W4SENSE)
return -EINVAL;
sch = to_subchannel(cdev->dev.parent);
@@ -539,6 +562,8 @@
EXPORT_SYMBOL(ccw_device_resume);
EXPORT_SYMBOL(ccw_device_start_timeout);
EXPORT_SYMBOL(ccw_device_start);
+EXPORT_SYMBOL(ccw_device_start_timeout_key);
+EXPORT_SYMBOL(ccw_device_start_key);
EXPORT_SYMBOL(ccw_device_get_ciw);
EXPORT_SYMBOL(ccw_device_get_path_mask);
EXPORT_SYMBOL(read_conf_data);
diff -urN linux/drivers/s390/net/qeth.h linux/drivers/s390/net/qeth.h
--- linux/drivers/s390/net/qeth.h 2005/01/13 14:06:19 1.18
+++ linux/drivers/s390/net/qeth.h 2005/02/13 20:16:25 1.19
@@ -24,7 +24,7 @@
#include "qeth_mpc.h"
-#define VERSION_QETH_H "$Revision: 1.129 $"
+#define VERSION_QETH_H "$Revision: 1.132 $"
#ifdef CONFIG_QETH_IPV6
#define QETH_VERSION_IPV6 ":IPv6"
@@ -754,6 +754,8 @@
struct qeth_perf_stats perf_stats;
#endif /* CONFIG_QETH_PERF_STATS */
int use_hard_stop;
+ int (*orig_hard_header)(struct sk_buff *,struct net_device *,
+ unsigned short,void *,void *,unsigned);
};
struct qeth_card_list_struct {
@@ -828,6 +830,17 @@
#endif
}
}
+static inline struct sk_buff *
+qeth_pskb_unshare(struct sk_buff *skb, int pri)
+{
+ struct sk_buff *nskb;
+ if (!skb_cloned(skb))
+ return skb;
+ nskb = skb_copy(skb, pri);
+ kfree_skb(skb); /* free our shared copy */
+ return nskb;
+}
+
inline static int
qeth_get_initial_mtu_for_card(struct qeth_card * card)
@@ -1071,8 +1084,4 @@
extern int
qeth_realloc_buffer_pool(struct qeth_card *, int);
-extern int
-qeth_fake_header(struct sk_buff *skb, struct net_device *dev,
- unsigned short type, void *daddr, void *saddr,
- unsigned len);
#endif /* __QETH_H__ */
diff -urN linux/drivers/s390/net/qeth_main.c linux/drivers/s390/net/qeth_main.c
--- linux/drivers/s390/net/qeth_main.c 2005/01/25 04:28:41 1.18
+++ linux/drivers/s390/net/qeth_main.c 2005/02/13 20:16:25 1.19
@@ -1,6 +1,6 @@
/*
*
- * linux/drivers/s390/net/qeth_main.c ($Revision: 1.181 $)
+ * linux/drivers/s390/net/qeth_main.c ($Revision: 1.191 $)
*
* Linux on zSeries OSA Express and HiperSockets support
*
@@ -12,7 +12,7 @@
* Frank Pavlic (pavlic@de.ibm.com) and
* Thomas Spatzier <tspat@de.ibm.com>
*
- * $Revision: 1.181 $ $Date: 2004/12/27 07:36:40 $
+ * $Revision: 1.191 $ $Date: 2005/01/31 13:13:57 $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -41,16 +41,9 @@
#include <linux/config.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
-
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/mm.h>
-
-#include <asm/io.h>
-#include <asm/ebcdic.h>
-#include <linux/ctype.h>
-#include <asm/semaphore.h>
-#include <asm/timex.h>
#include <linux/ip.h>
#include <linux/inetdevice.h>
#include <linux/netdevice.h>
@@ -62,23 +55,29 @@
#include <linux/tcp.h>
#include <linux/icmp.h>
#include <linux/skbuff.h>
-#include <net/route.h>
-#include <net/arp.h>
#include <linux/in.h>
#include <linux/igmp.h>
-#include <net/ip.h>
-#include <asm/uaccess.h>
#include <linux/init.h>
#include <linux/reboot.h>
-#include <asm/qeth.h>
#include <linux/mii.h>
#include <linux/rcupdate.h>
+#include <net/arp.h>
+#include <net/ip.h>
+#include <net/route.h>
+
+#include <asm/ebcdic.h>
+#include <asm/io.h>
+#include <asm/qeth.h>
+#include <asm/timex.h>
+#include <asm/semaphore.h>
+#include <asm/uaccess.h>
+
#include "qeth.h"
#include "qeth_mpc.h"
#include "qeth_fs.h"
-#define VERSION_QETH_C "$Revision: 1.181 $"
+#define VERSION_QETH_C "$Revision: 1.191 $"
static const char *version = "qeth S/390 OSA-Express driver";
/**
@@ -514,6 +513,7 @@
qeth_set_offline(struct ccwgroup_device *cgdev)
{
struct qeth_card *card = (struct qeth_card *) cgdev->dev.driver_data;
+ int rc = 0;
enum qeth_card_states recover_flag;
QETH_DBF_TEXT(setup, 3, "setoffl");
@@ -525,15 +525,21 @@
CARD_BUS_ID(card));
return -ERESTARTSYS;
}
- ccw_device_set_offline(CARD_DDEV(card));
- ccw_device_set_offline(CARD_WDEV(card));
- ccw_device_set_offline(CARD_RDEV(card));
+ if ((rc = ccw_device_set_offline(CARD_DDEV(card))) ||
+ (rc = ccw_device_set_offline(CARD_WDEV(card))) ||
+ (rc = ccw_device_set_offline(CARD_RDEV(card)))) {
+ QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
+ }
if (recover_flag == CARD_STATE_UP)
card->state = CARD_STATE_RECOVER;
qeth_notify_processes();
return 0;
}
+static int
+qeth_wait_for_threads(struct qeth_card *card, unsigned long threads);
+
+
static void
qeth_remove_device(struct ccwgroup_device *cgdev)
{
@@ -546,6 +552,9 @@
if (!card)
return;
+ if (qeth_wait_for_threads(card, 0xffffffff))
+ return;
+
if (cgdev->state == CCWGROUP_ONLINE){
card->use_hard_stop = 1;
qeth_set_offline(cgdev);
@@ -621,7 +630,7 @@
if (todo->users > 0){
/* for VIPA and RXIP limit refcount to 1 */
if (todo->type != QETH_IP_TYPE_NORMAL)
- addr->users = 1;
+ todo->users = 1;
return 1;
} else
return 0;
@@ -2262,8 +2271,8 @@
skb->ip_summed = CHECKSUM_NONE;
#ifdef CONFIG_QETH_VLAN
if (hdr->hdr.l2.flags[2] & (QETH_LAYER2_FLAG_VLAN)) {
- skb_pull(skb, VLAN_HLEN);
vlan_id = hdr->hdr.l2.vlan_id;
+ skb_pull(skb, VLAN_HLEN);
}
#endif
skb->protocol = qeth_type_trans(skb, skb->dev);
@@ -3262,13 +3271,15 @@
QETH_DBF_TEXT(trace,3,"qdioclr");
if (card->qdio.state == QETH_QDIO_ESTABLISHED){
- qdio_cleanup(CARD_DDEV(card),
+ if ((rc = qdio_cleanup(CARD_DDEV(card),
(card->info.type == QETH_CARD_TYPE_IQD) ?
QDIO_FLAG_CLEANUP_USING_HALT :
- QDIO_FLAG_CLEANUP_USING_CLEAR);
+ QDIO_FLAG_CLEANUP_USING_CLEAR)))
+ QETH_DBF_TEXT_(trace, 3, "1err%d", rc);
card->qdio.state = QETH_QDIO_ALLOCATED;
}
- rc = qeth_clear_halt_card(card, use_halt);
+ if ((rc = qeth_clear_halt_card(card, use_halt)))
+ QETH_DBF_TEXT_(trace, 3, "2err%d", rc);
card->state = CARD_STATE_DOWN;
return rc;
}
@@ -3370,6 +3381,26 @@
return dev;
}
+/*hard_header fake function; used in case fake_ll is set */
+static int
+qeth_fake_header(struct sk_buff *skb, struct net_device *dev,
+ unsigned short type, void *daddr, void *saddr,
+ unsigned len)
+{
+ struct ethhdr *hdr;
+ struct qeth_card *card;
+
+ card = (struct qeth_card *)dev->priv;
+ hdr = (struct ethhdr *)skb_push(skb, QETH_FAKE_LL_LEN);
+ memcpy(hdr->h_source, card->dev->dev_addr, ETH_ALEN);
+ memcpy(hdr->h_dest, "FAKELL", ETH_ALEN);
+ if (type != ETH_P_802_3)
+ hdr->h_proto = htons(type);
+ else
+ hdr->h_proto = htons(len);
+ return QETH_FAKE_LL_LEN;
+}
+
static inline int
qeth_send_packet(struct qeth_card *, struct sk_buff *);
@@ -3399,6 +3430,14 @@
card->perf_stats.outbound_cnt++;
card->perf_stats.outbound_start_time = qeth_get_micros();
#endif
+ if (dev->hard_header == qeth_fake_header) {
+ if ((skb = qeth_pskb_unshare(skb, GFP_ATOMIC)) == NULL) {
+ card->stats.tx_dropped++;
+ dev_kfree_skb_irq(skb);
+ return 0;
+ }
+ skb_pull(skb, QETH_FAKE_LL_LEN);
+ }
/*
* We only call netif_stop_queue in case of errors. Since we've
* got our own synchronization on queues we can keep the stack's
@@ -5219,7 +5258,10 @@
static int
qeth_layer2_send_setdelmac(struct qeth_card *card, __u8 *mac,
- enum qeth_ipa_cmds ipacmd)
+ enum qeth_ipa_cmds ipacmd,
+ int (*reply_cb) (struct qeth_card *,
+ struct qeth_reply*,
+ unsigned long))
{
struct qeth_ipa_cmd *cmd;
struct qeth_cmd_buffer *iob;
@@ -5229,9 +5271,139 @@
cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
cmd->data.setdelmac.mac_length = OSA_ADDR_LEN;
memcpy(&cmd->data.setdelmac.mac, mac, OSA_ADDR_LEN);
- return qeth_send_ipa_cmd(card, iob, NULL, NULL);
+ return qeth_send_ipa_cmd(card, iob, reply_cb, NULL);
+}
+
+static int
+qeth_layer2_send_setgroupmac_cb(struct qeth_card *card,
+ struct qeth_reply *reply,
+ unsigned long data)
+{
+ struct qeth_ipa_cmd *cmd;
+ __u8 *mac;
+
+ QETH_DBF_TEXT(trace, 2, "L2Sgmacb");
+ cmd = (struct qeth_ipa_cmd *) data;
+ mac = &cmd->data.setdelmac.mac[0];
+ /* MAC already registered, needed in couple/uncouple case */
+ if (cmd->hdr.return_code == 0x2005) {
+ PRINT_WARN("Group MAC %02x:%02x:%02x:%02x:%02x:%02x " \
+ "already existing on %s \n",
+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
+ QETH_CARD_IFNAME(card));
+ cmd->hdr.return_code = 0;
+ }
+ if (cmd->hdr.return_code)
+ PRINT_ERR("Could not set group MAC " \
+ "%02x:%02x:%02x:%02x:%02x:%02x on %s: %x\n",
+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
+ QETH_CARD_IFNAME(card),cmd->hdr.return_code);
+ return 0;
+}
+
+static int
+qeth_layer2_send_setgroupmac(struct qeth_card *card, __u8 *mac)
+{
+ QETH_DBF_TEXT(trace, 2, "L2Sgmac");
+ return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_SETGMAC,
+ qeth_layer2_send_setgroupmac_cb);
+}
+
+static int
+qeth_layer2_send_delgroupmac_cb(struct qeth_card *card,
+ struct qeth_reply *reply,
+ unsigned long data)
+{
+ struct qeth_ipa_cmd *cmd;
+ __u8 *mac;
+
+ QETH_DBF_TEXT(trace, 2, "L2Dgmacb");
+ cmd = (struct qeth_ipa_cmd *) data;
+ mac = &cmd->data.setdelmac.mac[0];
+ if (cmd->hdr.return_code)
+ PRINT_ERR("Could not delete group MAC " \
+ "%02x:%02x:%02x:%02x:%02x:%02x on %s: %x\n",
+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
+ QETH_CARD_IFNAME(card), cmd->hdr.return_code);
+ return 0;
+}
+
+static int
+qeth_layer2_send_delgroupmac(struct qeth_card *card, __u8 *mac)
+{
+ QETH_DBF_TEXT(trace, 2, "L2Dgmac");
+ return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_DELGMAC,
+ qeth_layer2_send_delgroupmac_cb);
+}
+
+static int
+qeth_layer2_send_setmac_cb(struct qeth_card *card,
+ struct qeth_reply *reply,
+ unsigned long data)
+{
+ struct qeth_ipa_cmd *cmd;
+
+ QETH_DBF_TEXT(trace, 2, "L2Smaccb");
+ cmd = (struct qeth_ipa_cmd *) data;
+ if (cmd->hdr.return_code) {
+ QETH_DBF_TEXT_(trace, 2, "L2er%x", cmd->hdr.return_code);
+ PRINT_WARN("Error in registering MAC address on " \
+ "device %s: x%x\n", CARD_BUS_ID(card),
+ cmd->hdr.return_code);
+ card->info.layer2_mac_registered = 0;
+ cmd->hdr.return_code = -EIO;
+ } else {
+ card->info.layer2_mac_registered = 1;
+ memcpy(card->dev->dev_addr,cmd->data.setdelmac.mac,
+ OSA_ADDR_LEN);
+ PRINT_INFO("MAC address %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x "
+ "successfully registered on device %s\n",
+ card->dev->dev_addr[0], card->dev->dev_addr[1],
+ card->dev->dev_addr[2], card->dev->dev_addr[3],
+ card->dev->dev_addr[4], card->dev->dev_addr[5],
+ card->dev->name);
+ }
+ return 0;
+}
+
+static int
+qeth_layer2_send_setmac(struct qeth_card *card, __u8 *mac)
+{
+ QETH_DBF_TEXT(trace, 2, "L2Setmac");
+ return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_SETVMAC,
+ qeth_layer2_send_setmac_cb);
}
+static int
+qeth_layer2_send_delmac_cb(struct qeth_card *card,
+ struct qeth_reply *reply,
+ unsigned long data)
+{
+ struct qeth_ipa_cmd *cmd;
+
+ QETH_DBF_TEXT(trace, 2, "L2Dmaccb");
+ cmd = (struct qeth_ipa_cmd *) data;
+ if (cmd->hdr.return_code) {
+ PRINT_WARN("Error in deregistering MAC address on " \
+ "device %s: x%x\n", CARD_BUS_ID(card),
+ cmd->hdr.return_code);
+ QETH_DBF_TEXT_(trace, 2, "err%d", cmd->hdr.return_code);
+ cmd->hdr.return_code = -EIO;
+ return 0;
+ }
+ card->info.layer2_mac_registered = 0;
+
+ return 0;
+}
+static int
+qeth_layer2_send_delmac(struct qeth_card *card, __u8 *mac)
+{
+ QETH_DBF_TEXT(trace, 2, "L2Delmac");
+ if (!card->info.layer2_mac_registered)
+ return 0;
+ return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_DELVMAC,
+ qeth_layer2_send_delmac_cb);
+}
static int
qeth_layer2_set_mac_address(struct net_device *dev, void *p)
@@ -5256,32 +5428,9 @@
}
QETH_DBF_TEXT_(trace, 3, "%s", CARD_BUS_ID(card));
QETH_DBF_HEX(trace, 3, addr->sa_data, OSA_ADDR_LEN);
- if (card->info.layer2_mac_registered)
- rc = qeth_layer2_send_setdelmac(card, &card->dev->dev_addr[0],
- IPA_CMD_DELVMAC);
- if (rc) {
- PRINT_WARN("Error in deregistering MAC address on " \
- "device %s: x%x\n", CARD_BUS_ID(card), rc);
- QETH_DBF_TEXT_(trace, 2, "err%d", rc);
- return -EIO;
- }
- card->info.layer2_mac_registered = 0;
-
- rc = qeth_layer2_send_setdelmac(card, addr->sa_data, IPA_CMD_SETVMAC);
- if (rc) {
- PRINT_WARN("Error in registering MAC address on " \
- "device %s: x%x\n", CARD_BUS_ID(card), rc);
- QETH_DBF_TEXT_(trace, 2, "2err%d", rc);
- return -EIO;
- }
- card->info.layer2_mac_registered = 1;
- memcpy(dev->dev_addr, addr->sa_data, OSA_ADDR_LEN);
- PRINT_INFO("MAC address %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x "
- "successfully registered on device %s\n",
- dev->dev_addr[0],dev->dev_addr[1],dev->dev_addr[2],
- dev->dev_addr[3],dev->dev_addr[4],dev->dev_addr[5],
- dev->name);
-
+ rc = qeth_layer2_send_delmac(card, &card->dev->dev_addr[0]);
+ if (!rc)
+ rc = qeth_layer2_send_setmac(card, addr->sa_data);
return rc;
}
@@ -5392,45 +5541,22 @@
qeth_layer2_register_addr_entry(struct qeth_card *card,
struct qeth_ipaddr *addr)
{
- int rc = 0;
-
if (!addr->is_multicast)
return 0;
-
QETH_DBF_TEXT(trace, 2, "setgmac");
QETH_DBF_HEX(trace,3,&addr->mac[0],OSA_ADDR_LEN);
- rc = qeth_layer2_send_setdelmac(card, &addr->mac[0],
- IPA_CMD_SETGMAC);
- if (rc)
- PRINT_ERR("Could not set group MAC " \
- "%02x:%02x:%02x:%02x:%02x:%02x on %s: %x\n",
- addr->mac[0],addr->mac[1],addr->mac[2],
- addr->mac[3],addr->mac[4],addr->mac[5],
- QETH_CARD_IFNAME(card),rc);
- return rc;
+ return qeth_layer2_send_setgroupmac(card, &addr->mac[0]);
}
static int
qeth_layer2_deregister_addr_entry(struct qeth_card *card,
struct qeth_ipaddr *addr)
{
- int rc = 0;
-
if (!addr->is_multicast)
return 0;
-
QETH_DBF_TEXT(trace, 2, "delgmac");
QETH_DBF_HEX(trace,3,&addr->mac[0],OSA_ADDR_LEN);
- rc = qeth_layer2_send_setdelmac(card, &addr->mac[0],
- IPA_CMD_DELGMAC);
- if (rc)
- PRINT_ERR("Could not delete group MAC " \
- "%02x:%02x:%02x:%02x:%02x:%02x on %s: %x\n",
- addr->mac[0],addr->mac[1],addr->mac[2],
- addr->mac[3],addr->mac[4],addr->mac[5],
- QETH_CARD_IFNAME(card),rc);
- return rc;
-
+ return qeth_layer2_send_delgroupmac(card, &addr->mac[0]);
}
static int
@@ -5526,14 +5652,6 @@
return qeth_layer3_deregister_addr_entry(card, addr);
}
-int
-qeth_fake_header(struct sk_buff *skb, struct net_device *dev,
- unsigned short type, void *daddr, void *saddr,
- unsigned len)
-{
- return QETH_FAKE_LL_LEN;
-}
-
static int
qeth_netdev_init(struct net_device *dev)
{
@@ -5558,9 +5676,12 @@
dev->vlan_rx_kill_vid = qeth_vlan_rx_kill_vid;
dev->vlan_rx_add_vid = qeth_vlan_rx_add_vid;
#endif
+ dev->hard_header = card->orig_hard_header;
if (qeth_get_netdev_flags(card) & IFF_NOARP) {
dev->rebuild_header = NULL;
dev->hard_header = NULL;
+ if (card->options.fake_ll)
+ dev->hard_header = qeth_fake_header;
dev->header_cache_update = NULL;
dev->hard_header_cache = NULL;
}
@@ -5572,10 +5693,6 @@
dev->hard_header_parse = NULL;
dev->set_mac_address = qeth_layer2_set_mac_address;
dev->flags |= qeth_get_netdev_flags(card);
- if (card->options.fake_ll)
- dev->hard_header = qeth_fake_header;
- else
- dev->hard_header = NULL;
if ((card->options.fake_broadcast) ||
(card->info.broadcast_capable))
dev->flags |= IFF_BROADCAST;
@@ -5672,22 +5789,26 @@
QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
goto out;
}
+ /*network device will be recovered*/
+ if (card->dev) {
+ card->dev->hard_header = card->orig_hard_header;
+ return 0;
+ }
/* at first set_online allocate netdev */
+ card->dev = qeth_get_netdevice(card->info.type,
+ card->info.link_type);
if (!card->dev){
- card->dev = qeth_get_netdevice(card->info.type,
- card->info.link_type);
- if (!card->dev){
- qeth_qdio_clear_card(card, card->info.type ==
- QETH_CARD_TYPE_OSAE);
- rc = -ENODEV;
- QETH_DBF_TEXT_(setup, 2, "6err%d", rc);
- goto out;
- }
- card->dev->priv = card;
- card->dev->type = qeth_get_arphdr_type(card->info.type,
- card->info.link_type);
- card->dev->init = qeth_netdev_init;
+ qeth_qdio_clear_card(card, card->info.type ==
+ QETH_CARD_TYPE_OSAE);
+ rc = -ENODEV;
+ QETH_DBF_TEXT_(setup, 2, "6err%d", rc);
+ goto out;
}
+ card->dev->priv = card;
+ card->orig_hard_header = card->dev->hard_header;
+ card->dev->type = qeth_get_arphdr_type(card->info.type,
+ card->info.link_type);
+ card->dev->init = qeth_netdev_init;
return 0;
out:
PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc);
@@ -5906,15 +6027,9 @@
}
QETH_DBF_HEX(setup,2, card->dev->dev_addr, OSA_ADDR_LEN);
- rc = qeth_layer2_send_setdelmac(card, &card->dev->dev_addr[0],
- IPA_CMD_SETVMAC);
- if (rc) {
- card->info.layer2_mac_registered = 0;
- PRINT_WARN("Error in processing MAC address on " \
- "device %s: x%x\n",CARD_BUS_ID(card),rc);
+ rc = qeth_layer2_send_setmac(card, &card->dev->dev_addr[0]);
+ if (rc)
QETH_DBF_TEXT_(setup, 2,"2err%d",rc);
- } else
- card->info.layer2_mac_registered = 1;
return 0;
}
@@ -6712,9 +6827,8 @@
rtnl_unlock();
if (!card->use_hard_stop) {
__u8 *mac = &card->dev->dev_addr[0];
- if ((rc = qeth_layer2_send_setdelmac(card, mac,
- IPA_CMD_DELVMAC)));
- QETH_DBF_TEXT_(setup, 2, "Lerr%d", rc);
+ rc = qeth_layer2_send_delmac(card, mac);
+ QETH_DBF_TEXT_(setup, 2, "Lerr%d", rc);
if ((rc = qeth_send_stoplan(card)))
QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
}
@@ -6872,8 +6986,10 @@
qeth_register_netdev(struct qeth_card *card)
{
QETH_DBF_TEXT(setup, 3, "regnetd");
- if (card->dev->reg_state != NETREG_UNINITIALIZED)
+ if (card->dev->reg_state != NETREG_UNINITIALIZED) {
+ qeth_netdev_init(card->dev);
return 0;
+ }
/* sysfs magic */
SET_NETDEV_DEV(card->dev, &card->gdev->dev);
return register_netdev(card->dev);
@@ -6961,9 +7077,9 @@
}
recover_flag = card->state;
- if (ccw_device_set_online(CARD_RDEV(card)) ||
- ccw_device_set_online(CARD_WDEV(card)) ||
- ccw_device_set_online(CARD_DDEV(card))){
+ if ((rc = ccw_device_set_online(CARD_RDEV(card))) ||
+ (rc = ccw_device_set_online(CARD_WDEV(card))) ||
+ (rc = ccw_device_set_online(CARD_DDEV(card)))){
QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
return -EIO;
}
@@ -7157,7 +7273,8 @@
card = qeth_get_card_from_dev(dev);
if (card == NULL)
goto out;
- if(card->options.layer2)
+ if((card->options.layer2) ||
+ (card->dev->hard_header == qeth_fake_header))
goto out;
rcu_read_lock();
diff -urN linux/drivers/s390/net/qeth_sys.c linux/drivers/s390/net/qeth_sys.c
--- linux/drivers/s390/net/qeth_sys.c 2005/01/13 14:06:19 1.8
+++ linux/drivers/s390/net/qeth_sys.c 2005/02/13 20:16:25 1.9
@@ -1,6 +1,6 @@
/*
*
- * linux/drivers/s390/net/qeth_sys.c ($Revision: 1.48 $)
+ * linux/drivers/s390/net/qeth_sys.c ($Revision: 1.49 $)
*
* Linux on zSeries OSA Express and HiperSockets support
* This file contains code related to sysfs.
@@ -20,7 +20,7 @@
#include "qeth_mpc.h"
#include "qeth_fs.h"
-const char *VERSION_QETH_SYS_C = "$Revision: 1.48 $";
+const char *VERSION_QETH_SYS_C = "$Revision: 1.49 $";
/*****************************************************************************/
/* */
@@ -514,19 +514,11 @@
return -EPERM;
i = simple_strtoul(buf, &tmp, 16);
- if ((i == 0) || (i == 1)) {
- card->options.fake_ll = i;
- if (card->dev) {
- if (i)
- card->dev->hard_header = qeth_fake_header;
- else
- card->dev->hard_header = NULL;
- }
- }
- else {
+ if ((i != 0) && (i != 1)) {
PRINT_WARN("fake_ll: write 0 or 1 to this file!\n");
return -EINVAL;
}
+ card->options.fake_ll = i;
return count;
}
diff -urN linux/drivers/s390/scsi/zfcp_erp.c linux/drivers/s390/scsi/zfcp_erp.c
--- linux/drivers/s390/scsi/zfcp_erp.c 2004/12/27 02:15:59 1.14
+++ linux/drivers/s390/scsi/zfcp_erp.c 2005/02/13 20:16:26 1.15
@@ -31,7 +31,7 @@
#define ZFCP_LOG_AREA ZFCP_LOG_AREA_ERP
-#define ZFCP_ERP_REVISION "$Revision: 1.85 $"
+#define ZFCP_ERP_REVISION "$Revision: 1.86 $"
#include "zfcp_ext.h"
@@ -369,7 +369,7 @@
ZFCP_LOG_NORMAL("error: initiation of Send ELS failed for port "
"0x%08x on adapter %s\n", d_id,
zfcp_get_busid_by_adapter(adapter));
- del_timer_sync(send_els->timer);
+ del_timer(send_els->timer);
goto freemem;
}
@@ -969,7 +969,7 @@
debug_event(adapter->erp_dbf, 2, &erp_action->action,
sizeof (int));
if (!(set_mask & ZFCP_STATUS_ERP_TIMEDOUT))
- del_timer_sync(&erp_action->timer);
+ del_timer(&erp_action->timer);
erp_action->status |= set_mask;
zfcp_erp_action_ready(erp_action);
retval = 0;
diff -urN linux/drivers/s390/scsi/zfcp_fsf.c linux/drivers/s390/scsi/zfcp_fsf.c
--- linux/drivers/s390/scsi/zfcp_fsf.c 2004/12/27 02:15:59 1.13
+++ linux/drivers/s390/scsi/zfcp_fsf.c 2005/02/13 20:16:26 1.14
@@ -30,7 +30,7 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#define ZFCP_FSF_C_REVISION "$Revision: 1.88 $"
+#define ZFCP_FSF_C_REVISION "$Revision: 1.92 $"
#include "zfcp_ext.h"
@@ -3203,7 +3203,9 @@
sizeof (union fsf_status_qual));
debug_text_event(adapter->erp_dbf, 2,
"fsf_s_l_sh_vio");
- zfcp_erp_unit_failed(unit);
+ zfcp_erp_unit_access_denied(unit);
+ atomic_clear_mask(ZFCP_STATUS_UNIT_SHARED, &unit->status);
+ atomic_clear_mask(ZFCP_STATUS_UNIT_READONLY, &unit->status);
fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
@@ -4320,22 +4322,19 @@
/* check for underrun */
if (unlikely(fcp_rsp_iu->validity.bits.fcp_resid_under)) {
- ZFCP_LOG_DEBUG("A data underrun was detected for a command. "
- "unit 0x%016Lx, port 0x%016Lx, adapter %s. "
- "The response data length is "
- "%d, the original length was %d.\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- fcp_rsp_iu->fcp_resid,
- (int) zfcp_get_fcp_dl(fcp_cmnd_iu));
- /*
- * It may not have been possible to send all data and the
- * underrun on send may already be in scpnt->resid, so it's add
- * not equals in the below statement.
- */
- scpnt->resid += fcp_rsp_iu->fcp_resid;
- ZFCP_LOG_TRACE("scpnt->resid=0x%x\n", scpnt->resid);
+ ZFCP_LOG_INFO("A data underrun was detected for a command. "
+ "unit 0x%016Lx, port 0x%016Lx, adapter %s. "
+ "The response data length is "
+ "%d, the original length was %d.\n",
+ unit->fcp_lun,
+ unit->port->wwpn,
+ zfcp_get_busid_by_unit(unit),
+ fcp_rsp_iu->fcp_resid,
+ (int) zfcp_get_fcp_dl(fcp_cmnd_iu));
+
+ scpnt->resid = fcp_rsp_iu->fcp_resid;
+ if (scpnt->request_bufflen - scpnt->resid < scpnt->underflow)
+ scpnt->result |= DID_ERROR << 16;
}
skip_fsfstatus:
@@ -5023,7 +5022,7 @@
* timer might be expired (absolutely unlikely)
*/
if (timer)
- del_timer_sync(timer);
+ del_timer(timer);
write_lock_irqsave(&adapter->fsf_req_list_lock, flags);
list_del(&fsf_req->list);
write_unlock_irqrestore(&adapter->fsf_req_list_lock, flags);
diff -urN linux/drivers/scsi/ahci.c linux/drivers/scsi/ahci.c
--- linux/drivers/scsi/ahci.c 2005/02/07 02:54:51 1.6
+++ linux/drivers/scsi/ahci.c 2005/02/13 20:16:26 1.7
@@ -250,6 +250,8 @@
board_ahci }, /* ICH7R */
{ PCI_VENDOR_ID_INTEL, 0x27c3, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
board_ahci }, /* ICH7R */
+ { PCI_VENDOR_ID_AL, 0x5288, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_ahci }, /* ULi M5288 */
{ } /* terminate list */
};
diff -urN linux/drivers/scsi/ide-scsi.c linux/drivers/scsi/ide-scsi.c
--- linux/drivers/scsi/ide-scsi.c 2005/01/13 14:06:20 1.78
+++ linux/drivers/scsi/ide-scsi.c 2005/02/13 20:16:26 1.79
@@ -152,7 +152,7 @@
}
count = min(pc->sg->length - pc->b_count, bcount);
buf = page_address(pc->sg->page) + pc->sg->offset;
- atapi_input_bytes (drive, buf + pc->b_count, count);
+ drive->hwif->atapi_input_bytes(drive, buf + pc->b_count, count);
bcount -= count; pc->b_count += count;
if (pc->b_count == pc->sg->length) {
pc->sg++;
@@ -174,7 +174,7 @@
}
count = min(pc->sg->length - pc->b_count, bcount);
buf = page_address(pc->sg->page) + pc->sg->offset;
- atapi_output_bytes (drive, buf + pc->b_count, count);
+ drive->hwif->atapi_output_bytes(drive, buf + pc->b_count,
count);
bcount -= count; pc->b_count += count;
if (pc->b_count == pc->sg->length) {
pc->sg++;
@@ -481,7 +481,7 @@
if (pc->sg)
idescsi_input_buffers(drive,
pc, temp);
else
- atapi_input_bytes(drive,
pc->current_position, temp);
+
drive->hwif->atapi_input_bytes(drive, pc->current_position, temp);
printk(KERN_ERR "ide-scsi: transferred
%d of %d bytes\n", temp, bcount.all);
}
pc->actually_transferred += temp;
@@ -541,7 +541,7 @@
/* Set the interrupt routine */
ide_set_handler(drive, &idescsi_pc_intr, get_timeout(pc),
idescsi_expiry);
/* Send the actual packet */
- atapi_output_bytes(drive, scsi->pc->c, 12);
+ drive->hwif->atapi_output_bytes(drive, scsi->pc->c, 12);
if (test_bit (PC_DMA_OK, &pc->flags)) {
set_bit (PC_DMA_IN_PROGRESS, &pc->flags);
hwif->dma_start(drive);
diff -urN linux/drivers/scsi/libata-core.c linux/drivers/scsi/libata-core.c
--- linux/drivers/scsi/libata-core.c 2005/01/13 14:06:20 1.24
+++ linux/drivers/scsi/libata-core.c 2005/02/13 20:16:26 1.25
@@ -1700,6 +1700,69 @@
DPRINTK("EXIT\n");
}
+static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev)
+{
+ printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling
DMA\n",
+ ap->id, dev->devno);
+}
+
+static const char * ata_dma_blacklist [] = {
+ "WDC AC11000H",
+ "WDC AC22100H",
+ "WDC AC32500H",
+ "WDC AC33100H",
+ "WDC AC31600H",
+ "WDC AC32100H",
+ "WDC AC23200L",
+ "Compaq CRD-8241B",
+ "CRD-8400B",
+ "CRD-8480B",
+ "CRD-8482B",
+ "CRD-84",
+ "SanDisk SDP3B",
+ "SanDisk SDP3B-64",
+ "SANYO CD-ROM CRD",
+ "HITACHI CDR-8",
+ "HITACHI CDR-8335",
+ "HITACHI CDR-8435",
+ "Toshiba CD-ROM XM-6202B",
+ "CD-532E-A",
+ "E-IDE CD-ROM CR-840",
+ "CD-ROM Drive/F5A",
+ "WPI CDD-820",
+ "SAMSUNG CD-ROM SC-148C",
+ "SAMSUNG CD-ROM SC",
+ "SanDisk SDP3B-64",
+ "SAMSUNG CD-ROM SN-124",
+ "ATAPI CD-ROM DRIVE 40X MAXIMUM",
+ "_NEC DV5800A",
+};
+
+static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev)
+{
+ unsigned char model_num[40];
+ char *s;
+ unsigned int len;
+ int i;
+
+ ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
+ sizeof(model_num));
+ s = &model_num[0];
+ len = strnlen(s, sizeof(model_num));
+
+ /* ATAPI specifies that empty space is blank-filled; remove blanks */
+ while ((len > 0) && (s[len - 1] == ' ')) {
+ len--;
+ s[len] = 0;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
+ if (!strncmp(ata_dma_blacklist[i], s, len))
+ return 1;
+
+ return 0;
+}
+
static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift)
{
struct ata_device *master, *slave;
@@ -1712,17 +1775,37 @@
if (shift == ATA_SHIFT_UDMA) {
mask = ap->udma_mask;
- if (ata_dev_present(master))
+ if (ata_dev_present(master)) {
mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
- if (ata_dev_present(slave))
+ if (ata_dma_blacklisted(ap, master)) {
+ mask = 0;
+ ata_pr_blacklisted(ap, master);
+ }
+ }
+ if (ata_dev_present(slave)) {
mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
+ if (ata_dma_blacklisted(ap, slave)) {
+ mask = 0;
+ ata_pr_blacklisted(ap, slave);
+ }
+ }
}
else if (shift == ATA_SHIFT_MWDMA) {
mask = ap->mwdma_mask;
- if (ata_dev_present(master))
+ if (ata_dev_present(master)) {
mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
- if (ata_dev_present(slave))
+ if (ata_dma_blacklisted(ap, master)) {
+ mask = 0;
+ ata_pr_blacklisted(ap, master);
+ }
+ }
+ if (ata_dev_present(slave)) {
mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
+ if (ata_dma_blacklisted(ap, slave)) {
+ mask = 0;
+ ata_pr_blacklisted(ap, slave);
+ }
+ }
}
else if (shift == ATA_SHIFT_PIO) {
mask = ap->pio_mask;
@@ -3452,32 +3535,28 @@
}
static struct ata_probe_ent *
-ata_probe_ent_alloc(int n, struct device *dev, struct ata_port_info **port)
+ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port)
{
struct ata_probe_ent *probe_ent;
- int i;
- probe_ent = kmalloc(sizeof(*probe_ent) * n, GFP_KERNEL);
+ probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
if (!probe_ent) {
printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
kobject_name(&(dev->kobj)));
return NULL;
}
- memset(probe_ent, 0, sizeof(*probe_ent) * n);
+ memset(probe_ent, 0, sizeof(*probe_ent));
- for (i = 0; i < n; i++) {
- INIT_LIST_HEAD(&probe_ent[i].node);
- probe_ent[i].dev = dev;
-
- probe_ent[i].sht = port[i]->sht;
- probe_ent[i].host_flags = port[i]->host_flags;
- probe_ent[i].pio_mask = port[i]->pio_mask;
- probe_ent[i].mwdma_mask = port[i]->mwdma_mask;
- probe_ent[i].udma_mask = port[i]->udma_mask;
- probe_ent[i].port_ops = port[i]->port_ops;
+ INIT_LIST_HEAD(&probe_ent->node);
+ probe_ent->dev = dev;
- }
+ probe_ent->sht = port->sht;
+ probe_ent->host_flags = port->host_flags;
+ probe_ent->pio_mask = port->pio_mask;
+ probe_ent->mwdma_mask = port->mwdma_mask;
+ probe_ent->udma_mask = port->udma_mask;
+ probe_ent->port_ops = port->port_ops;
return probe_ent;
}
@@ -3487,7 +3566,7 @@
ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port)
{
struct ata_probe_ent *probe_ent =
- ata_probe_ent_alloc(1, pci_dev_to_dev(pdev), port);
+ ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
if (!probe_ent)
return NULL;
@@ -3513,39 +3592,47 @@
return probe_ent;
}
-struct ata_probe_ent *
-ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port)
+static struct ata_probe_ent *
+ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port,
+ struct ata_probe_ent **ppe2)
{
- struct ata_probe_ent *probe_ent =
- ata_probe_ent_alloc(2, pci_dev_to_dev(pdev), port);
+ struct ata_probe_ent *probe_ent, *probe_ent2;
+
+ probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
if (!probe_ent)
return NULL;
+ probe_ent2 = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[1]);
+ if (!probe_ent2) {
+ kfree(probe_ent);
+ return NULL;
+ }
+
+ probe_ent->n_ports = 1;
+ probe_ent->irq = 14;
- probe_ent[0].n_ports = 1;
- probe_ent[0].irq = 14;
+ probe_ent->hard_port_no = 0;
+ probe_ent->legacy_mode = 1;
- probe_ent[0].hard_port_no = 0;
- probe_ent[0].legacy_mode = 1;
+ probe_ent2->n_ports = 1;
+ probe_ent2->irq = 15;
- probe_ent[1].n_ports = 1;
- probe_ent[1].irq = 15;
+ probe_ent2->hard_port_no = 1;
+ probe_ent2->legacy_mode = 1;
- probe_ent[1].hard_port_no = 1;
- probe_ent[1].legacy_mode = 1;
-
- probe_ent[0].port[0].cmd_addr = 0x1f0;
- probe_ent[0].port[0].altstatus_addr =
- probe_ent[0].port[0].ctl_addr = 0x3f6;
- probe_ent[0].port[0].bmdma_addr = pci_resource_start(pdev, 4);
-
- probe_ent[1].port[0].cmd_addr = 0x170;
- probe_ent[1].port[0].altstatus_addr =
- probe_ent[1].port[0].ctl_addr = 0x376;
- probe_ent[1].port[0].bmdma_addr = pci_resource_start(pdev, 4)+8;
+ probe_ent->port[0].cmd_addr = 0x1f0;
+ probe_ent->port[0].altstatus_addr =
+ probe_ent->port[0].ctl_addr = 0x3f6;
+ probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
- ata_std_ports(&probe_ent[0].port[0]);
- ata_std_ports(&probe_ent[1].port[0]);
+ probe_ent2->port[0].cmd_addr = 0x170;
+ probe_ent2->port[0].altstatus_addr =
+ probe_ent2->port[0].ctl_addr = 0x376;
+ probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8;
+
+ ata_std_ports(&probe_ent->port[0]);
+ ata_std_ports(&probe_ent2->port[0]);
+ *ppe2 = probe_ent2;
return probe_ent;
}
@@ -3579,7 +3666,8 @@
else
port[1] = port[0];
- if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0) {
+ if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
+ && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
/* TODO: support transitioning to native mode? */
pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
mask = (1 << 2) | (1 << 0);
@@ -3641,9 +3729,7 @@
goto err_out_regions;
if (legacy_mode) {
- probe_ent = ata_pci_init_legacy_mode(pdev, port);
- if (probe_ent)
- probe_ent2 = &probe_ent[1];
+ probe_ent = ata_pci_init_legacy_mode(pdev, port, &probe_ent2);
} else
probe_ent = ata_pci_init_native_mode(pdev, port);
if (!probe_ent) {
@@ -3657,8 +3743,12 @@
if (legacy_mode) {
if (legacy_mode & (1 << 0))
ata_device_add(probe_ent);
+ else
+ kfree(probe_ent);
if (legacy_mode & (1 << 1))
ata_device_add(probe_ent2);
+ else
+ kfree(probe_ent2);
} else {
ata_device_add(probe_ent);
}
@@ -3848,7 +3938,6 @@
#ifdef CONFIG_PCI
EXPORT_SYMBOL_GPL(pci_test_config_bits);
-EXPORT_SYMBOL_GPL(ata_pci_init_legacy_mode);
EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
EXPORT_SYMBOL_GPL(ata_pci_init_one);
EXPORT_SYMBOL_GPL(ata_pci_remove_one);
diff -urN linux/drivers/scsi/libata-scsi.c linux/drivers/scsi/libata-scsi.c
--- linux/drivers/scsi/libata-scsi.c 2005/02/07 02:54:51 1.18
+++ linux/drivers/scsi/libata-scsi.c 2005/02/13 20:16:26 1.19
@@ -202,7 +202,7 @@
{0x40, MEDIUM_ERROR, 0x11, 0x04}, //
Uncorrectable ECC error Unrecovered read error
/* BBD - block marked bad */
{0x80, MEDIUM_ERROR, 0x11, 0x04}, // Block marked
bad Medium error, unrecovered read error
- {0xFF, 0xFF, 0xFF, 0xFF}, // END mark
+ {0xFF, 0xFF, 0xFF, 0xFF}, // END mark
};
static unsigned char stat_table[][4] = {
/* Must be first because BUSY means no other bits valid */
@@ -210,22 +210,22 @@
{0x20, HARDWARE_ERROR, 0x00, 0x00}, // Device fault
{0x08, ABORTED_COMMAND, 0x47, 0x00}, // Timed out in
xfer, fake parity for now
{0x04, RECOVERED_ERROR, 0x11, 0x00}, // Recovered
ECC error Medium error, recovered
- {0xFF, 0xFF, 0xFF, 0xFF}, // END mark
+ {0xFF, 0xFF, 0xFF, 0xFF}, // END mark
};
int i = 0;
cmd->result = SAM_STAT_CHECK_CONDITION;
-
+
/*
* Is this an error we can process/parse
*/
-
+
if(drv_stat & ATA_ERR)
/* Read the err bits */
err = ata_chk_err(qc->ap);
/* Display the ATA level error info */
-
+
printk(KERN_WARNING "ata%u: status=0x%02x { ", qc->ap->id, drv_stat);
if(drv_stat & 0x80)
{
@@ -242,7 +242,7 @@
if(drv_stat & 0x01) printk("Error ");
}
printk("}\n");
-
+
if(err)
{
printk(KERN_WARNING "ata%u: error=0x%02x { ", qc->ap->id, err);
@@ -259,11 +259,11 @@
if(err & 0x02) printk("TrackZeroNotFound ");
if(err & 0x01) printk("AddrMarkNotFound ");
printk("}\n");
-
+
/* Should we dump sector info here too ?? */
}
-
-
+
+
/* Look for err */
while(sense_table[i][0] != 0xFF)
{
@@ -301,7 +301,7 @@
/* No error ?? */
printk(KERN_ERR "ata%u: called with no error (%02X)!\n", qc->ap->id,
drv_stat);
/* additional-sense-code[-qualifier] */
-
+
sb[0] = 0x70;
sb[2] = MEDIUM_ERROR;
sb[7] = 0x0A;
@@ -488,19 +488,24 @@
}
if (lba48) {
+ tf->command = ATA_CMD_VERIFY_EXT;
+
tf->hob_nsect = (n_sect >> 8) & 0xff;
tf->hob_lbah = (sect >> 40) & 0xff;
tf->hob_lbam = (sect >> 32) & 0xff;
tf->hob_lbal = (sect >> 24) & 0xff;
- } else
+ } else {
+ tf->command = ATA_CMD_VERIFY;
+
tf->device |= (sect >> 24) & 0xf;
+ }
tf->nsect = n_sect & 0xff;
- tf->hob_lbah = (sect >> 16) & 0xff;
- tf->hob_lbam = (sect >> 8) & 0xff;
- tf->hob_lbal = sect & 0xff;
+ tf->lbah = (sect >> 16) & 0xff;
+ tf->lbam = (sect >> 8) & 0xff;
+ tf->lbal = sect & 0xff;
return 0;
}
@@ -600,7 +605,7 @@
return 1;
/* stores LBA27:24 in lower 4 bits of device reg */
- tf->device |= scsicmd[2];
+ tf->device |= scsicmd[6];
qc->nsect = scsicmd[13];
}
diff -urN linux/drivers/scsi/sata_nv.c linux/drivers/scsi/sata_nv.c
--- linux/drivers/scsi/sata_nv.c 2004/12/27 02:15:59 1.9
+++ linux/drivers/scsi/sata_nv.c 2005/02/13 20:16:26 1.10
@@ -20,6 +20,10 @@
* If you do not delete the provisions above, a recipient may use your
* version of this file under either the OSL or the GPL.
*
+ * 0.06
+ * - Added generic SATA support by using a pci_device_id that filters on
+ * the IDE storage class code.
+ *
* 0.03
* - Fixed a bug where the hotplug handlers for non-CK804/MCP04 were using
* mmio_base, which is only set for the CK804/MCP04 case.
@@ -44,7 +48,7 @@
#include <linux/libata.h>
#define DRV_NAME "sata_nv"
-#define DRV_VERSION "0.5"
+#define DRV_VERSION "0.6"
#define NV_PORTS 2
#define NV_PIO_MASK 0x1f
@@ -108,6 +112,7 @@
enum nv_host_type
{
+ GENERIC,
NFORCE2,
NFORCE3,
CK804
@@ -128,6 +133,9 @@
PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
+ { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
+ PCI_ANY_ID, PCI_ANY_ID,
+ PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC },
{ 0, } /* terminate list */
};
@@ -136,7 +144,6 @@
struct nv_host_desc
{
enum nv_host_type host_type;
- unsigned long host_flags;
void (*enable_hotplug)(struct ata_probe_ent
*probe_ent);
void (*disable_hotplug)(struct ata_host_set
*host_set);
void (*check_hotplug)(struct ata_host_set *host_set);
@@ -144,21 +151,24 @@
};
static struct nv_host_desc nv_device_tbl[] = {
{
+ .host_type = GENERIC,
+ .enable_hotplug = NULL,
+ .disable_hotplug= NULL,
+ .check_hotplug = NULL,
+ },
+ {
.host_type = NFORCE2,
- .host_flags = 0x00000000,
.enable_hotplug = nv_enable_hotplug,
.disable_hotplug= nv_disable_hotplug,
.check_hotplug = nv_check_hotplug,
},
{
.host_type = NFORCE3,
- .host_flags = 0x00000000,
.enable_hotplug = nv_enable_hotplug,
.disable_hotplug= nv_disable_hotplug,
.check_hotplug = nv_check_hotplug,
},
{ .host_type = CK804,
- .host_flags = NV_HOST_FLAGS_SCR_MMIO,
.enable_hotplug = nv_enable_hotplug_ck804,
.disable_hotplug= nv_disable_hotplug_ck804,
.check_hotplug = nv_check_hotplug_ck804,
@@ -168,6 +178,7 @@
struct nv_host
{
struct nv_host_desc *host_desc;
+ unsigned long host_flags;
};
static struct pci_driver nv_pci_driver = {
@@ -284,8 +295,8 @@
if (sc_reg > SCR_CONTROL)
return 0xffffffffU;
- if (host->host_desc->host_flags & NV_HOST_FLAGS_SCR_MMIO)
- return readl(ap->ioaddr.scr_addr + (sc_reg * 4));
+ if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
+ return readl((void*)ap->ioaddr.scr_addr + (sc_reg * 4));
else
return inl(ap->ioaddr.scr_addr + (sc_reg * 4));
}
@@ -298,8 +309,8 @@
if (sc_reg > SCR_CONTROL)
return;
- if (host->host_desc->host_flags & NV_HOST_FLAGS_SCR_MMIO)
- writel(val, ap->ioaddr.scr_addr + (sc_reg * 4));
+ if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
+ writel(val, (void*)ap->ioaddr.scr_addr + (sc_reg * 4));
else
outl(val, ap->ioaddr.scr_addr + (sc_reg * 4));
}
@@ -322,6 +333,14 @@
struct ata_port_info *ppi;
struct ata_probe_ent *probe_ent;
int rc;
+ u32 bar;
+
+ // Make sure this is a SATA controller by counting the number of bars
+ // (NVIDIA SATA controllers will always have six bars). Otherwise,
+ // it's an IDE controller and we ignore it.
+ for (bar=0; bar<6; bar++)
+ if (pci_resource_start(pdev, bar) == 0)
+ return -ENODEV;
if (!printed_version++)
printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
@@ -352,11 +371,15 @@
if (!host)
goto err_out_free_ent;
+ memset(host, 0, sizeof(struct nv_host));
host->host_desc = &nv_device_tbl[ent->driver_data];
probe_ent->private_data = host;
- if (host->host_desc->host_flags & NV_HOST_FLAGS_SCR_MMIO) {
+ if (pci_resource_flags(pdev, 5) & IORESOURCE_MEM)
+ host->host_flags |= NV_HOST_FLAGS_SCR_MMIO;
+
+ if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) {
unsigned long base;
probe_ent->mmio_base = ioremap(pci_resource_start(pdev, 5),
@@ -395,7 +418,7 @@
return 0;
err_out_iounmap:
- if (host->host_desc->host_flags & NV_HOST_FLAGS_SCR_MMIO)
+ if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
iounmap(probe_ent->mmio_base);
err_out_free_host:
kfree(host);
diff -urN linux/drivers/scsi/sata_promise.c linux/drivers/scsi/sata_promise.c
--- linux/drivers/scsi/sata_promise.c 2004/11/15 11:49:31 1.15
+++ linux/drivers/scsi/sata_promise.c 2005/02/13 20:16:26 1.16
@@ -156,10 +156,18 @@
board_2037x },
{ PCI_VENDOR_ID_PROMISE, 0x3376, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
board_2037x },
+ { PCI_VENDOR_ID_PROMISE, 0x3574, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_2037x },
+ { PCI_VENDOR_ID_PROMISE, 0x3d75, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_2037x },
+
{ PCI_VENDOR_ID_PROMISE, 0x3318, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
board_20319 },
{ PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
board_20319 },
+ { PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_20319 },
+
{ } /* terminate list */
};
@@ -406,9 +414,11 @@
return IRQ_NONE;
}
- spin_lock(&host_set->lock);
+ spin_lock(&host_set->lock);
+
+ writel(mask, mmio_base + PDC_INT_SEQMASK);
- for (i = 0; i < host_set->n_ports; i++) {
+ for (i = 0; i < host_set->n_ports; i++) {
VPRINTK("port %u\n", i);
ap = host_set->ports[i];
tmp = mask & (1 << (i + 1));
diff -urN linux/drivers/scsi/sata_sil.c linux/drivers/scsi/sata_sil.c
--- linux/drivers/scsi/sata_sil.c 2005/02/07 02:54:51 1.16
+++ linux/drivers/scsi/sata_sil.c 2005/02/13 20:16:26 1.17
@@ -86,6 +86,7 @@
{ "ST330013AS", SIL_QUIRK_MOD15WRITE },
{ "ST340017AS", SIL_QUIRK_MOD15WRITE },
{ "ST360015AS", SIL_QUIRK_MOD15WRITE },
+ { "ST380013AS", SIL_QUIRK_MOD15WRITE },
{ "ST380023AS", SIL_QUIRK_MOD15WRITE },
{ "ST3120023AS", SIL_QUIRK_MOD15WRITE },
{ "ST3160023AS", SIL_QUIRK_MOD15WRITE },
diff -urN linux/drivers/scsi/scsi_transport_fc.c
linux/drivers/scsi/scsi_transport_fc.c
--- linux/drivers/scsi/scsi_transport_fc.c 2005/02/07 02:54:51 1.6
+++ linux/drivers/scsi/scsi_transport_fc.c 2005/02/13 20:16:26 1.7
@@ -847,6 +847,9 @@
{
struct fc_internal *i = to_fc_internal(t);
+ attribute_container_unregister(&i->t.target_attrs);
+ attribute_container_unregister(&i->t.host_attrs);
+
kfree(i);
}
EXPORT_SYMBOL(fc_release_transport);
diff -urN linux/drivers/scsi/scsi_transport_iscsi.c
linux/drivers/scsi/scsi_transport_iscsi.c
--- linux/drivers/scsi/scsi_transport_iscsi.c 2005/02/07 02:54:51 1.2
+++ linux/drivers/scsi/scsi_transport_iscsi.c 2005/02/13 20:16:26 1.3
@@ -356,6 +356,10 @@
void iscsi_release_transport(struct scsi_transport_template *t)
{
struct iscsi_internal *i = to_iscsi_internal(t);
+
+ attribute_container_unregister(&i->t.target_attrs);
+ attribute_container_unregister(&i->t.host_attrs);
+
kfree(i);
}
diff -urN linux/drivers/scsi/scsi_transport_spi.c
linux/drivers/scsi/scsi_transport_spi.c
--- linux/drivers/scsi/scsi_transport_spi.c 2005/02/07 02:54:51 1.7
+++ linux/drivers/scsi/scsi_transport_spi.c 2005/02/13 20:16:26 1.8
@@ -921,6 +921,9 @@
{
struct spi_internal *i = to_spi_internal(t);
+ attribute_container_unregister(&i->t.target_attrs);
+ attribute_container_unregister(&i->t.host_attrs);
+
kfree(i);
}
EXPORT_SYMBOL(spi_release_transport);
diff -urN linux/drivers/scsi/megaraid/Kconfig.megaraid
linux/drivers/scsi/megaraid/Kconfig.megaraid
--- linux/drivers/scsi/megaraid/Kconfig.megaraid 2004/09/19 12:30:14
1.1
+++ linux/drivers/scsi/megaraid/Kconfig.megaraid 2005/02/13 20:16:26
1.2
@@ -59,6 +59,7 @@
INTEL RAID Controller SRCU51L 1000:1960:8086:0520
FSC MegaRAID PCI Express ROMB 1000:0408:1734:1065
ACER MegaRAID ROMB-2E 1000:0408:1025:004D
+ NEC MegaRAID PCI Express ROMB 1000:0408:1033:8287
To compile this driver as a module, choose M here: the
module will be called megaraid_mbox
diff -urN linux/drivers/scsi/megaraid/mega_common.h
linux/drivers/scsi/megaraid/mega_common.h
--- linux/drivers/scsi/megaraid/mega_common.h 2004/09/19 12:30:14 1.1
+++ linux/drivers/scsi/megaraid/mega_common.h 2005/02/13 20:16:26 1.2
@@ -221,6 +221,9 @@
#define MRAID_IS_LOGICAL(adp, scp) \
(SCP2CHANNEL(scp) == (adp)->max_channel) ? 1 : 0
+#define MRAID_IS_LOGICAL_SDEV(adp, sdev) \
+ (sdev->channel == (adp)->max_channel) ? 1 : 0
+
#define MRAID_GET_DEVICE_MAP(adp, scp, p_chan, target, islogical) \
/* \
* Is the request coming for the virtual channel \
diff -urN linux/drivers/scsi/megaraid/megaraid_ioctl.h
linux/drivers/scsi/megaraid/megaraid_ioctl.h
--- linux/drivers/scsi/megaraid/megaraid_ioctl.h 2004/12/27 02:16:00
1.3
+++ linux/drivers/scsi/megaraid/megaraid_ioctl.h 2005/02/13 20:16:26
1.4
@@ -291,5 +291,6 @@
int mraid_mm_register_adp(mraid_mmadp_t *);
int mraid_mm_unregister_adp(uint32_t);
+uint32_t mraid_mm_adapter_app_handle(uint32_t);
#endif /* _MEGARAID_IOCTL_H_ */
diff -urN linux/drivers/scsi/megaraid/megaraid_mbox.c
linux/drivers/scsi/megaraid/megaraid_mbox.c
--- linux/drivers/scsi/megaraid/megaraid_mbox.c 2005/02/07 02:54:52 1.6
+++ linux/drivers/scsi/megaraid/megaraid_mbox.c 2005/02/13 20:16:26 1.7
@@ -10,7 +10,7 @@
* 2 of the License, or (at your option) any later version.
*
* FILE : megaraid_mbox.c
- * Version : v2.20.4.1 (Nov 04 2004)
+ * Version : v2.20.4.5 (Feb 03 2005)
*
* Authors:
* Atul Mukker <Atul.Mukker@lsil.com>
@@ -60,12 +60,11 @@
* INTEL RAID Controller SROMBU42E 1000 0408 8086 3499
* INTEL RAID Controller SRCU51L 1000 1960 8086 0520
*
- *
* FSC MegaRAID PCI Express ROMB 1000 0408 1734 1065
*
- *
* ACER MegaRAID ROMB-2E 1000 0408 1025 004D
*
+ * NEC MegaRAID PCI Express ROMB 1000 0408 1033 8287
*
* For history of changes, see Documentation/ChangeLog.megaraid
*/
@@ -91,6 +90,9 @@
static int megaraid_mbox_setup_dma_pools(adapter_t *);
static void megaraid_mbox_teardown_dma_pools(adapter_t *);
+static int megaraid_sysfs_alloc_resources(adapter_t *);
+static void megaraid_sysfs_free_resources(adapter_t *);
+
static int megaraid_abort_handler(struct scsi_cmnd *);
static int megaraid_reset_handler(struct scsi_cmnd *);
@@ -121,6 +123,9 @@
static void megaraid_mbox_dpc(unsigned long);
+static ssize_t megaraid_sysfs_show_app_hndl(struct class_device *, char *);
+static ssize_t megaraid_sysfs_show_ldnum(struct device *, char *);
+
static int megaraid_cmm_register(adapter_t *);
static int megaraid_cmm_unregister(adapter_t *);
static int megaraid_mbox_mm_handler(unsigned long, uioc_t *, uint32_t);
@@ -197,7 +202,7 @@
* ### global data ###
*/
static uint8_t megaraid_mbox_version[8] =
- { 0x02, 0x20, 0x04, 0x00, 9, 27, 20, 4 };
+ { 0x02, 0x20, 0x04, 0x05, 2, 3, 20, 5 };
/*
@@ -301,6 +306,12 @@
PCI_SUBSYS_ID_PERC3_SC,
},
{
+ PCI_VENDOR_ID_AMI,
+ PCI_DEVICE_ID_AMI_MEGARAID3,
+ PCI_VENDOR_ID_AMI,
+ PCI_SUBSYS_ID_PERC3_DC,
+ },
+ {
PCI_VENDOR_ID_LSI_LOGIC,
PCI_DEVICE_ID_MEGARAID_SCSI_320_0,
PCI_VENDOR_ID_LSI_LOGIC,
@@ -438,6 +449,12 @@
PCI_VENDOR_ID_AI,
PCI_SUBSYS_ID_MEGARAID_ACER_ROMB_2E,
},
+ {
+ PCI_VENDOR_ID_LSI_LOGIC,
+ PCI_DEVICE_ID_MEGARAID_NEC_ROMB_2E,
+ PCI_VENDOR_ID_NEC,
+ PCI_SUBSYS_ID_MEGARAID_NEC_ROMB_2E,
+ },
{0} /* Terminating entry */
};
MODULE_DEVICE_TABLE(pci, pci_id_table_g);
@@ -454,6 +471,29 @@
};
+
+// definitions for the device attributes for exporting logical drive number
+// for a scsi address (Host, Channel, Id, Lun)
+
+CLASS_DEVICE_ATTR(megaraid_mbox_app_hndl, S_IRUSR,
megaraid_sysfs_show_app_hndl,
+ NULL);
+
+// Host template initializer for megaraid mbox sysfs device attributes
+static struct class_device_attribute *megaraid_shost_attrs[] = {
+ &class_device_attr_megaraid_mbox_app_hndl,
+ NULL,
+};
+
+
+DEVICE_ATTR(megaraid_mbox_ld, S_IRUSR, megaraid_sysfs_show_ldnum, NULL);
+
+// Host template initializer for megaraid mbox sysfs device attributes
+static struct device_attribute *megaraid_sdev_attrs[] = {
+ &dev_attr_megaraid_mbox_ld,
+ NULL,
+};
+
+
/*
* Scsi host template for megaraid unified driver
*/
@@ -467,6 +507,8 @@
.eh_bus_reset_handler = megaraid_reset_handler,
.eh_host_reset_handler = megaraid_reset_handler,
.use_clustering = ENABLE_CLUSTERING,
+ .sdev_attrs = megaraid_sdev_attrs,
+ .shost_attrs = megaraid_shost_attrs,
};
@@ -953,6 +995,8 @@
}
adapter->device_ids[adapter->max_channel][adapter->init_id] =
0xFF;
+
+ raid_dev->random_del_supported = 1;
}
/*
@@ -977,6 +1021,14 @@
*/
adapter->cmd_per_lun = megaraid_cmd_per_lun;
+ /*
+ * Allocate resources required to issue FW calls, when sysfs is
+ * accessed
+ */
+ if (megaraid_sysfs_alloc_resources(adapter) != 0) {
+ goto out_alloc_cmds;
+ }
+
// Set the DMA mask to 64-bit. All supported controllers as capable of
// DMA in this range
if (pci_set_dma_mask(adapter->pdev, 0xFFFFFFFFFFFFFFFFULL) != 0) {
@@ -984,7 +1036,7 @@
con_log(CL_ANN, (KERN_WARNING
"megaraid: could not set DMA mask for 64-bit.\n"));
- goto out_alloc_cmds;
+ goto out_free_sysfs_res;
}
// setup tasklet for DPC
@@ -996,6 +1048,8 @@
return 0;
+out_free_sysfs_res:
+ megaraid_sysfs_free_resources(adapter);
out_alloc_cmds:
megaraid_free_cmd_packets(adapter);
out_free_irq:
@@ -1025,6 +1079,8 @@
tasklet_kill(&adapter->dpc_h);
+ megaraid_sysfs_free_resources(adapter);
+
megaraid_free_cmd_packets(adapter);
free_irq(adapter->irq, adapter);
@@ -1559,12 +1615,14 @@
if (scb->dma_direction == PCI_DMA_TODEVICE) {
if (!scb->scp->use_sg) { // sg list not used
- pci_dma_sync_single_for_device(adapter->pdev,
ccb->buf_dma_h,
+ pci_dma_sync_single_for_device(adapter->pdev,
+ ccb->buf_dma_h,
scb->scp->request_bufflen,
PCI_DMA_TODEVICE);
}
else {
- pci_dma_sync_sg_for_device(adapter->pdev,
scb->scp->request_buffer,
+ pci_dma_sync_sg_for_device(adapter->pdev,
+ scb->scp->request_buffer,
scb->scp->use_sg, PCI_DMA_TODEVICE);
}
}
@@ -2107,7 +2165,8 @@
channel = scb->dev_channel;
target = scb->dev_target;
- pthru->timeout = 1; // 0=6sec, 1=60sec, 2=10min, 3=3hrs
+ // 0=6sec, 1=60sec, 2=10min, 3=3hrs, 4=NO timeout
+ pthru->timeout = 4;
pthru->ars = 1;
pthru->islogical = 0;
pthru->channel = 0;
@@ -2155,7 +2214,8 @@
channel = scb->dev_channel;
target = scb->dev_target;
- epthru->timeout = 1; // 0=6sec, 1=60sec, 2=10min, 3=3hrs
+ // 0=6sec, 1=60sec, 2=10min, 3=3hrs, 4=NO timeout
+ epthru->timeout = 4;
epthru->ars = 1;
epthru->islogical = 0;
epthru->channel = 0;
@@ -3306,7 +3366,7 @@
memset((caddr_t)raw_mbox, 0, sizeof(mbox_t));
raw_mbox[0] = FC_DEL_LOGDRV;
- raw_mbox[0] = OP_SUP_DEL_LOGDRV;
+ raw_mbox[2] = OP_SUP_DEL_LOGDRV;
// Issue the command
rval = 0;
@@ -3719,8 +3779,9 @@
spin_unlock_irqrestore(USER_FREE_LIST_LOCK(adapter), flags);
- scb->state = SCB_ACTIVE;
- scb->dma_type = MRAID_DMA_NONE;
+ scb->state = SCB_ACTIVE;
+ scb->dma_type = MRAID_DMA_NONE;
+ scb->dma_direction = PCI_DMA_NONE;
ccb = (mbox_ccb_t *)scb->ccb;
mbox64 = (mbox64_t *)(unsigned long)kioc->cmdbuf;
@@ -3888,6 +3949,324 @@
*/
+
+/**
+ * megaraid_sysfs_alloc_resources - allocate sysfs related resources
+ *
+ * Allocate packets required to issue FW calls whenever the sysfs attributes
+ * are read. These attributes would require up-to-date information from the
+ * FW. Also set up resources for mutual exclusion to share these resources and
+ * the wait queue.
+ *
+ * @param adapter : controller's soft state
+ *
+ * @return 0 on success
+ * @return -ERROR_CODE on failure
+ */
+static int
+megaraid_sysfs_alloc_resources(adapter_t *adapter)
+{
+ mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter);
+ int rval = 0;
+
+ raid_dev->sysfs_uioc = kmalloc(sizeof(uioc_t), GFP_KERNEL);
+
+ raid_dev->sysfs_mbox64 = kmalloc(sizeof(mbox64_t), GFP_KERNEL);
+
+ raid_dev->sysfs_buffer = pci_alloc_consistent(adapter->pdev,
+ PAGE_SIZE, &raid_dev->sysfs_buffer_dma);
+
+ if (!raid_dev->sysfs_uioc || !raid_dev->sysfs_mbox64 ||
+ !raid_dev->sysfs_buffer) {
+
+ con_log(CL_ANN, (KERN_WARNING
+ "megaraid: out of memory, %s %d\n", __FUNCTION__,
+ __LINE__));
+
+ rval = -ENOMEM;
+
+ megaraid_sysfs_free_resources(adapter);
+ }
+
+ sema_init(&raid_dev->sysfs_sem, 1);
+
+ init_waitqueue_head(&raid_dev->sysfs_wait_q);
+
+ return rval;
+}
+
+
+/**
+ * megaraid_sysfs_free_resources - free sysfs related resources
+ *
+ * Free packets allocated for sysfs FW commands
+ *
+ * @param adapter : controller's soft state
+ */
+static void
+megaraid_sysfs_free_resources(adapter_t *adapter)
+{
+ mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter);
+
+ if (raid_dev->sysfs_uioc) kfree(raid_dev->sysfs_uioc);
+
+ if (raid_dev->sysfs_mbox64) kfree(raid_dev->sysfs_mbox64);
+
+ if (raid_dev->sysfs_buffer) {
+ pci_free_consistent(adapter->pdev, PAGE_SIZE,
+ raid_dev->sysfs_buffer, raid_dev->sysfs_buffer_dma);
+ }
+}
+
+
+/**
+ * megaraid_sysfs_get_ldmap_done - callback for get ldmap
+ *
+ * Callback routine called in the ISR/tasklet context for get ldmap call
+ *
+ * @param uioc : completed packet
+ */
+static void
+megaraid_sysfs_get_ldmap_done(uioc_t *uioc)
+{
+ adapter_t *adapter = (adapter_t *)uioc->buf_vaddr;
+ mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter);
+
+ uioc->status = 0;
+
+ wake_up(&raid_dev->sysfs_wait_q);
+}
+
+
+/**
+ * megaraid_sysfs_get_ldmap_timeout - timeout handling for get ldmap
+ *
+ * Timeout routine to recover and return to application, in case the adapter
+ * has stopped responding. A timeout of 60 seconds for this command seem like
+ * a good value
+ *
+ * @param uioc : timed out packet
+ */
+static void
+megaraid_sysfs_get_ldmap_timeout(unsigned long data)
+{
+ uioc_t *uioc = (uioc_t *)data;
+ adapter_t *adapter = (adapter_t *)uioc->buf_vaddr;
+ mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter);
+
+ uioc->status = -ETIME;
+
+ wake_up(&raid_dev->sysfs_wait_q);
+}
+
+
+/**
+ * megaraid_sysfs_get_ldmap - get update logical drive map
+ *
+ * This routine will be called whenever user reads the logical drive
+ * attributes, go get the current logical drive mapping table from the
+ * firmware. We use the managment API's to issue commands to the controller.
+ *
+ * NOTE: The commands issuance functionality is not generalized and
+ * implemented in context of "get ld map" command only. If required, the
+ * command issuance logical can be trivially pulled out and implemented as a
+ * standalone libary. For now, this should suffice since there is no other
+ * user of this interface.
+ *
+ * @param adapter : controller's soft state
+ *
+ * @return 0 on success
+ * @return -1 on failure
+ */
+static int
+megaraid_sysfs_get_ldmap(adapter_t *adapter)
+{
+ mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter);
+ uioc_t *uioc;
+ mbox64_t *mbox64;
+ mbox_t *mbox;
+ char *raw_mbox;
+ struct timer_list sysfs_timer;
+ struct timer_list *timerp;
+ caddr_t ldmap;
+ int rval = 0;
+
+ /*
+ * Allow only one read at a time to go through the sysfs attributes
+ */
+ down(&raid_dev->sysfs_sem);
+
+ uioc = raid_dev->sysfs_uioc;
+ mbox64 = raid_dev->sysfs_mbox64;
+ ldmap = raid_dev->sysfs_buffer;
+
+ memset(uioc, 0, sizeof(uioc_t));
+ memset(mbox64, 0, sizeof(mbox64_t));
+ memset(ldmap, 0, sizeof(raid_dev->curr_ldmap));
+
+ mbox = &mbox64->mbox32;
+ raw_mbox = (char *)mbox;
+ uioc->cmdbuf = (uint64_t)(unsigned long)mbox64;
+ uioc->buf_vaddr = (caddr_t)adapter;
+ uioc->status = -ENODATA;
+ uioc->done = megaraid_sysfs_get_ldmap_done;
+
+ /*
+ * Prepare the mailbox packet to get the current logical drive mapping
+ * table
+ */
+ mbox->xferaddr = (uint32_t)raid_dev->sysfs_buffer_dma;
+
+ raw_mbox[0] = FC_DEL_LOGDRV;
+ raw_mbox[2] = OP_GET_LDID_MAP;
+
+ /*
+ * Setup a timer to recover from a non-responding controller
+ */
+ timerp = &sysfs_timer;
+ init_timer(timerp);
+
+ timerp->function = megaraid_sysfs_get_ldmap_timeout;
+ timerp->data = (unsigned long)uioc;
+ timerp->expires = jiffies + 60 * HZ;
+
+ add_timer(timerp);
+ |