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CVS Update@linux-mips.org: linux

To: linux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: linux
From: ralf@linux-mips.org
Date: Sun, 06 Feb 2005 21:24:28 +0000
Reply-to: linux-mips@linux-mips.org
Sender: linux-cvs-patches-bounce@linux-mips.org
CVSROOT:        /home/cvs
Module name:    linux
Changes by:     ralf@ftp.linux-mips.org 05/02/06 21:24:22

Modified files:
        include/asm-mips: Tag: linux_2_4 mipsregs.h 
        include/asm-mips64: Tag: linux_2_4 mipsregs.h 

Log message:
        Provide functions to access cop0 config4-7 registers.

diff -urN linux/include/asm-mips/mipsregs.h linux/include/asm-mips/mipsregs.h
--- linux/include/asm-mips/mipsregs.h   2004/11/25 22:18:38     1.30.2.30
+++ linux/include/asm-mips/mipsregs.h   2005/02/06 21:24:22     1.30.2.31
@@ -757,10 +757,18 @@
 #define read_c0_config1()      __read_32bit_c0_register($16, 1)
 #define read_c0_config2()      __read_32bit_c0_register($16, 2)
 #define read_c0_config3()      __read_32bit_c0_register($16, 3)
+#define read_c0_config4()      __read_32bit_c0_register($16, 4)
+#define read_c0_config5()      __read_32bit_c0_register($16, 5)
+#define read_c0_config6()      __read_32bit_c0_register($16, 6)
+#define read_c0_config7()      __read_32bit_c0_register($16, 7)
 #define write_c0_config(val)   __write_32bit_c0_register($16, 0, val)
 #define write_c0_config1(val)  __write_32bit_c0_register($16, 1, val)
 #define write_c0_config2(val)  __write_32bit_c0_register($16, 2, val)
 #define write_c0_config3(val)  __write_32bit_c0_register($16, 3, val)
+#define write_c0_config4(val)  __write_32bit_c0_register($16, 4, val)
+#define write_c0_config5(val)  __write_32bit_c0_register($16, 5, val)
+#define write_c0_config6(val)  __write_32bit_c0_register($16, 6, val)
+#define write_c0_config7(val)  __write_32bit_c0_register($16, 7, val)
 
 /*
  * The WatchLo register.  There may be upto 8 of them.
diff -urN linux/include/asm-mips64/mipsregs.h 
linux/include/asm-mips64/mipsregs.h
--- linux/include/asm-mips64/Attic/mipsregs.h   2004/11/25 22:18:38     
1.15.2.26
+++ linux/include/asm-mips64/Attic/mipsregs.h   2005/02/06 21:24:22     
1.15.2.27
@@ -757,10 +757,18 @@
 #define read_c0_config1()      __read_32bit_c0_register($16, 1)
 #define read_c0_config2()      __read_32bit_c0_register($16, 2)
 #define read_c0_config3()      __read_32bit_c0_register($16, 3)
+#define read_c0_config4()      __read_32bit_c0_register($16, 4)
+#define read_c0_config5()      __read_32bit_c0_register($16, 5)
+#define read_c0_config6()      __read_32bit_c0_register($16, 6)
+#define read_c0_config7()      __read_32bit_c0_register($16, 7)
 #define write_c0_config(val)   __write_32bit_c0_register($16, 0, val)
 #define write_c0_config1(val)  __write_32bit_c0_register($16, 1, val)
 #define write_c0_config2(val)  __write_32bit_c0_register($16, 2, val)
 #define write_c0_config3(val)  __write_32bit_c0_register($16, 3, val)
+#define write_c0_config4(val)  __write_32bit_c0_register($16, 4, val)
+#define write_c0_config5(val)  __write_32bit_c0_register($16, 5, val)
+#define write_c0_config6(val)  __write_32bit_c0_register($16, 6, val)
+#define write_c0_config7(val)  __write_32bit_c0_register($16, 7, val)
 
 /*
  * The WatchLo register.  There may be upto 8 of them.

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