linux-cvs-patches
[Top] [All Lists]

CVS Update@linux-mips.org: linux

To: linux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: linux
From: ralf@linux-mips.org
Date: Fri, 04 Feb 2005 15:51:12 +0000
Reply-to: linux-mips@linux-mips.org
Sender: linux-cvs-patches-bounce@linux-mips.org
CVSROOT:        /home/cvs
Module name:    linux
Changes by:     ralf@ftp.linux-mips.org 05/02/04 15:51:07

Modified files:
        arch/mips64/mm : Tag: linux_2_4 c-r4k.c 
        arch/mips/mm   : Tag: linux_2_4 c-r4k.c 

Log message:
        Use hardware mechanism to deal with cache aliases in the 24K.

diff -urN linux/arch/mips64/mm/c-r4k.c linux/arch/mips64/mm/c-r4k.c
--- linux/arch/mips64/mm/Attic/c-r4k.c  2005/02/04 14:35:32     1.1.2.64
+++ linux/arch/mips64/mm/Attic/c-r4k.c  2005/02/04 15:51:06     1.1.2.65
@@ -867,9 +867,17 @@
         * normally they'd suffer from aliases but magic in the hardware deals
         * with that for us so we don't need to take care ourselves.
         */
-       if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
+       switch (c->cputype) {
                if (c->dcache.waysize > PAGE_SIZE)
-                       c->dcache.flags |= MIPS_CACHE_ALIASES;
+                       
+       case CPU_R10000:
+       case CPU_R12000:
+               break;
+       case CPU_24K:
+               if (!(read_c0_config7() & (1 << 16)))
+       default:
+                       c->dcache.flags |= MIPS_CACHE_ALIASES;
+       }
 
        switch (c->cputype) {
        case CPU_20KC:
diff -urN linux/arch/mips/mm/c-r4k.c linux/arch/mips/mm/c-r4k.c
--- linux/arch/mips/mm/c-r4k.c  2005/02/04 14:35:32     1.3.2.73
+++ linux/arch/mips/mm/c-r4k.c  2005/02/04 15:51:06     1.3.2.74
@@ -867,9 +867,17 @@
         * normally they'd suffer from aliases but magic in the hardware deals
         * with that for us so we don't need to take care ourselves.
         */
-       if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
+       switch (c->cputype) {
                if (c->dcache.waysize > PAGE_SIZE)
-                       c->dcache.flags |= MIPS_CACHE_ALIASES;
+                       
+       case CPU_R10000:
+       case CPU_R12000:
+               break;
+       case CPU_24K:
+               if (!(read_c0_config7() & (1 << 16)))
+       default:
+                       c->dcache.flags |= MIPS_CACHE_ALIASES;
+       }
 
        switch (c->cputype) {
        case CPU_20KC:

<Prev in Thread] Current Thread [Next in Thread>