CVSROOT: /home/cvs
Module name: linux
Changes by: macro@ftp.linux-mips.org 05/02/01 23:02:12
Modified files:
arch/mips/mm : tlb-r4k.c
Log message:
Formatting fixes.
diff -urN linux/arch/mips/mm/tlb-r4k.c linux/arch/mips/mm/tlb-r4k.c
--- linux/arch/mips/mm/tlb-r4k.c 2004/11/29 05:27:56 1.40
+++ linux/arch/mips/mm/tlb-r4k.c 2005/02/01 23:02:12 1.41
@@ -100,7 +100,7 @@
continue;
/* Make sure all entries differ. */
write_c0_entryhi(CKSEG0 +
- (idx << (PAGE_SHIFT + 1)));
+ (idx << (PAGE_SHIFT + 1)));
mtc0_tlbw_hazard();
tlb_write_indexed();
}
@@ -250,13 +250,13 @@
idx = read_c0_index();
ptep = pte_offset_map(pmdp, address);
- #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
- write_c0_entrylo0(ptep->pte_high);
- ptep++;
- write_c0_entrylo1(ptep->pte_high);
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+ write_c0_entrylo0(ptep->pte_high);
+ ptep++;
+ write_c0_entrylo1(ptep->pte_high);
#else
- write_c0_entrylo0(pte_val(*ptep++) >> 6);
- write_c0_entrylo1(pte_val(*ptep) >> 6);
+ write_c0_entrylo0(pte_val(*ptep++) >> 6);
+ write_c0_entrylo1(pte_val(*ptep) >> 6);
#endif
write_c0_entryhi(address | pid);
mtc0_tlbw_hazard();
@@ -357,7 +357,8 @@
old_pagemask = read_c0_pagemask();
wired = read_c0_wired();
if (--temp_tlb_entry < wired) {
- printk(KERN_WARNING "No TLB space left for
add_temporary_entry\n");
+ printk(KERN_WARNING
+ "No TLB space left for add_temporary_entry\n");
ret = -ENOSPC;
goto out;
}
@@ -388,7 +389,7 @@
* is not supported, we assume R4k style. Cpu probing already figured
* out the number of tlb entries.
*/
- if ((c->processor_id & 0xff0000) == PRID_COMP_LEGACY)
+ if ((c->processor_id & 0xff0000) == PRID_COMP_LEGACY)
return;
reg = read_c0_config1();
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